CA1273091A - Method for producing an optical device - Google Patents
Method for producing an optical deviceInfo
- Publication number
- CA1273091A CA1273091A CA000603408A CA603408A CA1273091A CA 1273091 A CA1273091 A CA 1273091A CA 000603408 A CA000603408 A CA 000603408A CA 603408 A CA603408 A CA 603408A CA 1273091 A CA1273091 A CA 1273091A
- Authority
- CA
- Canada
- Prior art keywords
- solder layer
- optical device
- chip
- die
- set forth
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Light Receiving Elements (AREA)
Abstract
METHOD FOR PRODUCING AN OPTICAL DEVICE
Abstract of the Disclosure:
In the package for optical device according to the present invention, since electroconductive paste printed on a sapphire substrate cut lower in the central portion beforehand is prevented from rising higher at ends than in other portion after burning, irregularity on the surface of a die bonding pad is eliminated. In the optical device according to the present invention, since an electrode and a solder layer having each a light introducing hole are sequentially mounted in layers on the die-bonded side of an optical device chip which is die-bonded to the die bond-ing pad by said solder layer, the optical device chip is die-bonded in a stable state.
Abstract of the Disclosure:
In the package for optical device according to the present invention, since electroconductive paste printed on a sapphire substrate cut lower in the central portion beforehand is prevented from rising higher at ends than in other portion after burning, irregularity on the surface of a die bonding pad is eliminated. In the optical device according to the present invention, since an electrode and a solder layer having each a light introducing hole are sequentially mounted in layers on the die-bonded side of an optical device chip which is die-bonded to the die bond-ing pad by said solder layer, the optical device chip is die-bonded in a stable state.
Description
3~7~
This application is a divisional of co-pending cana~ian application, Serial Number 467,175.
l Field of the Invention:
The present invention relates to optical devices such as 1.ight-emitting diodes and photodiodes, a method for producing ~hem, and packages for such optical devices.
Background of the Invention:
In an optical device such as a light emitti.ng device or a light receiving device, and a package for such optical device, there have been the followiny technological requirements:
(a) It must have a light introducing structure which is transparent to light;
~b) It must be wired as by die bonding or wire bonding to lead electrode terminals out of it;
(c) It's chip must be sealed off hermetically; and (d) It must have a high coupling efficiency wi~h an opti-cal fiber. That is, a light emitting diode chip or a photo-diode chip must be sufficiently close to the optical fiber in end faces and must have a large opening angle. Further, the chip must have a clean light receiving surface which is not stained with paste or like material.
Brief Description of the Drawings:
Fig. 1 is a sectional view of a conventional upper surface type package for optical device, having a glass window in the upper surface;
Fig. 2 is a sectional vie.w of a conventional upper surface type package for optical device, having a sapphire window in the upper surface;
Figs. 3 to 5 are sectional views of conventional lower surface through hole ty~e packages for optical device;
Fig. 6 is an enlarged sectional view for illustration of the range of light incident to the light receiving por-tion of the con~en~ional low r ~urface through hole ~ype optical device; ~J~v ~' ' ''. '' ~
This application is a divisional of co-pending cana~ian application, Serial Number 467,175.
l Field of the Invention:
The present invention relates to optical devices such as 1.ight-emitting diodes and photodiodes, a method for producing ~hem, and packages for such optical devices.
Background of the Invention:
In an optical device such as a light emitti.ng device or a light receiving device, and a package for such optical device, there have been the followiny technological requirements:
(a) It must have a light introducing structure which is transparent to light;
~b) It must be wired as by die bonding or wire bonding to lead electrode terminals out of it;
(c) It's chip must be sealed off hermetically; and (d) It must have a high coupling efficiency wi~h an opti-cal fiber. That is, a light emitting diode chip or a photo-diode chip must be sufficiently close to the optical fiber in end faces and must have a large opening angle. Further, the chip must have a clean light receiving surface which is not stained with paste or like material.
Brief Description of the Drawings:
Fig. 1 is a sectional view of a conventional upper surface type package for optical device, having a glass window in the upper surface;
Fig. 2 is a sectional vie.w of a conventional upper surface type package for optical device, having a sapphire window in the upper surface;
Figs. 3 to 5 are sectional views of conventional lower surface through hole ty~e packages for optical device;
Fig. 6 is an enlarged sectional view for illustration of the range of light incident to the light receiving por-tion of the con~en~ional low r ~urface through hole ~ype optical device; ~J~v ~' ' ''. '' ~
- 2 ~
1 Fig. 7 is an enlaxged sectional view for illustration of the range of light incident to the light receiving por-tion of the conventional lower urface ~hrough hole type optical device in the case where the optical device chip is mounted off the predetermined position;
Fig. 8 is a plan view of a package for optical device of a sapphire substra~e with a cover removed;
Fig. 9 is a sectional view taken along the line IX-IX
of Fig. 8;
Fig. 10 is a sectional view of the optical device in which the optical device chip is die-bonded to the package of Fig. 9;
Fig. 11 is an enlarged plan view of an essential portion of the die bonding pad shown in Figs. 8 and 9;
Fig. 12 is a sectional view ~aken along the line XII-XII of Fig. 11;
Fig. 13 is a sectional view showing the state in which gold paste is screen-printed on a sapphire substrate;
Fig. 14 is a sectional view showing the state of the sapphire substrate with the gold paste thereon burned in a furnace;
Fig. 15 is a sectional view showing the state in which an optical device chip is placed on the gold paste;
Fig~ 16 is a sectional view of an example of a con-ventional mesa type photodiode chip;
Fig. 17 is a sectional view showing the state inwhich a bonding pad is formed on a ceramic substrate having a light introducing hole therethrough;
Fig. 18 is a sectional view showing the state in which a ring solder is mounted on the bonding pad of Fig. 17;
Fig. 19 is a sectional view showing the state-in which a photodiode chip is placed on the ring solder of Fig. 18 and soldered thereto;
1 Fig. 20 is a sectional view showing the qtate in which the ring solder is mounted off the predetermined posi-tion on the bonding pad of Fig. 17;
Fig. 21 is a sectional view showing the state in which a photodiode chip is placed on the ring solder of Fig. 20 and soldered thereto;
Fig. 22 is a sectional view of a sapphire substrate;
Fig. 23 is a sectional view Rhowing the state in which the sapphire substrate of Fig. 22 is provided with a tapered portion and a concavity;
Fig. 24 is a sectional view showing the 6tate in which gold paste is screen printed on the sapphire substrate in such a manner that ends of the gold paste are positioned on the tapered portion of the substrate;
Fig. 25 is a sectional view showing the state in which the sapphire substrate and the gold paste have been burned;
Fig. 26 is a sectional view illustrative of the relationship between the light receiving portion and the opening angle of the optical device chip disposed in the package according to the present invention;
Fig. 27 is a sectional view of an example of a mesa type photodiode according to the present invention;
Fig. 28 is a sectional view showing the state in which the mesa type photodiode chip of Fig. 27 is disposed on the sapphire substrate package for optical device; and Fig. 29 is a sectional view showing the state in which the mesa type photodiode chip of Fig. 27 is disposed on the ceramic substrate package for optical device.
~3~
1 The present invention intends to answer particularly the requlrement (d) above.
Prior Art I Upper Surface l~ype Fig. 1 is a sectional view of a prior art package for a photodiode. This package is a most common type in which light of an optical fiber is incident to it through the upper surface of it. In Fig. 1, a TO18 type package 1 comprises a package body 2 and a cap 3 to cover the upper surface of the body 2. The cap 3 has an opening at the center of the top thereof, which has a transparent kovar glass therein to serve as a window 4. A photo diode chip 5 is die-bonded to the top plate of the package body 2.
The top plate of the package body 2 is provided with a lead 6. Another lead 7 and an electrode on the photodiode chip 5 are wire-bonded with each other by a gold wire 8. An optical fiber 9 is disposed outside of the window 4 in opposition to the photodiode chip 5.
The cap 3 and the body 2 ~re welded together on sides thereof. This package i5 of a h~rmetic seal type which has been bringing satisfactory results for a long time. In this package, since light is incident to it from the upper sur-face where the wire bonding (gold wire 8) exists, the dis-tance between the upper surface of the photodiode chip 5 and the window 4 i8 unduly long, resulting in a disadvantage that the coupling efficiency with the optical fiber 9 is low.
Fig. 2 shows another package for an optical device of the upper surface type as shown in Fig. 1, in which a sapphire plate 4' is mounted in the window in place of the transparent copal glass 4. The package shown in Fig. 2 has 1 likewise the disadvantage that the coupling efficiency with the optical fiber 9 is low because the photodiode chip 5 and the sapphire plate 4' are separated from each other by the gold wire 8 wire-bonded to the chip 5.
Prior Art II Through Hole on Under Surface Type -It is easier to get the optical fiber and the chip close to each other from the under surface than from the upper surface because the wire on the upper surface gives a limit to approach from the upper surface. Therefore, through hole on under surface type packages for optical device shown in Figs. 3 to 5 have been produced. In Fig. 3, a package 10 comprises a package body 12 and a cap 11. In this example, the cap 11 has no window. The package body 12 is provided with a large through hole 13 defined axialiy under the photodiode chip 5. An optical fiber 14 is disposed under the through hole 13 having its upper end face opposed to the lower opening of the through hole 13. The light from the optical fiber 14 is incident to the photo-diode chip 5 from the under surface thereof through the through hole 13. In Figs. 3 to 5, designated by numeral 15 ~re leads equivalent to the leads 6 in Figs. 1 and 2.
Fig. 4 shows an example of the package in which the through hole 13' is enlarged into which the upper end por-tion of the optical flber 14 i~ inserted and ~ixed 80 as to reduce the distance between the photodiode chip 5' and the end of the optical fiber 14. This example has, however, disadvantages that the upper end of the op~ical fiber 14 inserted into the through hole 13' may come in contact with the photodiode chip 5' and damage it and that fixing of the optical fiber 14 is difficult.
1 Fig~ 5 shows an example of the package in which the through hole 13 is sealed off by a copal glass plece 16.
Disadvantages of these through hole on under surface type packages will be described with reference to enlarged 5 sectional views of Figs. 6 and 7 taking the case of Fig. 3 as an example.
A pn junction of the photodiode chip 5 behaves as a light receiver 17 to which the light is incident from under through the through hole 13. Since the light is limited by ~he edge 18 of the through hole 13, only the light within the op~ning angle ~ reaches the light receiver 17. Even if the end face of the optical fiber 14 is brought in contact with the under surface of the package body 12, it is limited by the opening angle e.
Mounting of the photodiode chip 5 is difficult. The through hole 13 is round in section and the photodiode chip 5 is die-bonded to the cap 11 on the contact region 19 exclusive of the through hole 13. Since the chip 5 is small and the through hole 13 is also small in section, alignment of them is difficult. If the center of the light receiver 17 is displaced to a side from the central axis of the through hole 13, as shown in Fig. 7, the quantity of light received by the light receiver 17 is smaller on the side to which it is displaced than on the other side. In Fig. 7, the chip 5 is displaced to the right side and, accordingly, a smaller quantity of light reaches the right half of the light receiver 17 than the left half thereof. Reduction in the quantity of ~he light incident to the photodiode de-creases the detection sensitivity.
In order to enlarge the opening angle of the light incident to the light receiver 17, the through hole 13 must be reduced in length and increased in sectional area. The length of the through hole 13 is equal to the thickness of the package body 12. Reduction in thicknes5 of the package body 12 will make the mechanical strength of it insufficient.
The body 12 is made of metal or ceramic and is limited in thinning because it is the mechanical center to support the chip, lead and cap. A larger diameter of the through hole 13 will necessi~a~e the larger size of the photodiode chip 5, and a larger size of the semiconductor will result in higher cost and lower strength of the chip.
Prior Art III Sapphire Substrate Type -Accordingly, we have previously invented a package for an optical device, in which a apphire substrate is provided thereon with a die bonding pad having an opening, an optical device is die-bonded to the pad, and an end of an optical fiber is opposed to the rear side of the sapphire substrate.
Fig. 8 is a plan view of the package ~or the optical device thus accomplished by the inventors, and Fig. 9 is a sectional view taken along the line IX-IX of Fig. 8. Fig.
~0 10 is a sectional view of the package in which a photo-diode chip is die-bonded and a gold wire or the like is wire-bonded. In the structure of the package shown in Figs.
8 to 10, a lower frame 22 is bonded to a sapphire substrate ~ he lower frame 22 is made of sintered alumina in this example but may be of any insulator. The lo~er frame 22 is bonded to the ~apphire substrate 21 as by brazing. An electroconductive die bonding pad 23 having an opening 24 is disposed at the center of the sapphire substrate 21 by metallizing. The die bonding pad 23 extends at an end thereof beyond an inner edge of the lower frame 22 to an outer edge thereof. The opening 24 i~ ~or passing light therethrough. While the opening 24 .is shown as round in shape, it may, of coursel be of other shape, for example, BqUare. An upper frame 25 is ~onded to the lower frame 22.
In this example, the upper frame 25 is also made of alumina.
The upper frame 25 ~nd the lower frame 22 are bonded togeth~
er by an in~ulating bonding agent. A lead 26 is ~oldered to the ~xtended portion of ~che die bondin9 pad 23. A wire ~2~3~g~
- R -bondi~g pad 28 is metallized to the inner ed~e of the lower frame 22 opposite to the die bonding pad ~3. A lead 27 is soldered to the extended portion of the wire bonding pad 28.
An optical device ehip 29 such as a ph~todiode or a light emitting diode is bonded to the packa~e as shown in Fig. 10.
The optical device chip 29 is mounted on the die bonding pad 23 in such a way tha~ the opening 24 and the optical device chip 29 are aligned in center with each other. The die bonding pad 23 is a ring solder of~ for example, an AuSn eutectic crystal. By applying energy such as ultrasonic wave to the optical device chip 29 which is held down, the solder is melted to fix the chip 29 on the pad 23. Further, a wire 30 of, for example, gold is wire-bonded to connect the wire bonding pad 28 with the electrode of the optical device chip 29. No~ally, an alumina cap is bonded to the u~per frame 25 to seal off the inner space of the package.
Fig~ 11 is an enlarged plan view of a portion of the die bonding pad 23 surrounding the opening 24, and Fig. 12 is a sectional viPw taken along the line XII-XII of Fig. 11.
Ideally, the sapphirP substrate 21 and the die bonding pad 23 are both flat as shown in Fig. 12. If the pad 23 is perfectly flat, the optical device chip 29 can be fixed accurately at the predetermined position in a stable state.
Actually, however, the die bonding pad 23 is not made per-fectly flat for the reason described below.
Fig. 13 is a sectional view of the state in whichpaste of an electroconductive material (for example, gold or AuSn eutectic crystal~ is print~d on the sapphire substrate 21. Since it is thick film printing, a thin screen with an opening identical in shape to the pad is placed on the sapphire substrate 21, and gold paste 23' is applied onto the screen. In this state, the applied gold paste 23' is flat in its upper surface. Then, the sapphire substrate 21 i8 placed in a furnace and burned to solidify the gold paste.
In ~he burning process, the gold paste 23' is caused to rise up at ends 23'a by surface ten~ion. For ~his reason, the gold paste 23' becomes higher at ends 23'a than in o~her portion. When removed ~rom the ~urnace, the gold pa~te i~
solidified in the indetermi~ate shape. Fig. 14 is a sec-tional view of the pad after the burning process. Fig. 15 is a s~ctional view of the pad on which th~ optical de~ice chip 29 is die-bonded. A lot of depressions and rises are caused on the upper ~urface of the paste by expansion and contraction of the paste during the burning process. While the depressions and rises on ~he paste are approximately several ~m in heigh~, since the optical device chip 29 is also small in size, the flat chip tends to be inclined or incomplete in fixing when bonded to the paste having such depressions and rises r Further, the chip is easily detached by a weak shock or vibration.
Prior Art IV Mesa Type Photo Diode Another problem is high speed operation of the photo-diode. Since the photodiode is used in an inversely biasedstate, the electrostatic capacity in the pn junction ob-structs the high speed operation. Reduction in area of the light receiving region (pn junction) is effective to reduce the electrostatic capacity. ~or this purpose, a mesa struc-~0 ture as shown in Fig. 16 may be used.
A p-InP layer 32 is formed on an n-InP substrate 31 as by epitaxial growth. A narrow pn junction 33 between the substrate 31 and the layer 32 functions as the light receiv-ing region. Further, ~he p-InP layer 32 and the pn junction 33 are etched off in stripes toward the upper portion of the n-InP substra~e 31 on both sides to reduce the ~rea of the light rqceiving region. Since the p-InP layer 32 is narrow-ed in stripes, a ring-shaped electrode can no longer be mounted thereon. Accordingly, a stripe-shaped p type Au-Zn electrode 34 is mounted. Then, it is made impossible to pass the light from the p-layer. Instead of it, a ring-shaped n-type AuGeNi electrode 35 is fixed to the bottom of the n~InP ~ubstrate 31. Then, the central portion of the bottom of the n-InP substrate 31 serves as a liyht receiving surface 36 ~hrough which the light is made to pass. Therefore, und~r sur~ace incident types shown in Figs. 3, 4, 5 and 8 to 1~
are demanded also for high ~peed operation of the photodiode.
1 Fig. 7 is an enlaxged sectional view for illustration of the range of light incident to the light receiving por-tion of the conventional lower urface ~hrough hole type optical device in the case where the optical device chip is mounted off the predetermined position;
Fig. 8 is a plan view of a package for optical device of a sapphire substra~e with a cover removed;
Fig. 9 is a sectional view taken along the line IX-IX
of Fig. 8;
Fig. 10 is a sectional view of the optical device in which the optical device chip is die-bonded to the package of Fig. 9;
Fig. 11 is an enlarged plan view of an essential portion of the die bonding pad shown in Figs. 8 and 9;
Fig. 12 is a sectional view ~aken along the line XII-XII of Fig. 11;
Fig. 13 is a sectional view showing the state in which gold paste is screen-printed on a sapphire substrate;
Fig. 14 is a sectional view showing the state of the sapphire substrate with the gold paste thereon burned in a furnace;
Fig. 15 is a sectional view showing the state in which an optical device chip is placed on the gold paste;
Fig~ 16 is a sectional view of an example of a con-ventional mesa type photodiode chip;
Fig. 17 is a sectional view showing the state inwhich a bonding pad is formed on a ceramic substrate having a light introducing hole therethrough;
Fig. 18 is a sectional view showing the state in which a ring solder is mounted on the bonding pad of Fig. 17;
Fig. 19 is a sectional view showing the state-in which a photodiode chip is placed on the ring solder of Fig. 18 and soldered thereto;
1 Fig. 20 is a sectional view showing the qtate in which the ring solder is mounted off the predetermined posi-tion on the bonding pad of Fig. 17;
Fig. 21 is a sectional view showing the state in which a photodiode chip is placed on the ring solder of Fig. 20 and soldered thereto;
Fig. 22 is a sectional view of a sapphire substrate;
Fig. 23 is a sectional view Rhowing the state in which the sapphire substrate of Fig. 22 is provided with a tapered portion and a concavity;
Fig. 24 is a sectional view showing the 6tate in which gold paste is screen printed on the sapphire substrate in such a manner that ends of the gold paste are positioned on the tapered portion of the substrate;
Fig. 25 is a sectional view showing the state in which the sapphire substrate and the gold paste have been burned;
Fig. 26 is a sectional view illustrative of the relationship between the light receiving portion and the opening angle of the optical device chip disposed in the package according to the present invention;
Fig. 27 is a sectional view of an example of a mesa type photodiode according to the present invention;
Fig. 28 is a sectional view showing the state in which the mesa type photodiode chip of Fig. 27 is disposed on the sapphire substrate package for optical device; and Fig. 29 is a sectional view showing the state in which the mesa type photodiode chip of Fig. 27 is disposed on the ceramic substrate package for optical device.
~3~
1 The present invention intends to answer particularly the requlrement (d) above.
Prior Art I Upper Surface l~ype Fig. 1 is a sectional view of a prior art package for a photodiode. This package is a most common type in which light of an optical fiber is incident to it through the upper surface of it. In Fig. 1, a TO18 type package 1 comprises a package body 2 and a cap 3 to cover the upper surface of the body 2. The cap 3 has an opening at the center of the top thereof, which has a transparent kovar glass therein to serve as a window 4. A photo diode chip 5 is die-bonded to the top plate of the package body 2.
The top plate of the package body 2 is provided with a lead 6. Another lead 7 and an electrode on the photodiode chip 5 are wire-bonded with each other by a gold wire 8. An optical fiber 9 is disposed outside of the window 4 in opposition to the photodiode chip 5.
The cap 3 and the body 2 ~re welded together on sides thereof. This package i5 of a h~rmetic seal type which has been bringing satisfactory results for a long time. In this package, since light is incident to it from the upper sur-face where the wire bonding (gold wire 8) exists, the dis-tance between the upper surface of the photodiode chip 5 and the window 4 i8 unduly long, resulting in a disadvantage that the coupling efficiency with the optical fiber 9 is low.
Fig. 2 shows another package for an optical device of the upper surface type as shown in Fig. 1, in which a sapphire plate 4' is mounted in the window in place of the transparent copal glass 4. The package shown in Fig. 2 has 1 likewise the disadvantage that the coupling efficiency with the optical fiber 9 is low because the photodiode chip 5 and the sapphire plate 4' are separated from each other by the gold wire 8 wire-bonded to the chip 5.
Prior Art II Through Hole on Under Surface Type -It is easier to get the optical fiber and the chip close to each other from the under surface than from the upper surface because the wire on the upper surface gives a limit to approach from the upper surface. Therefore, through hole on under surface type packages for optical device shown in Figs. 3 to 5 have been produced. In Fig. 3, a package 10 comprises a package body 12 and a cap 11. In this example, the cap 11 has no window. The package body 12 is provided with a large through hole 13 defined axialiy under the photodiode chip 5. An optical fiber 14 is disposed under the through hole 13 having its upper end face opposed to the lower opening of the through hole 13. The light from the optical fiber 14 is incident to the photo-diode chip 5 from the under surface thereof through the through hole 13. In Figs. 3 to 5, designated by numeral 15 ~re leads equivalent to the leads 6 in Figs. 1 and 2.
Fig. 4 shows an example of the package in which the through hole 13' is enlarged into which the upper end por-tion of the optical flber 14 i~ inserted and ~ixed 80 as to reduce the distance between the photodiode chip 5' and the end of the optical fiber 14. This example has, however, disadvantages that the upper end of the op~ical fiber 14 inserted into the through hole 13' may come in contact with the photodiode chip 5' and damage it and that fixing of the optical fiber 14 is difficult.
1 Fig~ 5 shows an example of the package in which the through hole 13 is sealed off by a copal glass plece 16.
Disadvantages of these through hole on under surface type packages will be described with reference to enlarged 5 sectional views of Figs. 6 and 7 taking the case of Fig. 3 as an example.
A pn junction of the photodiode chip 5 behaves as a light receiver 17 to which the light is incident from under through the through hole 13. Since the light is limited by ~he edge 18 of the through hole 13, only the light within the op~ning angle ~ reaches the light receiver 17. Even if the end face of the optical fiber 14 is brought in contact with the under surface of the package body 12, it is limited by the opening angle e.
Mounting of the photodiode chip 5 is difficult. The through hole 13 is round in section and the photodiode chip 5 is die-bonded to the cap 11 on the contact region 19 exclusive of the through hole 13. Since the chip 5 is small and the through hole 13 is also small in section, alignment of them is difficult. If the center of the light receiver 17 is displaced to a side from the central axis of the through hole 13, as shown in Fig. 7, the quantity of light received by the light receiver 17 is smaller on the side to which it is displaced than on the other side. In Fig. 7, the chip 5 is displaced to the right side and, accordingly, a smaller quantity of light reaches the right half of the light receiver 17 than the left half thereof. Reduction in the quantity of ~he light incident to the photodiode de-creases the detection sensitivity.
In order to enlarge the opening angle of the light incident to the light receiver 17, the through hole 13 must be reduced in length and increased in sectional area. The length of the through hole 13 is equal to the thickness of the package body 12. Reduction in thicknes5 of the package body 12 will make the mechanical strength of it insufficient.
The body 12 is made of metal or ceramic and is limited in thinning because it is the mechanical center to support the chip, lead and cap. A larger diameter of the through hole 13 will necessi~a~e the larger size of the photodiode chip 5, and a larger size of the semiconductor will result in higher cost and lower strength of the chip.
Prior Art III Sapphire Substrate Type -Accordingly, we have previously invented a package for an optical device, in which a apphire substrate is provided thereon with a die bonding pad having an opening, an optical device is die-bonded to the pad, and an end of an optical fiber is opposed to the rear side of the sapphire substrate.
Fig. 8 is a plan view of the package ~or the optical device thus accomplished by the inventors, and Fig. 9 is a sectional view taken along the line IX-IX of Fig. 8. Fig.
~0 10 is a sectional view of the package in which a photo-diode chip is die-bonded and a gold wire or the like is wire-bonded. In the structure of the package shown in Figs.
8 to 10, a lower frame 22 is bonded to a sapphire substrate ~ he lower frame 22 is made of sintered alumina in this example but may be of any insulator. The lo~er frame 22 is bonded to the ~apphire substrate 21 as by brazing. An electroconductive die bonding pad 23 having an opening 24 is disposed at the center of the sapphire substrate 21 by metallizing. The die bonding pad 23 extends at an end thereof beyond an inner edge of the lower frame 22 to an outer edge thereof. The opening 24 i~ ~or passing light therethrough. While the opening 24 .is shown as round in shape, it may, of coursel be of other shape, for example, BqUare. An upper frame 25 is ~onded to the lower frame 22.
In this example, the upper frame 25 is also made of alumina.
The upper frame 25 ~nd the lower frame 22 are bonded togeth~
er by an in~ulating bonding agent. A lead 26 is ~oldered to the ~xtended portion of ~che die bondin9 pad 23. A wire ~2~3~g~
- R -bondi~g pad 28 is metallized to the inner ed~e of the lower frame 22 opposite to the die bonding pad ~3. A lead 27 is soldered to the extended portion of the wire bonding pad 28.
An optical device ehip 29 such as a ph~todiode or a light emitting diode is bonded to the packa~e as shown in Fig. 10.
The optical device chip 29 is mounted on the die bonding pad 23 in such a way tha~ the opening 24 and the optical device chip 29 are aligned in center with each other. The die bonding pad 23 is a ring solder of~ for example, an AuSn eutectic crystal. By applying energy such as ultrasonic wave to the optical device chip 29 which is held down, the solder is melted to fix the chip 29 on the pad 23. Further, a wire 30 of, for example, gold is wire-bonded to connect the wire bonding pad 28 with the electrode of the optical device chip 29. No~ally, an alumina cap is bonded to the u~per frame 25 to seal off the inner space of the package.
Fig~ 11 is an enlarged plan view of a portion of the die bonding pad 23 surrounding the opening 24, and Fig. 12 is a sectional viPw taken along the line XII-XII of Fig. 11.
Ideally, the sapphirP substrate 21 and the die bonding pad 23 are both flat as shown in Fig. 12. If the pad 23 is perfectly flat, the optical device chip 29 can be fixed accurately at the predetermined position in a stable state.
Actually, however, the die bonding pad 23 is not made per-fectly flat for the reason described below.
Fig. 13 is a sectional view of the state in whichpaste of an electroconductive material (for example, gold or AuSn eutectic crystal~ is print~d on the sapphire substrate 21. Since it is thick film printing, a thin screen with an opening identical in shape to the pad is placed on the sapphire substrate 21, and gold paste 23' is applied onto the screen. In this state, the applied gold paste 23' is flat in its upper surface. Then, the sapphire substrate 21 i8 placed in a furnace and burned to solidify the gold paste.
In ~he burning process, the gold paste 23' is caused to rise up at ends 23'a by surface ten~ion. For ~his reason, the gold paste 23' becomes higher at ends 23'a than in o~her portion. When removed ~rom the ~urnace, the gold pa~te i~
solidified in the indetermi~ate shape. Fig. 14 is a sec-tional view of the pad after the burning process. Fig. 15 is a s~ctional view of the pad on which th~ optical de~ice chip 29 is die-bonded. A lot of depressions and rises are caused on the upper ~urface of the paste by expansion and contraction of the paste during the burning process. While the depressions and rises on ~he paste are approximately several ~m in heigh~, since the optical device chip 29 is also small in size, the flat chip tends to be inclined or incomplete in fixing when bonded to the paste having such depressions and rises r Further, the chip is easily detached by a weak shock or vibration.
Prior Art IV Mesa Type Photo Diode Another problem is high speed operation of the photo-diode. Since the photodiode is used in an inversely biasedstate, the electrostatic capacity in the pn junction ob-structs the high speed operation. Reduction in area of the light receiving region (pn junction) is effective to reduce the electrostatic capacity. ~or this purpose, a mesa struc-~0 ture as shown in Fig. 16 may be used.
A p-InP layer 32 is formed on an n-InP substrate 31 as by epitaxial growth. A narrow pn junction 33 between the substrate 31 and the layer 32 functions as the light receiv-ing region. Further, ~he p-InP layer 32 and the pn junction 33 are etched off in stripes toward the upper portion of the n-InP substra~e 31 on both sides to reduce the ~rea of the light rqceiving region. Since the p-InP layer 32 is narrow-ed in stripes, a ring-shaped electrode can no longer be mounted thereon. Accordingly, a stripe-shaped p type Au-Zn electrode 34 is mounted. Then, it is made impossible to pass the light from the p-layer. Instead of it, a ring-shaped n-type AuGeNi electrode 35 is fixed to the bottom of the n~InP ~ubstrate 31. Then, the central portion of the bottom of the n-InP substrate 31 serves as a liyht receiving surface 36 ~hrough which the light is made to pass. Therefore, und~r sur~ace incident types shown in Figs. 3, 4, 5 and 8 to 1~
are demanded also for high ~peed operation of the photodiode.
3~
A chip 37 of the photodiode described above is made by wafer process in which, after a number of devices are made, a wafer is scribed and divided into chips 37. The chi~ 37 must be packaged. There is a further problem in mounting the photodiode chip 37 on the pad.
Prior ~rt V Ceramic Substrate Type As an example intermediate between the example ~hown in Figs. 3 to 5 and the example shown in Figs. 8 to 12, there is a package using a ceramic substrate having a hole therethrough. Since ~he ceramic substrate is not conductive, a metal is evaporated thereon to form a die bonding pad which is slightly different in technical m~aning from the pad of the example described in the preceding paragraph.
Solder is placed on the pad, on which an optical device is placed and soldered.
Figs. 17 to 21 are sectional views showing in order the steps for assembly of a package of the cer~mic substxate type. As shown in Fig. 17, an electroconductive bonding pad 42 is mounted on a ceramic substrate 41 as by evaporation and a light introducing hole 43 is made therethrough. Then, as shown in Fig. 18, a ring solder 44 of Au-Sn is placed around the light in~roducing hole 43. Thereaftex, as shown in Fig. 19, the photodiode chip 37 is placed on the solder 44 and heated in a furnace to solder it~
In this structur`e, even though the solder 44 and the light introducing hole 43 are aligned with each other correctly, when the chip 37 is soldered, a portion 45 of the solder could overFlow from the po~ition to cover the light receiving surface thereby reducing the light receiving area.
In many cases, the position of the solder 44 is displaced to a ~ide as shown in Fig. 20. In this case, if the chip 37 is placed and soldered, there could be caused the wide over-flow 45 toward a ~ide, which covers the light receiving ~ur-face to thereby reduce the ~ensitivity of the photodiode.
While the overflow 45 of ~he solder can be avoided by reduc-ing the thic~ness of the ~older, ~he thickness of the ~older must be 10 m or larger ~or convenience o~ han~lingO For the reason described above, ~he solder 44 could reduce the .
.
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light receiving area on the bottom surface of the chip to lower the sensitivity of the photodiode. Another problem is bonding strength. In the case where a ring solder pre-form (for example, AuSn alloy of 500 ~m outer diameter, 250 ~m inner diame~er, and 30 ~m thickness) is used for die bonding there is a time lag between melting of the preform and die bonding of the photodiode~ which causes a problem of uneven con~act between the bottom surface of the photo-diode and the solder 44, resul~ing in variation in the strensth of the die bonding.
Summary of the Invention-.
An object of the present invention is to provide apackage for an optical device, which i5 free of a problem in metallizing of a die bonding pad used on a sapphire sub-strate, that is irregularity caused on the surface of thedie bonding pad, and on which an optical device chip can be securely mounted in a stable state.
Another object of the present invention is to provide a package for an optical device, which is free of problems ~0 caused in fixing an optical device chip to a die bonding pAd such as overflow of solder to the light receiving surface and variation in the strength of the die bond, and on which the optical device chip can be securely die-bonded in a stable state.
A further object of the present invention is to provide a photodiode in which a photo diode chip can be die-bonded to a die bonding pad in a stable state.
A still further object of the present invention is to provide a method for producing a photodiode in which a photodiode chip can be die-bonded to a die bonding pad in a stable state.
In the package Por an optical device according to the present invention, in view of the fact that the electro-conductive p ste printed on the upper surface vf the sap-phire substrate is caused to rise at ends by burning, thesubstrate i5 ~haved of f beforehand in the central portion in the depth corresponding to ~he quantity of rising of the burnsd paste at its ends ~o make the ends of the burned ~L273~
1 paste equal in height to other portion of the paste~
Accordingly, even when an op~ic~l device chip i8 placed on the die bonding pad formed ~y the electxoconductive pa~te, the optical device chip is not raised unevenly in the ~ottom surface.
In the optical device according to the present inven-tion, solder is not applied to the substrate. Instead, an electrode and a solder layer each h~ving a light passing hole therethrough are mounted sequentially to the ~ide of the optical device chip to be die-bonded. Therefore, the optical device chip is die-bonded to the die bonding pad on the substrate by the solder layer on the side of the optical device chip.
The method for producing an optical device according lS to the present invention comprises a wafer process or form-ing an n-side electrode having a light passing hole there-through on a monocrystal wafer and thereafter metallizing a solder layer on said n-side electrode, and a process for scribing and dividing said wafer into a plurality of indi-vidual p~otodiode chip~.
In one of its aspects, the present inventionprovides a method for producing an optical device, comprising the steps of:
sequentially mounting an electrode having a light passing hole on a light incident surface of an optical chip device and mounting a solder layer on said electrode;
mounting a die bonding pad on a light passing substrate; and die-bonding said electrode on said optical chip device to said die bonding pad by using said solder layer, whereby an integral optical device is produced that is die bonded in a stable state.
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1 In another aspect, the present invention provides a method for producing an optical device comprisin~ the steps of:
forming a die bonding pad on an upper surface of a sapphire subs-trate which has a tapered portion and a concavity continuous to the tapered portion by printing and heating electroconductlve paste, ends of said electroconductive paste being positioned on said tapered portion and said e]ectroconductive paste formed with a first light passing hole on said concavity to form an opening of said die bonding pad so that light passes through said sapphire substrate and said opening;
sequentially mounting an electrode and a solder layer having a second light passing hole on a surface of a light passing side of an optical device chip; and die-bonding said optical device chip to said die bonding pad using said solder layer.
Preferred Embodiment of the Invention:
Preferred embodiments of the present invention will now be described with reference to ~he drawings. First of all, an embodiment for overcoming the problem in metallizing the die bonding pad 23 in a package for an opti~al device shown in Figs. 8 and 9 will be described with reference to Figs. 22 to 25. Since the problem in me~allizing the die bonding pad is cau~ed by the rising of gold paste at its ends, the sapphire substrate 21 i~ ~lightly shaved before-hand in ~he depth corresponding to the amount of rising of the paste in its ends.
Fig. 22 is a sectional view of the sapphire substrate 21 which is flat and transparent, and i~ 0.2 mm in thickness in this exampl~.
Fig. 23 shows the flat ~apphire ~ub~trate 21 pro~ided with a ~h~llow tapered por~ion 51 and a concavity 52 con~in-uou8 ~here~o. The tapered portion 51 and the concavity 52 are procec~ed by Ar laser, bu~ may be proces~ed mechanical-ly. The d~ffexence in height be~wee~ an unproce~ed upper 73~
surface 53 and the concavity 52 i~ in the range 5 - 10 ~m.
Then, as shown in Fig. 24, electroconductive paste 54 such as gold paste is screen-printed on the ~ubstrate 21 in the shape to be the die bonding pad 23 in ~uch a mannex that the concavity 52 corresponds to the opening 24 of the pad 23.
Ends 55 corr~sponding to the opening 24 of the paste 23 are inclined smoothly toward the concavity 52. The screen-printed paste is dried and burned in ~ furnace. Fig. 25 is a sectional view of the ~apphire substrate 21 and the paste 54 thereon after burning. By burning, the paste 54 rises in the ends 55 in the height no more than 5 ~m. Since the ends of the paste extend to the tapered portion 51, the ends of the paste are not made higher than other poxtions of the paste by the rising. The optical device chip 29 is die-bonded to the die bonding pad 23 thus processed. Since therising in the ends of the paste is levelled off, there is no unequal raising of the bottom surface of the chip 29.
Thereafter, a package for optical device as shown in Figs. 8 and 9 is produced in the process described hereinabove.
Then, as shown in Fig. 10, the optical device chip 29 is die-bonded, the wire 30 is wire-bonded and cap-sealed to form an optical device.
The package for optical device structured as de-scribed above provides the following meritorious technical effects:
(a) Safety in die bonding of the optical device chip is increased. ~fter the gold pas~e is burned, the rising in the ends is levelled off not to be in contact with the sur-face of the optical device chip. The gold paste is in 3Q contact with the back side of the chip only in flat portions thereof to make the entire contact ~urface flat.
(b) The packaging of this optical device chip is, unlike that of ~he under surface through hole type ~hown in Fig. 6, not ~everely limlted in the opening angle. In the structure of the packaging according to the present invention shown in Fig. 26, the light reaching the light receiving portion 17' pa~se~ the opening 2~ o~ ~he pad 23. The opening 24 i~ in contact with he chip 29 and i~ very ~hin. Accordingly, it , is possible to let the light included in the wide opening angle ~' be incident to the light receiving portion 17'.
Then, an embcdlment for overcoming the problem~ in fixing an optical device chip to a die bonding pad, such as overflow of the solder to the ligh~ receiving surfacP and variation in the die bonding streng~h, will be described in detail. In the present invention~ soldPr is not applied to the subs~rate side but a solder layer is applied to the chip side.
Fig. 27 is a sectional viPw showing an exampl~ in which the present invention is applied to a mesa type photo-diode chip. A non-dop~d InGaAs epitaxial layer 62 is grown on an Sn-doped InP substrate 61 by liquid phase epitaxial process so as to be lattice-matched to ~he InP substrate 61.
Then, a p-type region 63 is formed by ~n diffusion, whereby a pn junction is produced. Thereafter, a p-side electrode 64 is formed by using AuZn and an n-side electrode 6S is formed by using AuGeNi.
Further, the chip is etched from both sides in the neighborhood of the pn junction into a mesa shape to reduce the electrostatic capacity. Then, an Sn plating pattern is formed on the underside of the n-side electrode 65 using a plating solution of alkanol sulphonic acid. The Sn-plated portion is hereinafter called a solder layer 66 since it functions ~s solder. The solder layer 66 and the n-side electrode 65 are each in a ring shape, and the underside of the chip is exposed at the central portion which functions as a light receiving surface 67. The thickness of the solder layer 66 i5 1 - 15 ~m. These steps are carried out by wafer process. Thereafter, the wafer is scribed and divided into individual chips. The solder layer 66 is formed effieiently by plating or evaporation. Beside Sn, Au-Sn eutectic alloy sr Au-Si eutectic alloy may be used as the material of the solder layer 66.
For die-bonding the photodiode chip thus processed using Sn as the ~older, the package to be bonded is heated to 250C and the chip with the ~older layer 66 attached there~o is ~ligned ~o ~he pad and die-bonde~ thereto. At .... .. .
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this time~ no other solder is necessary because the solder layer 66 on the underside of the chip i5 melted temporarily and then solidified to fix them s~curely.
In experiments, ~he photodicde chip was die-bonded 5 most satisfactorily when th~ thickness of Sn plating was 5 - 10 ~m. When the thickness of the Sn plating was 5 ~m or less, the bonding ~trength varied and was unstable. When the thickness of the Sn plating was 10 ~m or more, the Sn solder overflowed and varied. Therefore, while the optimum range of the plating thickness depends upon the kind of the solder material, the plating thickness in the range 5 - 10 ~m is generally most satisfactory.
In the present invention, the solder layer is pro-vided on the chip side. The chip is die-bonded to the subctrate of the package by the solder layer. The substra~e and the package may be arbitrary in the kind of material and the shape.
Fig. 28 is a sectional view showing the structure in which said photodiode chip is mounted to a flat type pack-age using the sapphire substrate 2 of Figs. B and 9 producedthrough the steps shown in Figs. 22 to 25. The optical device chip o Fig. 27 is placed directly (without using new solder) on the die bonding pad 23 and die-bonded thereto to securely attach the ~-side electrode 65 and the pad 23 ~S thereto. The p-side electrode 64 is wire-bonded to the pad 28 by th~ wire 30. The light passes the sapphire substrate 21 and the opening 24 of the pad 23, and reaches the light receiving surface 67. In ~his s~ructure, there is no over flow or di610cation of the solder layer 66.
Fig. 29 is a sectional view showing the struc~ure in which said photodiode chip is mounted to a ceramic sub-strate type package shown in Fig. 17. ~ire bonding, lead and the ex~ernal shape of the package are not ~hown because they can be selected arbitrarily. In Fig. 29, the ceramic substrate i9 not provided wi~h solder, but the solder layer 66 on the chip side functions ~s the solder to securely attach the chip to the pad 42~
While the present invention has been des~ri~ed . ~, "' ~
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hereinabove with reference to the ~pecific applications, it will be understood that the pre~ent invention i applicable to any of all optical devices such as planar type photo-diode, avalanche photodio~e (APD) and further to packaging of plane light transmission type light transmitting diode and plane light transmission type laser diode.
The optical device having the &tructure according ~o the present invention as described above provides khe meri~
torious technical effects as follows:
(a) Since overflow or dislocation of the solder layer in die bonding is prevented, there is no reduction in area or space of the transparent portion for passing light by the solder. This increases the yield rate in assembly of the optical devices. When applied to a photodiode, the present invention does not decrease the sensitivity of the photo-diode because the photodiode is provided with a metallized layer of such, for example, as Sn in the die bonding area other than the light receiving wir.dow. Since the thickness of the metallized layer of such as Sn can be arbitrarily controlled in the accuracy of 0.2 ~m, there i5 no overflow of the solder.
(b) It is not necessary to provide special die-bonding agent such as solder or epoxy resin in die bonding. This makes production process simple and productivity high.
While we have shown and described specific embodi-ments of our invention, it will be understood that these embodiments are merely for the purpose of illustration and description and that various other forms may be devised within the scope of our invention, as defined in the appended claims.
,, :
`: :
A chip 37 of the photodiode described above is made by wafer process in which, after a number of devices are made, a wafer is scribed and divided into chips 37. The chi~ 37 must be packaged. There is a further problem in mounting the photodiode chip 37 on the pad.
Prior ~rt V Ceramic Substrate Type As an example intermediate between the example ~hown in Figs. 3 to 5 and the example shown in Figs. 8 to 12, there is a package using a ceramic substrate having a hole therethrough. Since ~he ceramic substrate is not conductive, a metal is evaporated thereon to form a die bonding pad which is slightly different in technical m~aning from the pad of the example described in the preceding paragraph.
Solder is placed on the pad, on which an optical device is placed and soldered.
Figs. 17 to 21 are sectional views showing in order the steps for assembly of a package of the cer~mic substxate type. As shown in Fig. 17, an electroconductive bonding pad 42 is mounted on a ceramic substrate 41 as by evaporation and a light introducing hole 43 is made therethrough. Then, as shown in Fig. 18, a ring solder 44 of Au-Sn is placed around the light in~roducing hole 43. Thereaftex, as shown in Fig. 19, the photodiode chip 37 is placed on the solder 44 and heated in a furnace to solder it~
In this structur`e, even though the solder 44 and the light introducing hole 43 are aligned with each other correctly, when the chip 37 is soldered, a portion 45 of the solder could overFlow from the po~ition to cover the light receiving surface thereby reducing the light receiving area.
In many cases, the position of the solder 44 is displaced to a ~ide as shown in Fig. 20. In this case, if the chip 37 is placed and soldered, there could be caused the wide over-flow 45 toward a ~ide, which covers the light receiving ~ur-face to thereby reduce the ~ensitivity of the photodiode.
While the overflow 45 of ~he solder can be avoided by reduc-ing the thic~ness of the ~older, ~he thickness of the ~older must be 10 m or larger ~or convenience o~ han~lingO For the reason described above, ~he solder 44 could reduce the .
.
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light receiving area on the bottom surface of the chip to lower the sensitivity of the photodiode. Another problem is bonding strength. In the case where a ring solder pre-form (for example, AuSn alloy of 500 ~m outer diameter, 250 ~m inner diame~er, and 30 ~m thickness) is used for die bonding there is a time lag between melting of the preform and die bonding of the photodiode~ which causes a problem of uneven con~act between the bottom surface of the photo-diode and the solder 44, resul~ing in variation in the strensth of the die bonding.
Summary of the Invention-.
An object of the present invention is to provide apackage for an optical device, which i5 free of a problem in metallizing of a die bonding pad used on a sapphire sub-strate, that is irregularity caused on the surface of thedie bonding pad, and on which an optical device chip can be securely mounted in a stable state.
Another object of the present invention is to provide a package for an optical device, which is free of problems ~0 caused in fixing an optical device chip to a die bonding pAd such as overflow of solder to the light receiving surface and variation in the strength of the die bond, and on which the optical device chip can be securely die-bonded in a stable state.
A further object of the present invention is to provide a photodiode in which a photo diode chip can be die-bonded to a die bonding pad in a stable state.
A still further object of the present invention is to provide a method for producing a photodiode in which a photodiode chip can be die-bonded to a die bonding pad in a stable state.
In the package Por an optical device according to the present invention, in view of the fact that the electro-conductive p ste printed on the upper surface vf the sap-phire substrate is caused to rise at ends by burning, thesubstrate i5 ~haved of f beforehand in the central portion in the depth corresponding to ~he quantity of rising of the burnsd paste at its ends ~o make the ends of the burned ~L273~
1 paste equal in height to other portion of the paste~
Accordingly, even when an op~ic~l device chip i8 placed on the die bonding pad formed ~y the electxoconductive pa~te, the optical device chip is not raised unevenly in the ~ottom surface.
In the optical device according to the present inven-tion, solder is not applied to the substrate. Instead, an electrode and a solder layer each h~ving a light passing hole therethrough are mounted sequentially to the ~ide of the optical device chip to be die-bonded. Therefore, the optical device chip is die-bonded to the die bonding pad on the substrate by the solder layer on the side of the optical device chip.
The method for producing an optical device according lS to the present invention comprises a wafer process or form-ing an n-side electrode having a light passing hole there-through on a monocrystal wafer and thereafter metallizing a solder layer on said n-side electrode, and a process for scribing and dividing said wafer into a plurality of indi-vidual p~otodiode chip~.
In one of its aspects, the present inventionprovides a method for producing an optical device, comprising the steps of:
sequentially mounting an electrode having a light passing hole on a light incident surface of an optical chip device and mounting a solder layer on said electrode;
mounting a die bonding pad on a light passing substrate; and die-bonding said electrode on said optical chip device to said die bonding pad by using said solder layer, whereby an integral optical device is produced that is die bonded in a stable state.
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1 In another aspect, the present invention provides a method for producing an optical device comprisin~ the steps of:
forming a die bonding pad on an upper surface of a sapphire subs-trate which has a tapered portion and a concavity continuous to the tapered portion by printing and heating electroconductlve paste, ends of said electroconductive paste being positioned on said tapered portion and said e]ectroconductive paste formed with a first light passing hole on said concavity to form an opening of said die bonding pad so that light passes through said sapphire substrate and said opening;
sequentially mounting an electrode and a solder layer having a second light passing hole on a surface of a light passing side of an optical device chip; and die-bonding said optical device chip to said die bonding pad using said solder layer.
Preferred Embodiment of the Invention:
Preferred embodiments of the present invention will now be described with reference to ~he drawings. First of all, an embodiment for overcoming the problem in metallizing the die bonding pad 23 in a package for an opti~al device shown in Figs. 8 and 9 will be described with reference to Figs. 22 to 25. Since the problem in me~allizing the die bonding pad is cau~ed by the rising of gold paste at its ends, the sapphire substrate 21 i~ ~lightly shaved before-hand in ~he depth corresponding to the amount of rising of the paste in its ends.
Fig. 22 is a sectional view of the sapphire substrate 21 which is flat and transparent, and i~ 0.2 mm in thickness in this exampl~.
Fig. 23 shows the flat ~apphire ~ub~trate 21 pro~ided with a ~h~llow tapered por~ion 51 and a concavity 52 con~in-uou8 ~here~o. The tapered portion 51 and the concavity 52 are procec~ed by Ar laser, bu~ may be proces~ed mechanical-ly. The d~ffexence in height be~wee~ an unproce~ed upper 73~
surface 53 and the concavity 52 i~ in the range 5 - 10 ~m.
Then, as shown in Fig. 24, electroconductive paste 54 such as gold paste is screen-printed on the ~ubstrate 21 in the shape to be the die bonding pad 23 in ~uch a mannex that the concavity 52 corresponds to the opening 24 of the pad 23.
Ends 55 corr~sponding to the opening 24 of the paste 23 are inclined smoothly toward the concavity 52. The screen-printed paste is dried and burned in ~ furnace. Fig. 25 is a sectional view of the ~apphire substrate 21 and the paste 54 thereon after burning. By burning, the paste 54 rises in the ends 55 in the height no more than 5 ~m. Since the ends of the paste extend to the tapered portion 51, the ends of the paste are not made higher than other poxtions of the paste by the rising. The optical device chip 29 is die-bonded to the die bonding pad 23 thus processed. Since therising in the ends of the paste is levelled off, there is no unequal raising of the bottom surface of the chip 29.
Thereafter, a package for optical device as shown in Figs. 8 and 9 is produced in the process described hereinabove.
Then, as shown in Fig. 10, the optical device chip 29 is die-bonded, the wire 30 is wire-bonded and cap-sealed to form an optical device.
The package for optical device structured as de-scribed above provides the following meritorious technical effects:
(a) Safety in die bonding of the optical device chip is increased. ~fter the gold pas~e is burned, the rising in the ends is levelled off not to be in contact with the sur-face of the optical device chip. The gold paste is in 3Q contact with the back side of the chip only in flat portions thereof to make the entire contact ~urface flat.
(b) The packaging of this optical device chip is, unlike that of ~he under surface through hole type ~hown in Fig. 6, not ~everely limlted in the opening angle. In the structure of the packaging according to the present invention shown in Fig. 26, the light reaching the light receiving portion 17' pa~se~ the opening 2~ o~ ~he pad 23. The opening 24 i~ in contact with he chip 29 and i~ very ~hin. Accordingly, it , is possible to let the light included in the wide opening angle ~' be incident to the light receiving portion 17'.
Then, an embcdlment for overcoming the problem~ in fixing an optical device chip to a die bonding pad, such as overflow of the solder to the ligh~ receiving surfacP and variation in the die bonding streng~h, will be described in detail. In the present invention~ soldPr is not applied to the subs~rate side but a solder layer is applied to the chip side.
Fig. 27 is a sectional viPw showing an exampl~ in which the present invention is applied to a mesa type photo-diode chip. A non-dop~d InGaAs epitaxial layer 62 is grown on an Sn-doped InP substrate 61 by liquid phase epitaxial process so as to be lattice-matched to ~he InP substrate 61.
Then, a p-type region 63 is formed by ~n diffusion, whereby a pn junction is produced. Thereafter, a p-side electrode 64 is formed by using AuZn and an n-side electrode 6S is formed by using AuGeNi.
Further, the chip is etched from both sides in the neighborhood of the pn junction into a mesa shape to reduce the electrostatic capacity. Then, an Sn plating pattern is formed on the underside of the n-side electrode 65 using a plating solution of alkanol sulphonic acid. The Sn-plated portion is hereinafter called a solder layer 66 since it functions ~s solder. The solder layer 66 and the n-side electrode 65 are each in a ring shape, and the underside of the chip is exposed at the central portion which functions as a light receiving surface 67. The thickness of the solder layer 66 i5 1 - 15 ~m. These steps are carried out by wafer process. Thereafter, the wafer is scribed and divided into individual chips. The solder layer 66 is formed effieiently by plating or evaporation. Beside Sn, Au-Sn eutectic alloy sr Au-Si eutectic alloy may be used as the material of the solder layer 66.
For die-bonding the photodiode chip thus processed using Sn as the ~older, the package to be bonded is heated to 250C and the chip with the ~older layer 66 attached there~o is ~ligned ~o ~he pad and die-bonde~ thereto. At .... .. .
. .
~ ~3~
this time~ no other solder is necessary because the solder layer 66 on the underside of the chip i5 melted temporarily and then solidified to fix them s~curely.
In experiments, ~he photodicde chip was die-bonded 5 most satisfactorily when th~ thickness of Sn plating was 5 - 10 ~m. When the thickness of the Sn plating was 5 ~m or less, the bonding ~trength varied and was unstable. When the thickness of the Sn plating was 10 ~m or more, the Sn solder overflowed and varied. Therefore, while the optimum range of the plating thickness depends upon the kind of the solder material, the plating thickness in the range 5 - 10 ~m is generally most satisfactory.
In the present invention, the solder layer is pro-vided on the chip side. The chip is die-bonded to the subctrate of the package by the solder layer. The substra~e and the package may be arbitrary in the kind of material and the shape.
Fig. 28 is a sectional view showing the structure in which said photodiode chip is mounted to a flat type pack-age using the sapphire substrate 2 of Figs. B and 9 producedthrough the steps shown in Figs. 22 to 25. The optical device chip o Fig. 27 is placed directly (without using new solder) on the die bonding pad 23 and die-bonded thereto to securely attach the ~-side electrode 65 and the pad 23 ~S thereto. The p-side electrode 64 is wire-bonded to the pad 28 by th~ wire 30. The light passes the sapphire substrate 21 and the opening 24 of the pad 23, and reaches the light receiving surface 67. In ~his s~ructure, there is no over flow or di610cation of the solder layer 66.
Fig. 29 is a sectional view showing the struc~ure in which said photodiode chip is mounted to a ceramic sub-strate type package shown in Fig. 17. ~ire bonding, lead and the ex~ernal shape of the package are not ~hown because they can be selected arbitrarily. In Fig. 29, the ceramic substrate i9 not provided wi~h solder, but the solder layer 66 on the chip side functions ~s the solder to securely attach the chip to the pad 42~
While the present invention has been des~ri~ed . ~, "' ~
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~3~
hereinabove with reference to the ~pecific applications, it will be understood that the pre~ent invention i applicable to any of all optical devices such as planar type photo-diode, avalanche photodio~e (APD) and further to packaging of plane light transmission type light transmitting diode and plane light transmission type laser diode.
The optical device having the &tructure according ~o the present invention as described above provides khe meri~
torious technical effects as follows:
(a) Since overflow or dislocation of the solder layer in die bonding is prevented, there is no reduction in area or space of the transparent portion for passing light by the solder. This increases the yield rate in assembly of the optical devices. When applied to a photodiode, the present invention does not decrease the sensitivity of the photo-diode because the photodiode is provided with a metallized layer of such, for example, as Sn in the die bonding area other than the light receiving wir.dow. Since the thickness of the metallized layer of such as Sn can be arbitrarily controlled in the accuracy of 0.2 ~m, there i5 no overflow of the solder.
(b) It is not necessary to provide special die-bonding agent such as solder or epoxy resin in die bonding. This makes production process simple and productivity high.
While we have shown and described specific embodi-ments of our invention, it will be understood that these embodiments are merely for the purpose of illustration and description and that various other forms may be devised within the scope of our invention, as defined in the appended claims.
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Claims (19)
1. A method for producing an optical device, comprising the steps of:
sequentially mounting an electrode having a light passing hole on a light incident surface of an optical chip device and mounting a solder layer on said electrode;
mounting a die bonding pad on a light passing substrate; and die-bonding said electrode on said optical chip device to said die bonding pad by using said solder layer, whereby an integral optical device is produced that is die bonded in a stable state.
sequentially mounting an electrode having a light passing hole on a light incident surface of an optical chip device and mounting a solder layer on said electrode;
mounting a die bonding pad on a light passing substrate; and die-bonding said electrode on said optical chip device to said die bonding pad by using said solder layer, whereby an integral optical device is produced that is die bonded in a stable state.
2. A method as set forth in claim 1, wherein said solder layer is Sn.
3. A method as set forth in claim 1, wherein said solder layer is a Au-Sn eutectic alloy.
4. A method as set forth in claim 1, wherein said solder layer is a Au-Si eutectic alloy.
5. A method as set forth in claim 1, wherein the thickness of said solder layer is 5-10 µm.
6. A method as set forth in claim 1, wherein said substrate is sapphire.
7. A method as set forth in claim l, wherein said substrate is ceramic.
8. A method as set forth in claim 1 comprising the further step of forming said solder layer by plating.
9. A method as set forth in claim l comprising the further step of forming said solder layer by evaporation.
10. An optical device as set forth in claim 1, wherein said electrode and said solder layer are each ring-shaped.
11. A method for producing a photodiode comprising the steps of:
sequentially mounting an electrode having a light passing hole onto a light receiving surface of a photodiode chip and mounting a solder layer onto said electrode; and die-bonding said photodiode chip to a die bonding pad by using said solder layer, whereby said photodiode chip is die bonded in a stable state.
sequentially mounting an electrode having a light passing hole onto a light receiving surface of a photodiode chip and mounting a solder layer onto said electrode; and die-bonding said photodiode chip to a die bonding pad by using said solder layer, whereby said photodiode chip is die bonded in a stable state.
12. A method as set forth in claim 11, wherein said solder layer is Sn.
13. A method as set forth in claim 11, wherein said solder layer is a Au-Sn eutectic alloy.
14. A method as set forth in claim 11, wherein said solder layer is a Au-Si eutectic alloy.
15. A method as set forth in claim 11, wherein the thickness of the solder layer is 5-10 µm.
16. A method as set forth in claim 11 comprising the further step of forming said solder layer by plating.
17. A method as set forth in claim 11 comprising the further step of forming said solder layer by evaporation.
18. A method as set forth in claim 11, wherein said electrode and said solder layer are each ring-shaped.
19. A method for producing an optical device comprising the steps of:
forming a die bonding pad on an upper surface of a sapphire substrate which has a tapered portion and a concavity continuous to the tapered portion by printing and heating electroconductive paste, ends of said electroconductive paste being positioned on said tapered portion and said electroconductive paste formed with a first light passing hole on said concavity to form an opening of said die bonding pad so that light passes through said sapphire substrate and said opening;
sequentially mounting an electrode and a solder layer having a second light passing hole on a surface of a light passing side of an optical device chip; and die-bonding said optical device chip to said die bonding pad using said solder layer.
forming a die bonding pad on an upper surface of a sapphire substrate which has a tapered portion and a concavity continuous to the tapered portion by printing and heating electroconductive paste, ends of said electroconductive paste being positioned on said tapered portion and said electroconductive paste formed with a first light passing hole on said concavity to form an opening of said die bonding pad so that light passes through said sapphire substrate and said opening;
sequentially mounting an electrode and a solder layer having a second light passing hole on a surface of a light passing side of an optical device chip; and die-bonding said optical device chip to said die bonding pad using said solder layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA000603408A CA1273091A (en) | 1983-11-21 | 1989-06-20 | Method for producing an optical device |
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP218964/1983 | 1983-11-21 | ||
JP58218964A JPS60110180A (en) | 1983-11-21 | 1983-11-21 | Package for photoelement |
JP223020/1983 | 1983-11-25 | ||
JP58223020A JPS60113978A (en) | 1983-11-25 | 1983-11-25 | Optical element |
JP58232341A JPS60124885A (en) | 1983-12-08 | 1983-12-08 | Light-receiving diode and manufacture thereof |
JP232341/1983 | 1983-12-08 | ||
CA000467175A CA1267468A (en) | 1983-11-21 | 1984-11-06 | Optical device package |
CA000603408A CA1273091A (en) | 1983-11-21 | 1989-06-20 | Method for producing an optical device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000467175A Division CA1267468A (en) | 1983-11-21 | 1984-11-06 | Optical device package |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1273091A true CA1273091A (en) | 1990-08-21 |
Family
ID=27426398
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA000603408A Expired - Fee Related CA1273091A (en) | 1983-11-21 | 1989-06-20 | Method for producing an optical device |
Country Status (1)
Country | Link |
---|---|
CA (1) | CA1273091A (en) |
-
1989
- 1989-06-20 CA CA000603408A patent/CA1273091A/en not_active Expired - Fee Related
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