CA1259145A - Selectable impedance line interface circuit - Google Patents
Selectable impedance line interface circuitInfo
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- CA1259145A CA1259145A CA000547489A CA547489A CA1259145A CA 1259145 A CA1259145 A CA 1259145A CA 000547489 A CA000547489 A CA 000547489A CA 547489 A CA547489 A CA 547489A CA 1259145 A CA1259145 A CA 1259145A
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Abstract
SELECTABLE IMPEDANCE LINE INTERFACE CIRCUIT
Abstract of the Disclosure An interface circuit a.c. couples a transmission line and a port of a telecommunications facility. The transmission line may be of any of n characteristic impedances. The interface circuit includes a resistor network having at least 2n+1 resistor elements. The resistor network is connected to ground by at least one of the resistor elements. A switching device includes at least n switching elements being connected between n of the resistor elements and an input of an amplifier. A transformer includes first, second and third windings, the first winding being for connection to the transmission line, the second winding being connected between an output of the amplifier and a junction between the one of the resistor elements and at least another of the resistor elements, and the third winding being connected between ground and a point in the resistance network other than the junction. A resistor connects at least one of the n switching elements and the port of the telecommunication facility. A control device is connected to the switching device for controlling each of said switching elements to be of one of a high resistance state and a lower resistance state. In one example, each of the switching elements consists of a semiconductor which includes at least one field effect transistor.
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Abstract of the Disclosure An interface circuit a.c. couples a transmission line and a port of a telecommunications facility. The transmission line may be of any of n characteristic impedances. The interface circuit includes a resistor network having at least 2n+1 resistor elements. The resistor network is connected to ground by at least one of the resistor elements. A switching device includes at least n switching elements being connected between n of the resistor elements and an input of an amplifier. A transformer includes first, second and third windings, the first winding being for connection to the transmission line, the second winding being connected between an output of the amplifier and a junction between the one of the resistor elements and at least another of the resistor elements, and the third winding being connected between ground and a point in the resistance network other than the junction. A resistor connects at least one of the n switching elements and the port of the telecommunication facility. A control device is connected to the switching device for controlling each of said switching elements to be of one of a high resistance state and a lower resistance state. In one example, each of the switching elements consists of a semiconductor which includes at least one field effect transistor.
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Description
s SELECTABLE IMPEDANCE LINE INTERFACE CI~CUIT
The invention is concerned with electronic transmission and reception of signals via a transmission line and more particularly pertains to interface circuits which are adaptable to provide more than one terminating or source impedance.
Back~round of the Invention A typical transmission line is oE a single preferred characteristic impedance. Any impedance discontinuity anywhere along the line or at either of its terminating ends causes an undesirable reduction or attenuation of signals being transmitted along the line from one end to another. Therefore it is common practice to connect the transmission line between line interface circuits which are designed to provide source and terminatiny impedances which will compensate for the frequency characteristics of the transmission line.
For example, in the telecommunication industry, a so called E&M trunk includes a pair of wires used for transmitting analog signals, another pair of wires for receiving analog signals, and yet another pair of wires for trunk supervision signals. The usual characteristic impedance of the transmitting and receiving pairs of wires in North America is 600 ohms. However other termination impedances, for example 1200 ohms and 150 ohms are in standard common usage to provide frequency compensation.
The change in terminating impedance to correct for cable frequency resposne produces a change in the flat loss through the cable. The circuit must therefore change the impedance and provide an accompanying gain change to maintain the same signal level with the improved fre~uency response.
A line interface circuit may be adaptable to more than one characteristic impedance by providing metallic contact switches for selecting any one of a plurality of terminating resistances. In one example, selection by manual switches may be effected, at any time, to select one of a plurality of operating impedances for the line interface circuit. However, the potential for erroneous selection and the added expense of manual switches are significant disadvantages.
The error potential may be significantly reduced by substituting relay switches for manual switches, whereby the selected impedance of each line interface circuit is effected at a central location, for example, a central control area in a telecommunications facility. However, an added expense is associated with providing appropriate relays and relay driver ~ircuits. A further expense to be born by the operating company is the subsequent and on-going additional floor space and operating power requirement of the relays.
Summar~ of the Invention It is an object of the invention to provide a line interface circuit wherein a predetermined source or a terminating a.cO impedance value is selectable by means of semiconductor switch elements, in spite of potentially wide variances of MAKE resistance value in such semiconductor switch elements.
An interface circuit adaptable for providing a preferred a.c. terminating impedance for a transmission line is comprised of an inverting amplifier having an input and an output; first and second resistors R1 and R2 being connected to the amplifier input; and a transformer including a first winding for connection to the transmission line, a second winding connected between the amplifier output and a junction of the second resistor and a third resistor R3, and a third winding being connected in series between the third resistor and the first resistor, remote from the second resistor. The preferred a.c. terminating impedance is determined by selection of appropriate values for the resistors R1, R2 and R3.
An interface circuit, in accordance with the invention, provides for a.c. coupling a transmission line, of any one of n predetermined characteristic impedances, and a port of a telecommunication facility. The interface circuit includes a resistance network, having at least 2n~1 resistor elements, each being of a predetermined ohmic value. The resistance network is connected to ground by a one of said ~25~ S
resistor elements. A switching device includes at least n switching elements being connected between n of the resistor elements and an input of an amplifier. A transformer includes first, second and third windings, the first winding being for connection to the transmission line, the second winding being connected between an output of the amplifier and a junction between the one of the resistor elements and at least one other of the resistor elements, and the third winding being connected between ground and a point in the resistance network other than the junction. A resistance is connected to at least one of the n switching elements and provides a signal path between a port of the telecommunication facility and the line interface circuit. A
control means is connected to the switching device for controlling each of the switching elements to be of one of a high resistance state and a lower resistance state.
In one example, each of the switching elements consists of a semiconductor being at least one field effect transistor.
Brief Descri~tion of the Drawinqs An example embodiment is discussed in the following with reference to the accompanying drawings in which:
Figures 1 and 2 are schematic diagrams which serve to illustrate impPdance matching principles used in the invention; and Figure 3 is a schematic diagram of a telecommunication line interface circuit for transmitting and receiving analog signals via a four wire transmission line of one of three possible different characteristic impedances, in accordance with the invention.
Description of the Example Embodiment The circuit illustrated in Figure 1 operates to define an impedance across a first transformer winding at terminals A and B. The impedance is derived via an inverting amplifier Al, from a combination of voltage from a resistor Rl and voltage developed by current feedback through resistors R2 and R3. Current in the first winding at A and B
induces current in a second winding C, D, which flows from an :L25~
output of the amplifier A1 to ground via the resistor R3.
The resulting voltage across the resistor R3 is proportional to the instant current in the winding connected betweened the terminals A and B and is combined via the resistor R2 with voltage induced across a third transformer winding E, F, via the resistor R1. In this arrangement, the third transformer winding E, F operates in a substantially unloaded condition such that the voltage induced across it is about proportional to the voltage across the first winding at the terminals A
and B. The impedance across the first winding at A and B is proportional to the current through the winding and the voltage across the winding. The impedance is determined by a ratio of selected ohmic values of the resistors R1 and R2.
Actual resistance values of the second and third windings are relatively unimportant because of the gain of the amplifier A1.
The circuit in Figure 2 is the same as the circuit in Figure 1, except for the addition of a resistor R4 which serves to couple analog signals for transmission via the terminals A and B. The output o* the amplifier A1 in the illustrated configuration varies to maintain an a.c. ground at the input of the amplifier A2. Hence the addition of the resistor R4 is of no significant effect on the circuit impedance. Once the values of R1 and R2 are set, value of the resistor R4 determines the amount by which the analog signal is amplified by the amplifier A1.
The line interface circuit in Figure 3 is based on the principles discussed with relation to Figures 1 and Z. A
receive portion of the line interface circuit is illustrated in an upper part of Figure 3, and a transmit portion is illustrated in a lower part of Figure 3. Any one of three matching impedances is selected via a control bus 4 connected to switching devices 5 and 6. The switching devices 5 and 6 are controllable from a central location via data and control leads at 3, connected to a digital register 2. Examples of economically acceptable switching devices for use in the line interface circuit are available from Motorola Corp., of 1303 East Algonquin Road, Roselle, Illinois, 60196, U.S.A., and ~L2~
are described on pages 6~132 to 6-138 of their current catalogue. The devices 5 and 6 are identified by Motorola product numbers 4052 and 4053 respectively, and are generally described as analog multiplexers/demultiplexers.
In the receiver portion of the line interface circuit a transformer 9 includes a first transfor~er winding 10 for connection to a transmission line, a second transformer winding 11 connected in series between an output of a differential amplifier 14 and ground via a resistor 20, and a third transformer winding connected between ground and a resistor 21 at one end of a series resistance network 21-24. The resistor 24 is at another end of the resistance network and is connected to a junction of the resistor 20 and the second transformer winding 11. A resistor 25 at one end of another series resistance network 25-28 is connected at a junction of the third transformer winding 12 and the resistor 21. The resistor 28 at another end of the series resistance network is connected at a junction of an output terminal 13 and an output of a differential amplifier 16. The amplifiers 20 14 and 16 each include inverting inputs 15 and 17 respectively. In this example, a pair of zenner diodes 18 is connected across the second transformer winding 11 and are intended to provide some protection against transient overvoltages as may be induced by lightening stri~es or the like on the transmission line. Capacitors l9a, l9b and l9c are connected as shown to prevent oscillations, and each is of about 10 picofarads capacitance.
The switching device 5 includes field effect transistors being arranged in groups such that the functional equivalents of MAKE contacts 32-38 are achieved. As may be realized and with reference to the previously mentioned catalogue, the MAKE or ON resistance of any one of these MAKE
contacts is at best predictable within a few hundreds of ohms. However, in the illustrated circuit arrangement, this variance of ON resistance is of insignificant consequence providing that only one of the MAKE contacts 32-3~ and only a corresponding one of the MAKE contacts 36-38 is selected to be ON at any one time. Selection of the ON MAKE contacts is ~L25~
effected via the binary inputs A and B of the switching device 5.
In operation, the MAKE contacts 34-32 select the one of three available resistance ratios to define one of three predetermined terminating impedances. ~ikewise, the MAKE contacts 36-38 select a corresponding one of three available resistance ratios whereby a desired amount of amplification of signals having been received by the third transformer winding is provided via the amplifier 16 which couples the received signals to the telecommunication facility.
The transmitting portion of the line interface circuit includes a transformer 39 having a first transformer winding 40 for connection to a transmission line. A second transformer winding 41 is connected between an output of a differential amplifier 46 and ground via a resistor 53.
third transformer winding 42 is connected between ground and a junction of resistors 51a, 51b and 51c in a series/parallel resistance network. A junction of resistors 52a, 52b and 52c also in the series/parallel resistance network is connected to a junction of the resistor 53 and the second transformer winding 41. An input terminal 43, for receiving analog signals is connected to an inverting input 47 of the differential amplifier 46 via a resistor 54. A pair of zenner diodes 48 is connected in series across the second transformer winding 41 with the intention of pro~iding protection against transient overvoltages as may be induced, via the transmission line, due to lighting strikes or the like. Capacitors 49a and 49b are connected as shown to prevent oscillation and may be of capacitance values of about 10 picofarads.
The switching device 6 includes field effect transistors being arranged in groups such that the functional equivalent of transfer contacts 57, 58 and 59 is achieved.
Of course, as the device 6 is provided by the same semiconductor technoloyy as the device 5, the ON resistance of each of the contact elements is not accurately predictable. However, in the illustrated circuit ~5~
arrangement, variance of ON resistance is of insiynificant consequence providing that only one MAKE portion of the three transfer contacts 57-59 is ON at any one time. Selection of one ON MAKE portion of one of the transfer contacts and two BREAK portions of the remaining two transfer contacts is effected via binary inputs A, B and C of the switching device 6.
Suitable transformers 9 and 39 for four wire E and M trunk termination may be constructed on a Siemens ferrite core type H5C2 or equivalent. One distributor of Siemens cores is Permog of 2960 South Avenue, Toledo, Ohio, U.S.A., 43609. The first, second and third windings consist of 580 turns, 580 turns and 170.5 turns of #32 AWG copper wire, respectively. Examples of resistor values to provide 150, 160 and 1200 ohms of terminating impedance are as follows:-Resistor Value in Ohms 21 33.~K
22 64.9K
23 28.OK
24 45.3K
51a 88.7K
51b 61.9K
51c 30.1K
52a 30.lK
52b 39.2K
52c 100K
54 61.9K
Although the example embodiment has been described in terms of separate elements 2, 5, 6, 14, 16 and 46, it will be apparent to persons of typical skill in the semiconductor electronic art that for volume production it may be advantageous to implement the circuit in a more integrated circuit form.
The invention is concerned with electronic transmission and reception of signals via a transmission line and more particularly pertains to interface circuits which are adaptable to provide more than one terminating or source impedance.
Back~round of the Invention A typical transmission line is oE a single preferred characteristic impedance. Any impedance discontinuity anywhere along the line or at either of its terminating ends causes an undesirable reduction or attenuation of signals being transmitted along the line from one end to another. Therefore it is common practice to connect the transmission line between line interface circuits which are designed to provide source and terminatiny impedances which will compensate for the frequency characteristics of the transmission line.
For example, in the telecommunication industry, a so called E&M trunk includes a pair of wires used for transmitting analog signals, another pair of wires for receiving analog signals, and yet another pair of wires for trunk supervision signals. The usual characteristic impedance of the transmitting and receiving pairs of wires in North America is 600 ohms. However other termination impedances, for example 1200 ohms and 150 ohms are in standard common usage to provide frequency compensation.
The change in terminating impedance to correct for cable frequency resposne produces a change in the flat loss through the cable. The circuit must therefore change the impedance and provide an accompanying gain change to maintain the same signal level with the improved fre~uency response.
A line interface circuit may be adaptable to more than one characteristic impedance by providing metallic contact switches for selecting any one of a plurality of terminating resistances. In one example, selection by manual switches may be effected, at any time, to select one of a plurality of operating impedances for the line interface circuit. However, the potential for erroneous selection and the added expense of manual switches are significant disadvantages.
The error potential may be significantly reduced by substituting relay switches for manual switches, whereby the selected impedance of each line interface circuit is effected at a central location, for example, a central control area in a telecommunications facility. However, an added expense is associated with providing appropriate relays and relay driver ~ircuits. A further expense to be born by the operating company is the subsequent and on-going additional floor space and operating power requirement of the relays.
Summar~ of the Invention It is an object of the invention to provide a line interface circuit wherein a predetermined source or a terminating a.cO impedance value is selectable by means of semiconductor switch elements, in spite of potentially wide variances of MAKE resistance value in such semiconductor switch elements.
An interface circuit adaptable for providing a preferred a.c. terminating impedance for a transmission line is comprised of an inverting amplifier having an input and an output; first and second resistors R1 and R2 being connected to the amplifier input; and a transformer including a first winding for connection to the transmission line, a second winding connected between the amplifier output and a junction of the second resistor and a third resistor R3, and a third winding being connected in series between the third resistor and the first resistor, remote from the second resistor. The preferred a.c. terminating impedance is determined by selection of appropriate values for the resistors R1, R2 and R3.
An interface circuit, in accordance with the invention, provides for a.c. coupling a transmission line, of any one of n predetermined characteristic impedances, and a port of a telecommunication facility. The interface circuit includes a resistance network, having at least 2n~1 resistor elements, each being of a predetermined ohmic value. The resistance network is connected to ground by a one of said ~25~ S
resistor elements. A switching device includes at least n switching elements being connected between n of the resistor elements and an input of an amplifier. A transformer includes first, second and third windings, the first winding being for connection to the transmission line, the second winding being connected between an output of the amplifier and a junction between the one of the resistor elements and at least one other of the resistor elements, and the third winding being connected between ground and a point in the resistance network other than the junction. A resistance is connected to at least one of the n switching elements and provides a signal path between a port of the telecommunication facility and the line interface circuit. A
control means is connected to the switching device for controlling each of the switching elements to be of one of a high resistance state and a lower resistance state.
In one example, each of the switching elements consists of a semiconductor being at least one field effect transistor.
Brief Descri~tion of the Drawinqs An example embodiment is discussed in the following with reference to the accompanying drawings in which:
Figures 1 and 2 are schematic diagrams which serve to illustrate impPdance matching principles used in the invention; and Figure 3 is a schematic diagram of a telecommunication line interface circuit for transmitting and receiving analog signals via a four wire transmission line of one of three possible different characteristic impedances, in accordance with the invention.
Description of the Example Embodiment The circuit illustrated in Figure 1 operates to define an impedance across a first transformer winding at terminals A and B. The impedance is derived via an inverting amplifier Al, from a combination of voltage from a resistor Rl and voltage developed by current feedback through resistors R2 and R3. Current in the first winding at A and B
induces current in a second winding C, D, which flows from an :L25~
output of the amplifier A1 to ground via the resistor R3.
The resulting voltage across the resistor R3 is proportional to the instant current in the winding connected betweened the terminals A and B and is combined via the resistor R2 with voltage induced across a third transformer winding E, F, via the resistor R1. In this arrangement, the third transformer winding E, F operates in a substantially unloaded condition such that the voltage induced across it is about proportional to the voltage across the first winding at the terminals A
and B. The impedance across the first winding at A and B is proportional to the current through the winding and the voltage across the winding. The impedance is determined by a ratio of selected ohmic values of the resistors R1 and R2.
Actual resistance values of the second and third windings are relatively unimportant because of the gain of the amplifier A1.
The circuit in Figure 2 is the same as the circuit in Figure 1, except for the addition of a resistor R4 which serves to couple analog signals for transmission via the terminals A and B. The output o* the amplifier A1 in the illustrated configuration varies to maintain an a.c. ground at the input of the amplifier A2. Hence the addition of the resistor R4 is of no significant effect on the circuit impedance. Once the values of R1 and R2 are set, value of the resistor R4 determines the amount by which the analog signal is amplified by the amplifier A1.
The line interface circuit in Figure 3 is based on the principles discussed with relation to Figures 1 and Z. A
receive portion of the line interface circuit is illustrated in an upper part of Figure 3, and a transmit portion is illustrated in a lower part of Figure 3. Any one of three matching impedances is selected via a control bus 4 connected to switching devices 5 and 6. The switching devices 5 and 6 are controllable from a central location via data and control leads at 3, connected to a digital register 2. Examples of economically acceptable switching devices for use in the line interface circuit are available from Motorola Corp., of 1303 East Algonquin Road, Roselle, Illinois, 60196, U.S.A., and ~L2~
are described on pages 6~132 to 6-138 of their current catalogue. The devices 5 and 6 are identified by Motorola product numbers 4052 and 4053 respectively, and are generally described as analog multiplexers/demultiplexers.
In the receiver portion of the line interface circuit a transformer 9 includes a first transfor~er winding 10 for connection to a transmission line, a second transformer winding 11 connected in series between an output of a differential amplifier 14 and ground via a resistor 20, and a third transformer winding connected between ground and a resistor 21 at one end of a series resistance network 21-24. The resistor 24 is at another end of the resistance network and is connected to a junction of the resistor 20 and the second transformer winding 11. A resistor 25 at one end of another series resistance network 25-28 is connected at a junction of the third transformer winding 12 and the resistor 21. The resistor 28 at another end of the series resistance network is connected at a junction of an output terminal 13 and an output of a differential amplifier 16. The amplifiers 20 14 and 16 each include inverting inputs 15 and 17 respectively. In this example, a pair of zenner diodes 18 is connected across the second transformer winding 11 and are intended to provide some protection against transient overvoltages as may be induced by lightening stri~es or the like on the transmission line. Capacitors l9a, l9b and l9c are connected as shown to prevent oscillations, and each is of about 10 picofarads capacitance.
The switching device 5 includes field effect transistors being arranged in groups such that the functional equivalents of MAKE contacts 32-38 are achieved. As may be realized and with reference to the previously mentioned catalogue, the MAKE or ON resistance of any one of these MAKE
contacts is at best predictable within a few hundreds of ohms. However, in the illustrated circuit arrangement, this variance of ON resistance is of insignificant consequence providing that only one of the MAKE contacts 32-3~ and only a corresponding one of the MAKE contacts 36-38 is selected to be ON at any one time. Selection of the ON MAKE contacts is ~L25~
effected via the binary inputs A and B of the switching device 5.
In operation, the MAKE contacts 34-32 select the one of three available resistance ratios to define one of three predetermined terminating impedances. ~ikewise, the MAKE contacts 36-38 select a corresponding one of three available resistance ratios whereby a desired amount of amplification of signals having been received by the third transformer winding is provided via the amplifier 16 which couples the received signals to the telecommunication facility.
The transmitting portion of the line interface circuit includes a transformer 39 having a first transformer winding 40 for connection to a transmission line. A second transformer winding 41 is connected between an output of a differential amplifier 46 and ground via a resistor 53.
third transformer winding 42 is connected between ground and a junction of resistors 51a, 51b and 51c in a series/parallel resistance network. A junction of resistors 52a, 52b and 52c also in the series/parallel resistance network is connected to a junction of the resistor 53 and the second transformer winding 41. An input terminal 43, for receiving analog signals is connected to an inverting input 47 of the differential amplifier 46 via a resistor 54. A pair of zenner diodes 48 is connected in series across the second transformer winding 41 with the intention of pro~iding protection against transient overvoltages as may be induced, via the transmission line, due to lighting strikes or the like. Capacitors 49a and 49b are connected as shown to prevent oscillation and may be of capacitance values of about 10 picofarads.
The switching device 6 includes field effect transistors being arranged in groups such that the functional equivalent of transfer contacts 57, 58 and 59 is achieved.
Of course, as the device 6 is provided by the same semiconductor technoloyy as the device 5, the ON resistance of each of the contact elements is not accurately predictable. However, in the illustrated circuit ~5~
arrangement, variance of ON resistance is of insiynificant consequence providing that only one MAKE portion of the three transfer contacts 57-59 is ON at any one time. Selection of one ON MAKE portion of one of the transfer contacts and two BREAK portions of the remaining two transfer contacts is effected via binary inputs A, B and C of the switching device 6.
Suitable transformers 9 and 39 for four wire E and M trunk termination may be constructed on a Siemens ferrite core type H5C2 or equivalent. One distributor of Siemens cores is Permog of 2960 South Avenue, Toledo, Ohio, U.S.A., 43609. The first, second and third windings consist of 580 turns, 580 turns and 170.5 turns of #32 AWG copper wire, respectively. Examples of resistor values to provide 150, 160 and 1200 ohms of terminating impedance are as follows:-Resistor Value in Ohms 21 33.~K
22 64.9K
23 28.OK
24 45.3K
51a 88.7K
51b 61.9K
51c 30.1K
52a 30.lK
52b 39.2K
52c 100K
54 61.9K
Although the example embodiment has been described in terms of separate elements 2, 5, 6, 14, 16 and 46, it will be apparent to persons of typical skill in the semiconductor electronic art that for volume production it may be advantageous to implement the circuit in a more integrated circuit form.
Claims (7)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:-
1. An interface circuit for a.c. coupling a transmission line, of any one of n predetermined characteristic impedances, to a port of a telecommunications facility, said port being of a predetermined and fixed impedance, the interface circuit comprising:
a resistance network including at least 2n+1 resistor elements, each being of a predetermined ohmic value, the resistance network being connected to ground by a one of said resistor elements;
an amplifier having an input and an output;
a switching device including at least n switching elements being connected between n of the resistor elements and the input of the amplifier;
a transformer having a first winding for connection to the transmission line, a second winding being connected between the output of the amplifier and a junction between said one of the resistor elements and at least one other of the resistor elements, and a third winding being connected between ground and a point in the resistance network other than said junction; means for coupling signals between at least one of the said n switching elements and the port of the telecommunication facility; and a control means being connected to the switching device for controlling each of said switching elements to be of one of a high resistance state and a lower resistance state.
a resistance network including at least 2n+1 resistor elements, each being of a predetermined ohmic value, the resistance network being connected to ground by a one of said resistor elements;
an amplifier having an input and an output;
a switching device including at least n switching elements being connected between n of the resistor elements and the input of the amplifier;
a transformer having a first winding for connection to the transmission line, a second winding being connected between the output of the amplifier and a junction between said one of the resistor elements and at least one other of the resistor elements, and a third winding being connected between ground and a point in the resistance network other than said junction; means for coupling signals between at least one of the said n switching elements and the port of the telecommunication facility; and a control means being connected to the switching device for controlling each of said switching elements to be of one of a high resistance state and a lower resistance state.
2. An interface circuit as defined in claim 1, wherein the coupling means includes a second amplifier having an output connected to an analog signal output terminal;
wherein the switching device consists of first and second groups of n switching elements each element being arranged to provide a MAKE contact function; wherein the resistance network is a series arrangement of 2n+3 resistor elements, at one end being connected to the output terminal and said point being n+1 resistor elements distant from the output terminal;
and wherein the first group of n switching elements is connected between the inverting input of amplifier and corresponding junctions of the resistor elements, and the second group of n switching elements is connected between the inverting input of the second amplifier and corresponding junction of the resistor elements.
wherein the switching device consists of first and second groups of n switching elements each element being arranged to provide a MAKE contact function; wherein the resistance network is a series arrangement of 2n+3 resistor elements, at one end being connected to the output terminal and said point being n+1 resistor elements distant from the output terminal;
and wherein the first group of n switching elements is connected between the inverting input of amplifier and corresponding junctions of the resistor elements, and the second group of n switching elements is connected between the inverting input of the second amplifier and corresponding junction of the resistor elements.
3. An interface circuit as defined in claim 2 wherein each of the MAKE contact elements is a semiconductor structure and each is selectably controllable via binary control signals.
4. An interface circuit as defined in claim 1 wherein the switching device consists of n switching elements, each element having a MAKE and a BREAK portion being arranged to provide a TRANSFER contact function;
wherein the resistance network is a series/parallel arrangement of 2n+1 resistor elements, a first n of said resistor elements having a junction common with said point, a second n of said resistor elements having a common junction with the second winding and each of the first n of said resistor elements being connected to a corresponding resistor element of the second n of said resistor elements and being connectable via a corresponding MAKE portion to the inverting input of the amplifier.
wherein the resistance network is a series/parallel arrangement of 2n+1 resistor elements, a first n of said resistor elements having a junction common with said point, a second n of said resistor elements having a common junction with the second winding and each of the first n of said resistor elements being connected to a corresponding resistor element of the second n of said resistor elements and being connectable via a corresponding MAKE portion to the inverting input of the amplifier.
5. An interface circuit as defined in claim 4 wherein each of the MAKE contact elements and each of the BREAK contact elements is a semiconductor structure and each is selectable controllable via binary control signals.
6. An interface circuit for a.c. coupling a four wire transmission line of any one of n predetermined characteristic impedances with a port of a telecommunication facility, the interface circuit comprising:
first, second and third amplifiers, each having an output and an inverting input;
a first resistance network including 2n+1 resistors, and a second resistance network including 2n+3 resistors;
a first transformer including a first winding for connection to a pair of the transmission line wires, a second winding being connected between the output of the first amplifier and ground via a first resistor in the first resistance network, and a third winding being connected between a junction of n resistors in the first resistor network and ground;
a first switching device including n transfer switches, each including a BREAK portion connected to ground, a MAKE portion connected to the inverting input of the first amplifier, and a MAKE BREAK junction between said portions, each MAKE BREAK junction being connected to a corresponding one of the n resistors;
remaining n resistors in the first resistor network being connected between a junction of the first resistor and the second winding and junction of corresponding ones of the first mentioned n resistors and the MAKE BREAK
junction;
a second transformer including a first winding for connection to another pair of the transmission line wires, a second winding being connected between the output of the second amplifier and ground via a first resistor in the second resistance network, and a third winding being connected to a junction in the resistance network and ground, said junction being n+1 resistors removed from the first resistor;
a second switching device including first and second groups of n MAKE switches, the first group of n MAKE
switches being connected between the inverting input of the second amplifier and respective n junctions of n+1 of the resistors, said resistors being connected in series between said point and the first resistor, and the second group of n MAKE switches being connected between the inverting input of the third amplifier and respective n junctions of the n+1 resistors said resistors being connected in series between the point and a junction of the output of the third amplifier and an output terminal; and register means being connected to each of the switching devices for controlling states of the respective switches such that any one of n operating interface circuit impedances is selectable.
first, second and third amplifiers, each having an output and an inverting input;
a first resistance network including 2n+1 resistors, and a second resistance network including 2n+3 resistors;
a first transformer including a first winding for connection to a pair of the transmission line wires, a second winding being connected between the output of the first amplifier and ground via a first resistor in the first resistance network, and a third winding being connected between a junction of n resistors in the first resistor network and ground;
a first switching device including n transfer switches, each including a BREAK portion connected to ground, a MAKE portion connected to the inverting input of the first amplifier, and a MAKE BREAK junction between said portions, each MAKE BREAK junction being connected to a corresponding one of the n resistors;
remaining n resistors in the first resistor network being connected between a junction of the first resistor and the second winding and junction of corresponding ones of the first mentioned n resistors and the MAKE BREAK
junction;
a second transformer including a first winding for connection to another pair of the transmission line wires, a second winding being connected between the output of the second amplifier and ground via a first resistor in the second resistance network, and a third winding being connected to a junction in the resistance network and ground, said junction being n+1 resistors removed from the first resistor;
a second switching device including first and second groups of n MAKE switches, the first group of n MAKE
switches being connected between the inverting input of the second amplifier and respective n junctions of n+1 of the resistors, said resistors being connected in series between said point and the first resistor, and the second group of n MAKE switches being connected between the inverting input of the third amplifier and respective n junctions of the n+1 resistors said resistors being connected in series between the point and a junction of the output of the third amplifier and an output terminal; and register means being connected to each of the switching devices for controlling states of the respective switches such that any one of n operating interface circuit impedances is selectable.
7. An interface circuit being adaptable for providing a preferred a.c. terminating impedance for a transmission line, comprising:
an inverting amplifier having an input and an output;
first, second and third resistors, the first and second resistors being connected to the input of the amplifier; and a transformer including a first winding for connection to a pair of wires in the transmission line, a second winding being connected between the output of the amplifier and a junction of the second and third resistors, and a third winding being connected in series between the third resistor and the first resistor, remote from the second resistor.
an inverting amplifier having an input and an output;
first, second and third resistors, the first and second resistors being connected to the input of the amplifier; and a transformer including a first winding for connection to a pair of wires in the transmission line, a second winding being connected between the output of the amplifier and a junction of the second and third resistors, and a third winding being connected in series between the third resistor and the first resistor, remote from the second resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000547489A CA1259145A (en) | 1987-09-22 | 1987-09-22 | Selectable impedance line interface circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000547489A CA1259145A (en) | 1987-09-22 | 1987-09-22 | Selectable impedance line interface circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1259145A true CA1259145A (en) | 1989-09-05 |
Family
ID=4136498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000547489A Expired CA1259145A (en) | 1987-09-22 | 1987-09-22 | Selectable impedance line interface circuit |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1259145A (en) |
-
1987
- 1987-09-22 CA CA000547489A patent/CA1259145A/en not_active Expired
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |