CA1241896A - Passivation and insulation of iii-v devices with pnictides, particularly amorphous pnictides having a layer-like structure - Google Patents
Passivation and insulation of iii-v devices with pnictides, particularly amorphous pnictides having a layer-like structureInfo
- Publication number
- CA1241896A CA1241896A CA000457668A CA457668A CA1241896A CA 1241896 A CA1241896 A CA 1241896A CA 000457668 A CA000457668 A CA 000457668A CA 457668 A CA457668 A CA 457668A CA 1241896 A CA1241896 A CA 1241896A
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- Prior art keywords
- layer
- semiconductor
- semiconductor device
- pnictide
- iii
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13063—Metal-Semiconductor Field-Effect Transistor [MESFET]
Abstract
ABSTRACT
Pnictide thin films, particularly phosphorus, grown on III-V semiconductors, particularly InP, GaP, and GaAs, are amorphous and have a novel layer-like, puckered sheet-like local order. The thin films are typically 400 Angstroms thick and grown preferably by molecular beam deposition, although other processes such as vacuum evaporation, sput-tering, chemical vapor deposition, and deposition from a liquid melt may be used. The layers are grown on the <100>
<110> , and <111> surfaces of the III-V crystals. The pnictide layer reduces the density of surface states, and allows the depletion layer to be modulated, the surface barrier reduced, the electron concentration at the surface increased, and there is a decrease in the surface recombination velocity and an increase in the photoluminescence intensity. The layers may be utilized in MIS and Metal-semiconductor (Schottky) devices for example to insulate and passivate MISFETS, to passivate MESFETS, to reduce the surface current component of the reverse bias dark current in P-I-N and avalanche diodes, and to improve performance of opto-electronic devices such as light emitting diodes, lasers, solar cells, photo cathodes and photo detectors. The pnictide layer may be applied to intermetallic and compound semiconductors having a pnictide component. The pnictides may be phosphorus, arsenic, antimony or bismuth, or combinations thereof.
Pnictide thin films, particularly phosphorus, grown on III-V semiconductors, particularly InP, GaP, and GaAs, are amorphous and have a novel layer-like, puckered sheet-like local order. The thin films are typically 400 Angstroms thick and grown preferably by molecular beam deposition, although other processes such as vacuum evaporation, sput-tering, chemical vapor deposition, and deposition from a liquid melt may be used. The layers are grown on the <100>
<110> , and <111> surfaces of the III-V crystals. The pnictide layer reduces the density of surface states, and allows the depletion layer to be modulated, the surface barrier reduced, the electron concentration at the surface increased, and there is a decrease in the surface recombination velocity and an increase in the photoluminescence intensity. The layers may be utilized in MIS and Metal-semiconductor (Schottky) devices for example to insulate and passivate MISFETS, to passivate MESFETS, to reduce the surface current component of the reverse bias dark current in P-I-N and avalanche diodes, and to improve performance of opto-electronic devices such as light emitting diodes, lasers, solar cells, photo cathodes and photo detectors. The pnictide layer may be applied to intermetallic and compound semiconductors having a pnictide component. The pnictides may be phosphorus, arsenic, antimony or bismuth, or combinations thereof.
Description
RELATED APPLICATIONS
. .
This applica-tion is related to the following co-pending applications, assigned to the same assignee as this applica-tion. Canadian Patent Application entitled CATENATED PHOS-PHORUS MATERIALS, THEIR PREPARATION AND USE, AND SEMICONDUC-T~RAND OTHER DEVICES E~PLOYING THEM, Serial No. 418,657, filed December 29, 1982; GRAPHITE INTERCALATED ALKALI METAL VAPOR
SOURCES, filed concurrently; SPUTTERED SEMICONDUCTING FILMS
OF CATENATED PHOSPHORUS MATERIAL AND DEVICES FORMED THEREFROM, filed concurrently; and, LIQUID PHASE GROWTH OF CRYSTALLINE
POLYPHOSPHIDE, filed concurrently,also, the applications filed herewith of David G. Brock and John A. Baumann for THER~L
CRACKERS FOR FO~ING PNICTIDE FILMS IN HIGH VACUUM PROCESSES;
Mark A. Kuck and Susan W. Gersten for CONTINUOUS PNICTIDE
SOURCE AND DELIVERY SYSTEM FOR FILM DEPOSITION, PARTICULARLY
BY CHEMICAL VAPOR DEPOSITION; Mark A. Kuck and Susan W. Gersten for METHOD OF PREPARING HIGH PURITY WHITE PHOSPHORUS; Robert Parry, John A. Baumann and Rozalie Schachter for PNICTIDE
TRAP FOR VACUUM SYSTEMS; and, Mark A. Kuck, Susan W. Gersten, John A. Baumann and Paul M. Raccah for HIGH VACUUM DEPOSITION
PROCESSES EMPLOYING A CONTINUOUS PNICTIDE DELIVERY SYSTEM.
.~ - 2 ~ ) 0 7 . 1 C. 7244 & C. 7473 TECHN I CAL F' I ELD
This application relates to the passivation and insu-lation of III-V devices with pnictides, particularly amor-phous pnictides having a layer-like puckered sheet-like structure; compound, intermetallic semiconductors, particu-larly III~V semiconductors; to pnictide and polypnictides, particularly phosphorus and polyphosphides; to MIS and metal-semiconductor (Schottky) devices, particularly MISFETS
and MFSFETS; to light absorbing diodes, particularly P-I-N
and avalanche detector diodes, solar cells, and photo cathodes; and to light emitting diodes, and lasers.
9~ !
_3~ 110.007.1 C.72~ ~ C.7~73 BACKGROUND ART
III-V semiconductors have desirable pxoperties of high-er carrier mobility than silicon. They have been successfully employed in metal semiconductor (Schottky) devices, but have not been commercially employed in the more widely useful metal-insula-tor-semiconductor (MIS) devices.
A reason for this is that the native oxides o-F the III-V
materials do no-t form thermodynamically stable layers there-on in the way that silicon dioxide layers can be formed on silicon to form MIS devices. Silicon oxynitride and Si3N4 have been used as an insulating layer on III-V materials with limited success.
The passivation of III-V semiconductors has been a problem for the same reasons.
Thus it is highly desirable to find a material, and a means o producing it, which readily forms an insulating and passivating layer on III-V materials and thus provide the basis for the formation of MIS and Schottky devices, particularly MISFETS and MESFETS.
Similarly, it is desirable to reduce the surface com-ponent of currents in III-V opto-electronic devices by passivating the surface thereof.
It is also desirable to decrease the carrier recombi-nation velocity at the surface of III-V opto-electronic devices.
24~8~ 110.007.1 C. 724~ ~ C. 7~73 DISCLOSURE OF THE INVENTION
We have discovered that insu~ating, passivating and surface recombination velocity reducing pnictide rich layers can be formed on III-V semiconductor suhstrates by various methods that pnictide rich layers may be formed on any sub-strate. These include vacuum co-evaporation, sputtering, chemical vapor deposition, two-source vapor transport, deposition from a liquid melt and molecular beam deposition which produces the best results.
In particular, we have deposited an alkali metal poly-phosphide layer, namely KP15, on gallium arsenide, and gallium phosphide, indium phosphide and Si. We have also deposited insulating and passivating layers of high x alkali metal polyphosphides having the formula MPX where x is greater than 15 on these materials. For all practical purposes, such very high x materials are elemental phosphorus.
We have also deposited elemental phosphorus layers on substrates of gallium arsenide, gallium phosphide and indium phosphide using these same processes. We -fully expect that other III-V semiconductors may also be used as substrates.
We contemplate that other high pnictide polypnictides, particularly alkali metal polypnictides and other elemental pnictides comprising Group V atoms will also form useful insulating layers and semiconductors comprising a pnictide.
These pnictide materials are insulators or very high resistivity semiconductors, good film formers, and the pnictides, being group V materials, provide chemical continuity , matching order, and adhesion to the group V
atoms of the group V containing semiconductors.
The insulating layers of our invention have a resistiv-ity of greater than 10 10 ohm-cm. which is greater than the resistivity of the III-V materials.
We have successfully added another Si3N9 layer on top of a pnictide layer of III-V materials to provide a higher breakdown voltage.
_5_ ~ 11U.007.1 C.724~ h C.7fi73 The amorphous layers we employ have a 1ocal order not found before in amorphous pnictide films deposited on a III-V substrate. This is a layer-like puckered sheet-like structure similar to black phosphorus. This structure apparently forms at lo~l effective energies at the surface during the deposition. Thus, in vacuum evaporation and molecular beam deposi-tion when the surface is kept below approximatelv 200C this new layer-like puckered shee-t amorphous polyphosphide material forms. Similarly, at low energieC, and at ternperatures below appro~.imately 300C the same material forms in a sputterer. The material is formed by deposition from excess phosphorus supplied as P4 vapor, which is crac~.ed to P2 vapor by a heated cracker in the case of vacuum deposition and molecular beam deposition and is cracked by the plasma in a sputterer.
The surface layers according to our invention reduce the density of surface states, allows modulation of the depletion layer, reduce the surface barrier, increase the surface electron concentration, and increase the photoluminescence intensity and decrease the surface carrier recombination velocity.
The pnictide layers according to the invention may be used to insulate and passivate MIS and Schottky devices, particularly MISFETS and MESFETS, to reduce the surface current between different layers in III-V devices such as the dark current in reverse biased light detectiny diodes, particularly P-I-N and avalanche diodes, and to increase the efficiency of liyht emitting and light collecting opto-electronic devices, particularly solar cells, photocathodes, liyht emittiny diodes, lasers, and photo detectors.
- 5a -The invention provides a semiconductor devlce comprising a pnictide having a pnictide-rich layer deposited thereon, the pnictide-rich layer comprisiny either an elemental pnictide or the polypnictide MPX where M is an alkali metal, P is a pnictide and x ranges from 15 through infinity.
The invention further provides a method of insulating a semiconductor device comprising deposi-ting thereon a pnictide-rich insulating layer as described above.
. .
-6~ 110.007.1 C.72'14 ~ C.7473 OBJECTS OF THE INVENTION
It is therefore an object of the invention to provide insulating layers for semiconductors comprising pnictides.
Another object of the invention is to provide passivating layers for semiconductors comprising pnictides.
A further object of the invention is to provide a new form of amorphous pnictides.
Still another object of the invention is to provide improved MIS and Schottky devices; including MISFETS and MESFETS.
A still further object of the invention is to provide improved opto-electronic devices, including light emitting and light collecting devices such as P~I-N and avalanche diodes, solar cells, photocathodes, light emitting diodes and lasers.
The invention accordingly comprises the several steps and the relation of one or more of such steps with respect to each of the others, and the articles possessing the features, properties, and the relation of elements, which are exemplified in the following detailed disclosure. The scope of the invention is indicated in the claims.
~ C.7244 ~ C 7~i3 BRIEF DESCXIPTION OF THE DRAWINGS
For a fuller understanding o~ the nature and ~bjects of the invention reference should be made to the following detailed description taken in connection with the ac^ompanying drawings in which: .
Figure 1 is a plot Rama~ spectra of films grown at different substrate temperatures;
Figure 2 is a comparison of the Raman spectra of the film grown at low temperature with the theoretical prediction for a puckered sheet layer-like structure;
Figure 3 is a plot of normali~ed capacitance versus voltage for indium phosphide having a insulating layer thereon according to the present invention;
Figure ~ is a plot of the density of surface states versus energy for various possible insulating and passivating layers on indium phosphide accordiny to the present invention;
Figure 5 is a plot o~ normalized capacitance versus voltage for gallium arsenide having a layer deposited thereon according to the present invention;
Figure 6 is a comparison of the intensities of the Raman spectra of gallium arsenide with and without a film according to the present invention deposited thereon;
Figure 7 is a comparison of the line shape of the photoluminescence of gallium arsenide with and without a film according to the present invention deposited thereon;
Figure 8 is a comparison of the intensities of the photoluminescence of gallium arsenide with and without a film according to the present invention deposited thereon;
Figure 9 is a diagrammatic cross section of a MISFET
according to the present invention;
Figure 10 is a diagrammatic cross section of a MESFET
according to the present inventioni Figure 11 is a diagrammatic cross section of a MISFET
according to the present invention;
110.007.1 C.7~44 ~ C~7~73 Figure 12 is a diagrammatic cross section of a photo detecting diode according to the present invention;
Fiaure 13 is a diagrammatic cross section of another photo detecting diode according to the present invention;
Figure 14 is a diagrammatic cross section of a light collecting device according to the present invention; and Figure 15 is a diagrammatic cross section of a light emitting device according to the present invention.
The same reference characters refer to the same elements throughout the several views of the drawinys.
-9- lln . 007.1 C.7244 & C.7473 ~EST MODE FOR CARR~ING O~T THE INVENTION
We have found that pnictides films grown at relatively low temperatures, below 300C at low powers in sputtering an~ below 200~C in vacuum evaporation and molecular beam deposition, have a puc~;ered sheet-like, layer-like, struc-ture similar to black phosphorus. These amorphous films are deposited from phosphorus in the form of P4 vapor which is cracked by the plasma in sputtering and by a heated cracke~
in vacuum evaporation and molecular beam deposition.
~ eference should be had to the above-identi~ied co-pending applications VACUUM DEPOSITION PROCESSES EMPLOYING
A CONTINUOUS PNICTIDE DELIVERY SYSTFM, PARTICULARLY SPUTTER-ING, wherein accurate metered amounts of Pnictide4 species are delivered via an Argon carrier gas into an evacuated sputtering deposition chamber. The pnictide is maintained at a high temperature in a tall column by means of a constant oil bath and an inert gas, such as Argon, and passed through the column of pnictide and the Pnictide4 enriched carrier gas is delivered to the vacuum chamber. Films of pnictide, polypnictide and othex pnictide compounds may be deposited for semiconduc-tor, thin film transistors and other applica-tions, HIGH VACUUM DEPOSITION PROCESSES EMPLOYING A CONTIN-UOUS PNICTIDE DELIVEP~Y SY5TEM, wherein accurate metered amounts of Pnictide4 species are delivered via an Argon carrier gas into a high vacuum deposition chamber, which may be,for example, vacuum deposition apparatus or molecular beam epitaxy apparatus. The pressure is maintained below 10 3 Torr. The pnictide is maintained at a high temperature in a tall column by means of a constan-t temperature oil bath or tube ~urnace and the inert gas, such as Argon, is passed through the column of pnictide and the Pnictide~ enriched carrier gas is delivered to the vacuum chamber. This pnic-tide feed system may be used to supply Pnictide~ species as a control leak to various high vacuum film deposition processes. THERMAL CRACKERS FOR FORMING PNICTIDE FILMS IN
- 9a -HIGH VACUUM PROCESSES, wherein, fine quality pnictide films are produced in a high vacuum by evaporation and molecular beam epitaxy. In vacuum evaporation heated tungsten wire crackers are provided above the phosphorus boat and below the substrates. Amorphous pure phosphorus shiny red films have been deposited on glass, metalized glass, GaP, InP, GaAs and exhibit an optical edge at 2.0 eV. Films of KPX
where x is equal to 15 or greater than 15 are produced by utilizing a second baffled boat source containing the potassium graphite intercalate, KC8. Better quality films are formed in molecular beam epitaxy apparatus where a thermal cracker is located between the exit end of the pnictide collimator and the substrates.
We have found that pure phosphorus films, and presum-ably films of other pure pnictides, form the best insulation and passivating layers on III-V materials. This is because the pnictide layer is capable of matching the pnictides within the III-V semiconductors. Polypnictides, particular-ly MPX where M is an alkali metal and x ranges from 15 to infinity may also be used. We believe that our insulating and passivating films may be used on any compound or inter-metallic semiconductor comprising a pnictide. We have de-posited such films on the ~ 100~ and CllO~ of various III-V s~miconductors.
The best results to date have been with phosphorus films having a typical thickness of approximately 400A
deposit~d on III~V semiconductors solely from a phosphorus source by molecular beam deposition.
Figure 1 is a comparison of the Raman spectra of poly-phosphide films grown by vacuum evaporation (250C) and molecular beam deposition (20C). The solid line spectrum, when the substrate is at 250~C, is typical spectrum similar to amorphous red phosphorus indicating a local order com-prising parallel pentagonal tubes. The dotted line spectrum of the film formed at approximately 20~C indicates a much -10- ~J~ 110.007.1 C.724~ & C.7~73 different local order. Films produced by sputtering at temperatures less than that or equal to approximately 300C
have the same Raman spectra as the 20~C molecular beam depo-sition results sho~n in Figure 1.
Figure 2 is a comparison of the Raman spectrum of film grown at a substrate temperature of 20C, shown in do~ted lines, with a theoretical prediction of the spectrum of a puckered sheet-like, layer-like, structure simliar to black phosphorus.
We conclude that the local order of these films is the amorphous counterpart of the puckered layer-like, sheet-like, crystalline structure of black phosphorus.
This local order is simpler than that of the films described in the above-identified previously filed co-pending applications which have a local order comprising pentagonal tubes. We have found that the energy band gap of this new form of amorphous phosphorus according to our in-vention is approximately 1.7eV versus a bandgap of approxi-mately 2.0eV for amorphous red phosphorus. We have not detected any photoconductivity or photoluminescence from phosphorus films of this type. The films are shiny, hard and stable.
We concluded that these films would he good candidates for insulating and passivating layers for III-V materials.
Results of Electrical Measurements of Phosphorus Thin Films Grown On Indium Phosphide and Galium Arsenide Amorphous thin films of phosphorus of a typical thick-ness of 400A have been grown by molecular beam deposition on the ~100~ surface of InP and the ~00~ surface of GaAs, the substrates being maintained at room temperatuxe, approxi-mately 23~C.
The InP is specified by -the manuEacturer to contain
. .
This applica-tion is related to the following co-pending applications, assigned to the same assignee as this applica-tion. Canadian Patent Application entitled CATENATED PHOS-PHORUS MATERIALS, THEIR PREPARATION AND USE, AND SEMICONDUC-T~RAND OTHER DEVICES E~PLOYING THEM, Serial No. 418,657, filed December 29, 1982; GRAPHITE INTERCALATED ALKALI METAL VAPOR
SOURCES, filed concurrently; SPUTTERED SEMICONDUCTING FILMS
OF CATENATED PHOSPHORUS MATERIAL AND DEVICES FORMED THEREFROM, filed concurrently; and, LIQUID PHASE GROWTH OF CRYSTALLINE
POLYPHOSPHIDE, filed concurrently,also, the applications filed herewith of David G. Brock and John A. Baumann for THER~L
CRACKERS FOR FO~ING PNICTIDE FILMS IN HIGH VACUUM PROCESSES;
Mark A. Kuck and Susan W. Gersten for CONTINUOUS PNICTIDE
SOURCE AND DELIVERY SYSTEM FOR FILM DEPOSITION, PARTICULARLY
BY CHEMICAL VAPOR DEPOSITION; Mark A. Kuck and Susan W. Gersten for METHOD OF PREPARING HIGH PURITY WHITE PHOSPHORUS; Robert Parry, John A. Baumann and Rozalie Schachter for PNICTIDE
TRAP FOR VACUUM SYSTEMS; and, Mark A. Kuck, Susan W. Gersten, John A. Baumann and Paul M. Raccah for HIGH VACUUM DEPOSITION
PROCESSES EMPLOYING A CONTINUOUS PNICTIDE DELIVERY SYSTEM.
.~ - 2 ~ ) 0 7 . 1 C. 7244 & C. 7473 TECHN I CAL F' I ELD
This application relates to the passivation and insu-lation of III-V devices with pnictides, particularly amor-phous pnictides having a layer-like puckered sheet-like structure; compound, intermetallic semiconductors, particu-larly III~V semiconductors; to pnictide and polypnictides, particularly phosphorus and polyphosphides; to MIS and metal-semiconductor (Schottky) devices, particularly MISFETS
and MFSFETS; to light absorbing diodes, particularly P-I-N
and avalanche detector diodes, solar cells, and photo cathodes; and to light emitting diodes, and lasers.
9~ !
_3~ 110.007.1 C.72~ ~ C.7~73 BACKGROUND ART
III-V semiconductors have desirable pxoperties of high-er carrier mobility than silicon. They have been successfully employed in metal semiconductor (Schottky) devices, but have not been commercially employed in the more widely useful metal-insula-tor-semiconductor (MIS) devices.
A reason for this is that the native oxides o-F the III-V
materials do no-t form thermodynamically stable layers there-on in the way that silicon dioxide layers can be formed on silicon to form MIS devices. Silicon oxynitride and Si3N4 have been used as an insulating layer on III-V materials with limited success.
The passivation of III-V semiconductors has been a problem for the same reasons.
Thus it is highly desirable to find a material, and a means o producing it, which readily forms an insulating and passivating layer on III-V materials and thus provide the basis for the formation of MIS and Schottky devices, particularly MISFETS and MESFETS.
Similarly, it is desirable to reduce the surface com-ponent of currents in III-V opto-electronic devices by passivating the surface thereof.
It is also desirable to decrease the carrier recombi-nation velocity at the surface of III-V opto-electronic devices.
24~8~ 110.007.1 C. 724~ ~ C. 7~73 DISCLOSURE OF THE INVENTION
We have discovered that insu~ating, passivating and surface recombination velocity reducing pnictide rich layers can be formed on III-V semiconductor suhstrates by various methods that pnictide rich layers may be formed on any sub-strate. These include vacuum co-evaporation, sputtering, chemical vapor deposition, two-source vapor transport, deposition from a liquid melt and molecular beam deposition which produces the best results.
In particular, we have deposited an alkali metal poly-phosphide layer, namely KP15, on gallium arsenide, and gallium phosphide, indium phosphide and Si. We have also deposited insulating and passivating layers of high x alkali metal polyphosphides having the formula MPX where x is greater than 15 on these materials. For all practical purposes, such very high x materials are elemental phosphorus.
We have also deposited elemental phosphorus layers on substrates of gallium arsenide, gallium phosphide and indium phosphide using these same processes. We -fully expect that other III-V semiconductors may also be used as substrates.
We contemplate that other high pnictide polypnictides, particularly alkali metal polypnictides and other elemental pnictides comprising Group V atoms will also form useful insulating layers and semiconductors comprising a pnictide.
These pnictide materials are insulators or very high resistivity semiconductors, good film formers, and the pnictides, being group V materials, provide chemical continuity , matching order, and adhesion to the group V
atoms of the group V containing semiconductors.
The insulating layers of our invention have a resistiv-ity of greater than 10 10 ohm-cm. which is greater than the resistivity of the III-V materials.
We have successfully added another Si3N9 layer on top of a pnictide layer of III-V materials to provide a higher breakdown voltage.
_5_ ~ 11U.007.1 C.724~ h C.7fi73 The amorphous layers we employ have a 1ocal order not found before in amorphous pnictide films deposited on a III-V substrate. This is a layer-like puckered sheet-like structure similar to black phosphorus. This structure apparently forms at lo~l effective energies at the surface during the deposition. Thus, in vacuum evaporation and molecular beam deposi-tion when the surface is kept below approximatelv 200C this new layer-like puckered shee-t amorphous polyphosphide material forms. Similarly, at low energieC, and at ternperatures below appro~.imately 300C the same material forms in a sputterer. The material is formed by deposition from excess phosphorus supplied as P4 vapor, which is crac~.ed to P2 vapor by a heated cracker in the case of vacuum deposition and molecular beam deposition and is cracked by the plasma in a sputterer.
The surface layers according to our invention reduce the density of surface states, allows modulation of the depletion layer, reduce the surface barrier, increase the surface electron concentration, and increase the photoluminescence intensity and decrease the surface carrier recombination velocity.
The pnictide layers according to the invention may be used to insulate and passivate MIS and Schottky devices, particularly MISFETS and MESFETS, to reduce the surface current between different layers in III-V devices such as the dark current in reverse biased light detectiny diodes, particularly P-I-N and avalanche diodes, and to increase the efficiency of liyht emitting and light collecting opto-electronic devices, particularly solar cells, photocathodes, liyht emittiny diodes, lasers, and photo detectors.
- 5a -The invention provides a semiconductor devlce comprising a pnictide having a pnictide-rich layer deposited thereon, the pnictide-rich layer comprisiny either an elemental pnictide or the polypnictide MPX where M is an alkali metal, P is a pnictide and x ranges from 15 through infinity.
The invention further provides a method of insulating a semiconductor device comprising deposi-ting thereon a pnictide-rich insulating layer as described above.
. .
-6~ 110.007.1 C.72'14 ~ C.7473 OBJECTS OF THE INVENTION
It is therefore an object of the invention to provide insulating layers for semiconductors comprising pnictides.
Another object of the invention is to provide passivating layers for semiconductors comprising pnictides.
A further object of the invention is to provide a new form of amorphous pnictides.
Still another object of the invention is to provide improved MIS and Schottky devices; including MISFETS and MESFETS.
A still further object of the invention is to provide improved opto-electronic devices, including light emitting and light collecting devices such as P~I-N and avalanche diodes, solar cells, photocathodes, light emitting diodes and lasers.
The invention accordingly comprises the several steps and the relation of one or more of such steps with respect to each of the others, and the articles possessing the features, properties, and the relation of elements, which are exemplified in the following detailed disclosure. The scope of the invention is indicated in the claims.
~ C.7244 ~ C 7~i3 BRIEF DESCXIPTION OF THE DRAWINGS
For a fuller understanding o~ the nature and ~bjects of the invention reference should be made to the following detailed description taken in connection with the ac^ompanying drawings in which: .
Figure 1 is a plot Rama~ spectra of films grown at different substrate temperatures;
Figure 2 is a comparison of the Raman spectra of the film grown at low temperature with the theoretical prediction for a puckered sheet layer-like structure;
Figure 3 is a plot of normali~ed capacitance versus voltage for indium phosphide having a insulating layer thereon according to the present invention;
Figure ~ is a plot of the density of surface states versus energy for various possible insulating and passivating layers on indium phosphide accordiny to the present invention;
Figure 5 is a plot o~ normalized capacitance versus voltage for gallium arsenide having a layer deposited thereon according to the present invention;
Figure 6 is a comparison of the intensities of the Raman spectra of gallium arsenide with and without a film according to the present invention deposited thereon;
Figure 7 is a comparison of the line shape of the photoluminescence of gallium arsenide with and without a film according to the present invention deposited thereon;
Figure 8 is a comparison of the intensities of the photoluminescence of gallium arsenide with and without a film according to the present invention deposited thereon;
Figure 9 is a diagrammatic cross section of a MISFET
according to the present invention;
Figure 10 is a diagrammatic cross section of a MESFET
according to the present inventioni Figure 11 is a diagrammatic cross section of a MISFET
according to the present invention;
110.007.1 C.7~44 ~ C~7~73 Figure 12 is a diagrammatic cross section of a photo detecting diode according to the present invention;
Fiaure 13 is a diagrammatic cross section of another photo detecting diode according to the present invention;
Figure 14 is a diagrammatic cross section of a light collecting device according to the present invention; and Figure 15 is a diagrammatic cross section of a light emitting device according to the present invention.
The same reference characters refer to the same elements throughout the several views of the drawinys.
-9- lln . 007.1 C.7244 & C.7473 ~EST MODE FOR CARR~ING O~T THE INVENTION
We have found that pnictides films grown at relatively low temperatures, below 300C at low powers in sputtering an~ below 200~C in vacuum evaporation and molecular beam deposition, have a puc~;ered sheet-like, layer-like, struc-ture similar to black phosphorus. These amorphous films are deposited from phosphorus in the form of P4 vapor which is cracked by the plasma in sputtering and by a heated cracke~
in vacuum evaporation and molecular beam deposition.
~ eference should be had to the above-identi~ied co-pending applications VACUUM DEPOSITION PROCESSES EMPLOYING
A CONTINUOUS PNICTIDE DELIVERY SYSTFM, PARTICULARLY SPUTTER-ING, wherein accurate metered amounts of Pnictide4 species are delivered via an Argon carrier gas into an evacuated sputtering deposition chamber. The pnictide is maintained at a high temperature in a tall column by means of a constant oil bath and an inert gas, such as Argon, and passed through the column of pnictide and the Pnictide4 enriched carrier gas is delivered to the vacuum chamber. Films of pnictide, polypnictide and othex pnictide compounds may be deposited for semiconduc-tor, thin film transistors and other applica-tions, HIGH VACUUM DEPOSITION PROCESSES EMPLOYING A CONTIN-UOUS PNICTIDE DELIVEP~Y SY5TEM, wherein accurate metered amounts of Pnictide4 species are delivered via an Argon carrier gas into a high vacuum deposition chamber, which may be,for example, vacuum deposition apparatus or molecular beam epitaxy apparatus. The pressure is maintained below 10 3 Torr. The pnictide is maintained at a high temperature in a tall column by means of a constan-t temperature oil bath or tube ~urnace and the inert gas, such as Argon, is passed through the column of pnictide and the Pnictide~ enriched carrier gas is delivered to the vacuum chamber. This pnic-tide feed system may be used to supply Pnictide~ species as a control leak to various high vacuum film deposition processes. THERMAL CRACKERS FOR FORMING PNICTIDE FILMS IN
- 9a -HIGH VACUUM PROCESSES, wherein, fine quality pnictide films are produced in a high vacuum by evaporation and molecular beam epitaxy. In vacuum evaporation heated tungsten wire crackers are provided above the phosphorus boat and below the substrates. Amorphous pure phosphorus shiny red films have been deposited on glass, metalized glass, GaP, InP, GaAs and exhibit an optical edge at 2.0 eV. Films of KPX
where x is equal to 15 or greater than 15 are produced by utilizing a second baffled boat source containing the potassium graphite intercalate, KC8. Better quality films are formed in molecular beam epitaxy apparatus where a thermal cracker is located between the exit end of the pnictide collimator and the substrates.
We have found that pure phosphorus films, and presum-ably films of other pure pnictides, form the best insulation and passivating layers on III-V materials. This is because the pnictide layer is capable of matching the pnictides within the III-V semiconductors. Polypnictides, particular-ly MPX where M is an alkali metal and x ranges from 15 to infinity may also be used. We believe that our insulating and passivating films may be used on any compound or inter-metallic semiconductor comprising a pnictide. We have de-posited such films on the ~ 100~ and CllO~ of various III-V s~miconductors.
The best results to date have been with phosphorus films having a typical thickness of approximately 400A
deposit~d on III~V semiconductors solely from a phosphorus source by molecular beam deposition.
Figure 1 is a comparison of the Raman spectra of poly-phosphide films grown by vacuum evaporation (250C) and molecular beam deposition (20C). The solid line spectrum, when the substrate is at 250~C, is typical spectrum similar to amorphous red phosphorus indicating a local order com-prising parallel pentagonal tubes. The dotted line spectrum of the film formed at approximately 20~C indicates a much -10- ~J~ 110.007.1 C.724~ & C.7~73 different local order. Films produced by sputtering at temperatures less than that or equal to approximately 300C
have the same Raman spectra as the 20~C molecular beam depo-sition results sho~n in Figure 1.
Figure 2 is a comparison of the Raman spectrum of film grown at a substrate temperature of 20C, shown in do~ted lines, with a theoretical prediction of the spectrum of a puckered sheet-like, layer-like, structure simliar to black phosphorus.
We conclude that the local order of these films is the amorphous counterpart of the puckered layer-like, sheet-like, crystalline structure of black phosphorus.
This local order is simpler than that of the films described in the above-identified previously filed co-pending applications which have a local order comprising pentagonal tubes. We have found that the energy band gap of this new form of amorphous phosphorus according to our in-vention is approximately 1.7eV versus a bandgap of approxi-mately 2.0eV for amorphous red phosphorus. We have not detected any photoconductivity or photoluminescence from phosphorus films of this type. The films are shiny, hard and stable.
We concluded that these films would he good candidates for insulating and passivating layers for III-V materials.
Results of Electrical Measurements of Phosphorus Thin Films Grown On Indium Phosphide and Galium Arsenide Amorphous thin films of phosphorus of a typical thick-ness of 400A have been grown by molecular beam deposition on the ~100~ surface of InP and the ~00~ surface of GaAs, the substrates being maintained at room temperatuxe, approxi-mately 23~C.
The InP is specified by -the manuEacturer to contain
2 x 1015 free electrons per cubic centimeter; the galli~m arsenide to contain 2 x 1016 free electrons per cubic centimeter.
t~
o . on7 . l C.724~ & C.7~73 Figure 3 is a comparison of the theoretical Isolid line) and experi~ental (dotted line) data plots of normalized capacitance versus voltage for an ~IS structure on InP. The solid line (theoretical) curve is computed for the case of ideal conditions, namely a perfect insulatio and a negligibly small density of surface states.
Excellent agreement between experiment and theory is shown in these high frequency C-V curves. This indicates that a low density of surface states has been achieved by the phosphorus layer on the InP and that the phosphorus layer allows modulation of the depletion layer.
The density of the surface states can be calculated by Terman's method. Figure ~ is a comparison of the density of surface states for passivation with SiO2, ~1203, P3~5, and P
(our phosphorus layer) and it can be seen tha~ we have achieved the lowest density of surface states reported on III-V materials.
EC in Figure ~ is the energy of the conduction band and EV is the energy of the valence band.
~ igure 5 is such a comparison for GaAs. It will be seen that the depletion laver has been modulated but that the density of surface states has not been reduced as much as in the case of InP.
Passivation Studies of Phosphorus Lavers on GaAs Fi~ure ~ is a comparison of the intensities of the Raman spectra of GaAs with and without our phosphorus thin film layer. That of the plain GaAs is sho~7n by dotted line and GaAs, that having our phosphorus film, is shown by the solid line.
'rhese data sug~ests a reduction of the surface barrier of the GaAs when the phosphorus barrier is present. This indicates that the phosphorus layer can be used in MIS and Schottky devices and -Eor the improvement o~ the perfor~ance of opto-electronic devices.
Figure 7 is a comparison of the line shape of the photoluminescence of GaAs with and without a phosphorus thin -12~ 110.007.1 C~724~ ~ C.7~73 film; GaAs alone is shown dotted; GaAs with our phosphorus in solid.
It c~n be concluded from this diagram that there is an increase of the electron concentration at the surface of the GaAs when a phosphorus thin film is present. Since this behavior is expected if the surface barrier has decreased, this is consis-tent with the results shown in Figure 6.
Fi~ure 8 shows that there is an increase in the inten-sity of the photoluminescence produced from GaAs when phos-phorus thin film is present. The photoluminescence inten-sity of GaAs alone is shown by the dotted line and intensity with the phosphorus film is shown by the solid line.
This increase in photoluminescence again indicates a decrease in number of surface states when the phosphorus thin film is present. Thi.s result is consistent with Figures 6 and 7.
The phosphorus film of Figures 6, 7, and ~ was gr~wn on the C 111 ~ surface of GaAs specified by the manufacturer to have 7 x 1017 free electrons per cubic centimeter.
We conclude that the GaAs surface barrier has been reduced when a phosphorus thin f.ilm having a layer-like, puckered sheet-like local order is deposited on the GaAs.
Our experiments indicate a reduction of one order of magnitude in the density of the surface states.
The increase of the photoluminescence intensity we have noted is extremely important for opto-electronic devices.
It means that there is a decrease in the surface recom~1-nation velocity.
Thus we have shown that a polypnictide surface film having a layer-like, puckered sheet-like local order deposi-ted upon III-V semiconductors produces a reduction in the density of surface states, allows the modulation of the depletion layer; reduces the surface barrier, increases the free electron concentration at the surface, increases the photoluminescence intensity, and decreases the surface recombination velocity~
-13~ 110.00-7.1 C.72~4 & C.7~73 Devices ~ccordinq To rrhe Invention _ Now referring to Figure 9, a MISFET according to the invention comprises a body of III-V semiconductincJ material 20, islands 22 of high con~uctivity, a conduction channel 24 therebetween, source and drain metal ccntac-ts 26 sate metal contact 28, insulating layer 30 and passivating layers 32.
Accordin~ to the invention the I layer 30 and the passivating layers 32 which may be unitary and deposited on the substrate 20 at the same time, are the new amorphous layer-like phosphorus or other layer-li~e pnictide-rich materials, such as MPl5 where M is an alkali metal and MPX
where M is an alkali metal and x varies from 15 to infinity, particularly where the alkali metal is potassium.
Figure lO shows a ~SFET according to the invention.
This comprises a III-V serniconductor body 3~, islands 36 of high conductivity, source and drain contacts 38, gate contact ~0, conduction channel 42 and passivating layers 4~
according to the invention. The layers 44 reduce the surface currents from the source and the drain to the gate.
According to our invention another MIS device utilizing a III-V substrate may be formed as shown in Figure ll.
There the III-V substrate, generally indicated at 2, is appropriately doped to form P regions 4 and N regions 6 therein. The polypnictide or elemental pnictide layer 8 is then deposited thereon, according to our invention, appropriately masked and etched, and then a metal such as aluminwn is deposited to form drain lO, gate 12, and source 14. ~hose skilled in the art will realize that many other MIS configurations and devices may be fabricated using a pnictide-rich insulating layex according to our invention.
Most III-V semiconductor junction devices have ei-ther a planar or mesa configuration where the ed~es of the junction or junctions are exposed on the device surface.
~or some critical applications (e.g., PIN or avalanche photo detector diodes for li~htwave communications), it is imperative that the dark current (i.e., current with no illumination) under operating reverse bias be as low as -14- ~ 110.007.1 C.72~4 & C.7~73 possible in order ~o assure low device noise. Since the surface current component of this dark current can be significant, it is desirable to rninimize the surface current through "passivation" of the surface (i.e., reduction or elimination of surface current paths). This is done by depositing a thin film of a suitable insulating material onto the exposed device surface. Materials currently used for this on III-V devices include SiO2, Si3N4, polyimide, and pho-toresist, but none are able to eontrollably and reproducibly reduce th~ surface current to -the very low values needed.
According to our invention we use a thin film of polypnictide material (e.g. 7 phosphorus, MP15, or MP where x is 15 or greater and where M is an alkali metal sueh as potassium) for III-V devices of this type. These materials have: l) good physical and chemical stability, 2~ high electrical resistivity, and 3) a preferred tendency or "affinity" for the polypnictides to grow on III-V material substrates.
Now referring to Figure 12, a body of III-V
semiconduetor material 46 containiny various layers has metal contacts 48 and 50 deposited thereon. To reduce the surface current component which would provide leakage between the layers 52, 54 and 56 we deposit a film 58 of pnictide according to our invention.
The deviee illustrated in Figure 12 may be, for example, a P-I-N photo detecting diode or an avalanche diode.
The deviee illustrated in Figure 12 has a planar structure. A device having a mesa strueture is shown in Figure 13. It eomprises various layer5 58~ 60, 62, 64, 66, and 68 of III-V material and me-tal contacts 70 and 72.
Again, in order to preven-t surface currents aeross the interfaces 74, 76, 78, 80, and 82 between the layers 58, 60, 62, 64, 66, and 68, we provide pnic-tide-rieh passivating layers 84 and 86.
The device illustrated in Fiyure 13 may be for example a photo deteeting P-I-N diode or an avalanehe doide.
~ .72~ ~ C.7~i3 Bo-th Fi~ure 12 and 13 illustrate the use of our novel pnictide layers to lower surf~ce currents in opto-electronic devices.
Another important application of our invention to opto-electronic devices is based on the fact that our novel pnictide layers reduce the surface recombination velocity ~t the surfaces of III-V semiconductors to which they are appli~d. We have noted an incxease by a fac-tor of 2.5 in the measured photoluminescence intensity of heavily doped GaAs with an amorphous thin film of layer-like puckered sheet-like phosphorus grown on the <1l1> surface. This increase in the photoluminescence intenslty indicates a decrease recombination velocity at the surface. It is known that the sma:Ller the surface recombination velocity the better the performance of the opto-electronic devices such as light emitting diodes, lasers, solar cells, photo cathodes and photo detectors utili~ing III-V semiconductors.
According to our invention the layer of our new layer-like form of pnictide-rich material would be applied to the light emitting or light collecting surface of the opto-electronic device.
Thus referring to Figure 1~, a light collecting device according to our invention comprises a body 88 of a compound intermetallic or III-V semiconductor comprising a pnic-tide and a pnictide-rich layer 90 deposited on the ligh-t collecting surface 92 thereof.
Similarly, as illustrated in Figure 15, a light emit-ting device according to our invention again comprises a body 9~ of a compound intermetallic semiconductor comprising a pnic-tide-rich layer 96 deposited on the liyht emitting surface 98 thereof. If the light collecting or light emi-t-ting device has two or more semiconductor layers ~hich emerge on the surfaces 9~ or 98 as indicated by the inter-sections between them 100 and 102, then the layers 90 and 96 also reduce surface currents. The layers 90 and 96 m~y also be used to reduce surface currents be-tween contacts, not shown, as in the devices of Fîgures 9 through 13.
-16- ~ ~?o~ 110~007~ 1 C~o724~ E, C.7'173 Thus we have discl.osed the insulation and passivation of compound and in-termetall.ic semiconductors comprising a pnictide, particular~y III V semiconductors; disclosed a new form of pnictide-rich thin films having a layer~ e, puck-ered sheet-like local order; we have shown that such layers when deposited on pnictide based semiconductors reduce the density oE surface states, allows modulation of the depletion layer, decrease the surface barrier, increase the carrier concentration at the surface, increase the photoluminescence, and decrease the carrier recombination velocity at the surface; we have disclosed MIS and Schottky devi.ces, particularly MISFETS and MESFETS utilizing pnictide rich layers for insulation and passivation; we have disclosed various electro-optical devices utilizing such layers for insula-tion, passivation, increased performance and lifetime.
The semiconductors utilized in our invention comprising pnictides are commonly called intermetallic or compound.
III-V semiconductors which are compound, intermetallic, semiconductors comprising elements from column III and column V of the periodic table such as the binary semiconductor aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium phosphide, gallium arsenide, gallium antimonide, indium phosphi.de, indium arsenide and indium antimonide, the ternary and the quaternary semiconductors. By pnictide we mean those elements from column V of the periodic table, namely nitrogen, phosphorus, arsenic, antimony ancl bismuth.
It will thus be seen that the objects set forth above, among those made apparent from the preceding description/
are efficientl~ obtained and, since certain changes may be made in carrying out the above methods and in the articles set ~orth without departing from -the scope o the invention, it is intended that all matter contained in the above des-cription or shown in the accompanyiny drawing, shall be interpreted as illustrative ana not in a limiting sense.
-17~ .007.1 C.72~ ~ C 7~73 It is also to be understocd that the following claims are intended to cover all of the generic and specific fea-tures of the invention herein described, and all statements of the scope of the invention which, as a matter of lan-guage, miyht be said to fall the~ebetween.
Particularly, it is to be understood that in the claims ingredients or compounds recited in the singular are in-tend-ed to include compatible mixtures of such ingredients wherever the sense permits.
Having described our invention what we claim as new and desire to secure by letters patent is:
t~
o . on7 . l C.724~ & C.7~73 Figure 3 is a comparison of the theoretical Isolid line) and experi~ental (dotted line) data plots of normalized capacitance versus voltage for an ~IS structure on InP. The solid line (theoretical) curve is computed for the case of ideal conditions, namely a perfect insulatio and a negligibly small density of surface states.
Excellent agreement between experiment and theory is shown in these high frequency C-V curves. This indicates that a low density of surface states has been achieved by the phosphorus layer on the InP and that the phosphorus layer allows modulation of the depletion layer.
The density of the surface states can be calculated by Terman's method. Figure ~ is a comparison of the density of surface states for passivation with SiO2, ~1203, P3~5, and P
(our phosphorus layer) and it can be seen tha~ we have achieved the lowest density of surface states reported on III-V materials.
EC in Figure ~ is the energy of the conduction band and EV is the energy of the valence band.
~ igure 5 is such a comparison for GaAs. It will be seen that the depletion laver has been modulated but that the density of surface states has not been reduced as much as in the case of InP.
Passivation Studies of Phosphorus Lavers on GaAs Fi~ure ~ is a comparison of the intensities of the Raman spectra of GaAs with and without our phosphorus thin film layer. That of the plain GaAs is sho~7n by dotted line and GaAs, that having our phosphorus film, is shown by the solid line.
'rhese data sug~ests a reduction of the surface barrier of the GaAs when the phosphorus barrier is present. This indicates that the phosphorus layer can be used in MIS and Schottky devices and -Eor the improvement o~ the perfor~ance of opto-electronic devices.
Figure 7 is a comparison of the line shape of the photoluminescence of GaAs with and without a phosphorus thin -12~ 110.007.1 C~724~ ~ C.7~73 film; GaAs alone is shown dotted; GaAs with our phosphorus in solid.
It c~n be concluded from this diagram that there is an increase of the electron concentration at the surface of the GaAs when a phosphorus thin film is present. Since this behavior is expected if the surface barrier has decreased, this is consis-tent with the results shown in Figure 6.
Fi~ure 8 shows that there is an increase in the inten-sity of the photoluminescence produced from GaAs when phos-phorus thin film is present. The photoluminescence inten-sity of GaAs alone is shown by the dotted line and intensity with the phosphorus film is shown by the solid line.
This increase in photoluminescence again indicates a decrease in number of surface states when the phosphorus thin film is present. Thi.s result is consistent with Figures 6 and 7.
The phosphorus film of Figures 6, 7, and ~ was gr~wn on the C 111 ~ surface of GaAs specified by the manufacturer to have 7 x 1017 free electrons per cubic centimeter.
We conclude that the GaAs surface barrier has been reduced when a phosphorus thin f.ilm having a layer-like, puckered sheet-like local order is deposited on the GaAs.
Our experiments indicate a reduction of one order of magnitude in the density of the surface states.
The increase of the photoluminescence intensity we have noted is extremely important for opto-electronic devices.
It means that there is a decrease in the surface recom~1-nation velocity.
Thus we have shown that a polypnictide surface film having a layer-like, puckered sheet-like local order deposi-ted upon III-V semiconductors produces a reduction in the density of surface states, allows the modulation of the depletion layer; reduces the surface barrier, increases the free electron concentration at the surface, increases the photoluminescence intensity, and decreases the surface recombination velocity~
-13~ 110.00-7.1 C.72~4 & C.7~73 Devices ~ccordinq To rrhe Invention _ Now referring to Figure 9, a MISFET according to the invention comprises a body of III-V semiconductincJ material 20, islands 22 of high con~uctivity, a conduction channel 24 therebetween, source and drain metal ccntac-ts 26 sate metal contact 28, insulating layer 30 and passivating layers 32.
Accordin~ to the invention the I layer 30 and the passivating layers 32 which may be unitary and deposited on the substrate 20 at the same time, are the new amorphous layer-like phosphorus or other layer-li~e pnictide-rich materials, such as MPl5 where M is an alkali metal and MPX
where M is an alkali metal and x varies from 15 to infinity, particularly where the alkali metal is potassium.
Figure lO shows a ~SFET according to the invention.
This comprises a III-V serniconductor body 3~, islands 36 of high conductivity, source and drain contacts 38, gate contact ~0, conduction channel 42 and passivating layers 4~
according to the invention. The layers 44 reduce the surface currents from the source and the drain to the gate.
According to our invention another MIS device utilizing a III-V substrate may be formed as shown in Figure ll.
There the III-V substrate, generally indicated at 2, is appropriately doped to form P regions 4 and N regions 6 therein. The polypnictide or elemental pnictide layer 8 is then deposited thereon, according to our invention, appropriately masked and etched, and then a metal such as aluminwn is deposited to form drain lO, gate 12, and source 14. ~hose skilled in the art will realize that many other MIS configurations and devices may be fabricated using a pnictide-rich insulating layex according to our invention.
Most III-V semiconductor junction devices have ei-ther a planar or mesa configuration where the ed~es of the junction or junctions are exposed on the device surface.
~or some critical applications (e.g., PIN or avalanche photo detector diodes for li~htwave communications), it is imperative that the dark current (i.e., current with no illumination) under operating reverse bias be as low as -14- ~ 110.007.1 C.72~4 & C.7~73 possible in order ~o assure low device noise. Since the surface current component of this dark current can be significant, it is desirable to rninimize the surface current through "passivation" of the surface (i.e., reduction or elimination of surface current paths). This is done by depositing a thin film of a suitable insulating material onto the exposed device surface. Materials currently used for this on III-V devices include SiO2, Si3N4, polyimide, and pho-toresist, but none are able to eontrollably and reproducibly reduce th~ surface current to -the very low values needed.
According to our invention we use a thin film of polypnictide material (e.g. 7 phosphorus, MP15, or MP where x is 15 or greater and where M is an alkali metal sueh as potassium) for III-V devices of this type. These materials have: l) good physical and chemical stability, 2~ high electrical resistivity, and 3) a preferred tendency or "affinity" for the polypnictides to grow on III-V material substrates.
Now referring to Figure 12, a body of III-V
semiconduetor material 46 containiny various layers has metal contacts 48 and 50 deposited thereon. To reduce the surface current component which would provide leakage between the layers 52, 54 and 56 we deposit a film 58 of pnictide according to our invention.
The deviee illustrated in Figure 12 may be, for example, a P-I-N photo detecting diode or an avalanche diode.
The deviee illustrated in Figure 12 has a planar structure. A device having a mesa strueture is shown in Figure 13. It eomprises various layer5 58~ 60, 62, 64, 66, and 68 of III-V material and me-tal contacts 70 and 72.
Again, in order to preven-t surface currents aeross the interfaces 74, 76, 78, 80, and 82 between the layers 58, 60, 62, 64, 66, and 68, we provide pnic-tide-rieh passivating layers 84 and 86.
The device illustrated in Fiyure 13 may be for example a photo deteeting P-I-N diode or an avalanehe doide.
~ .72~ ~ C.7~i3 Bo-th Fi~ure 12 and 13 illustrate the use of our novel pnictide layers to lower surf~ce currents in opto-electronic devices.
Another important application of our invention to opto-electronic devices is based on the fact that our novel pnictide layers reduce the surface recombination velocity ~t the surfaces of III-V semiconductors to which they are appli~d. We have noted an incxease by a fac-tor of 2.5 in the measured photoluminescence intensity of heavily doped GaAs with an amorphous thin film of layer-like puckered sheet-like phosphorus grown on the <1l1> surface. This increase in the photoluminescence intenslty indicates a decrease recombination velocity at the surface. It is known that the sma:Ller the surface recombination velocity the better the performance of the opto-electronic devices such as light emitting diodes, lasers, solar cells, photo cathodes and photo detectors utili~ing III-V semiconductors.
According to our invention the layer of our new layer-like form of pnictide-rich material would be applied to the light emitting or light collecting surface of the opto-electronic device.
Thus referring to Figure 1~, a light collecting device according to our invention comprises a body 88 of a compound intermetallic or III-V semiconductor comprising a pnic-tide and a pnictide-rich layer 90 deposited on the ligh-t collecting surface 92 thereof.
Similarly, as illustrated in Figure 15, a light emit-ting device according to our invention again comprises a body 9~ of a compound intermetallic semiconductor comprising a pnic-tide-rich layer 96 deposited on the liyht emitting surface 98 thereof. If the light collecting or light emi-t-ting device has two or more semiconductor layers ~hich emerge on the surfaces 9~ or 98 as indicated by the inter-sections between them 100 and 102, then the layers 90 and 96 also reduce surface currents. The layers 90 and 96 m~y also be used to reduce surface currents be-tween contacts, not shown, as in the devices of Fîgures 9 through 13.
-16- ~ ~?o~ 110~007~ 1 C~o724~ E, C.7'173 Thus we have discl.osed the insulation and passivation of compound and in-termetall.ic semiconductors comprising a pnictide, particular~y III V semiconductors; disclosed a new form of pnictide-rich thin films having a layer~ e, puck-ered sheet-like local order; we have shown that such layers when deposited on pnictide based semiconductors reduce the density oE surface states, allows modulation of the depletion layer, decrease the surface barrier, increase the carrier concentration at the surface, increase the photoluminescence, and decrease the carrier recombination velocity at the surface; we have disclosed MIS and Schottky devi.ces, particularly MISFETS and MESFETS utilizing pnictide rich layers for insulation and passivation; we have disclosed various electro-optical devices utilizing such layers for insula-tion, passivation, increased performance and lifetime.
The semiconductors utilized in our invention comprising pnictides are commonly called intermetallic or compound.
III-V semiconductors which are compound, intermetallic, semiconductors comprising elements from column III and column V of the periodic table such as the binary semiconductor aluminum phosphide, aluminum arsenide, aluminum antimonide, gallium phosphide, gallium arsenide, gallium antimonide, indium phosphi.de, indium arsenide and indium antimonide, the ternary and the quaternary semiconductors. By pnictide we mean those elements from column V of the periodic table, namely nitrogen, phosphorus, arsenic, antimony ancl bismuth.
It will thus be seen that the objects set forth above, among those made apparent from the preceding description/
are efficientl~ obtained and, since certain changes may be made in carrying out the above methods and in the articles set ~orth without departing from -the scope o the invention, it is intended that all matter contained in the above des-cription or shown in the accompanyiny drawing, shall be interpreted as illustrative ana not in a limiting sense.
-17~ .007.1 C.72~ ~ C 7~73 It is also to be understocd that the following claims are intended to cover all of the generic and specific fea-tures of the invention herein described, and all statements of the scope of the invention which, as a matter of lan-guage, miyht be said to fall the~ebetween.
Particularly, it is to be understood that in the claims ingredients or compounds recited in the singular are in-tend-ed to include compatible mixtures of such ingredients wherever the sense permits.
Having described our invention what we claim as new and desire to secure by letters patent is:
Claims (117)
1. A semiconductor device comprising a pnictide having a pnictide-rich layer deposited thereon, said pnictide-rich layer comprising either an elemental pnictide or the polypnictide MPx where M is an alkali metal, P is a pnictide and x ranges from 15 through infinity.
2. The semiconductor device defined in claim 1 wherein said semiconductor comprises a III-V semiconductor.
3. The semiconductor device defined in claim 1 wherein said semiconductor is a compound semiconductor comprising a pnictide.
4. The semiconductor device defined in claim 1 wherein said layer is an insulator.
5. The semiconductor device defined in claim 1 wherein said layer passivates the surface of the semiconductor.
6. The semiconductor device defined in claim 1 wherein said layer reduces the density of surface static at the surface of the semiconductor.
7. The semiconductor device defined in claim 1 wherein said layer reduces the recombination velocity of charge carriers at the surface of the semiconductor.
8. The semiconductor device defined in claim 1 wherein said layer increases the photoluminescence of said semi-conductor.
9. The semiconductor device defined in claim 1 in a metal-insulated-semiconductor device.
10. The semiconductor device defined in claim 1 in a metal semiconductor device.
11. The semiconductor device defined in claim 1 in a MISFET.
12. The semiconductor device defined in claim 1 in a MESFET.
13. The semiconductor device defined in claim l in an opto-electronic device.
14. The semiconductor device defined in claim 1 in a light emitting device.
15. The semiconductor device defined in claim 1 in a light receiving device.
16. The semiconductor device defined in claim 1 in a P-I-N diode.
17. The semiconductor device defined in claim 1 in an avalanche diode.
18. The semiconductor device defined in claim 1 in a solar cell.
19. The semiconductor device defined in claim 1 in a laser.
20. The semiconductor device defined in claim 1 in a photocathode.
21. The semiconductor device defined in claim 1 wherein the pnictide-rich layer extends across layers of differing composition in the semiconductor.
22. The semiconductor device defined in claim 1 wherein the pnictide-rich layer is an insulator and passivates the surface of the semiconductor.
23. The semiconductor device defined in claim 4, further defined as comprising a III-V semiconductor material.
24. The method of insulating a semiconductor device comprising depositing thereon a pnictide-rich insulating layer, said pnictide-rich layer comprising either an elemental pnictide or the polypnictide MPx where M is an alkali metal, P is a pnictide and x ranges from 15 through infinity.
25. The method defined in claim 24 wherein said semiconductor device comprises a III-V semiconductor.
26. The method of insulating a semiconductor device by co-evaporating thereon in vacuo a pnictide and an alkali metal to form a polypnictide layer thereon.
27. The method defined in claim 26 wherein said semiconductor device comprises a III-V semiconductor.
28. A new form of pnictide comprising a layer of amorphous pnictide-rich material having a layer-like local order.
29. The new form of pnictide defined in claim 28 further defined in that said local order is puckered sheet-like.
30. The new form of pnictide defined in claim 29 formed on a substrate at a temperature below 300°C.
31. The new form of pnictide defined in claim 30 formed on a substrate at substantially 20°C.
32. The semiconductor device of claims 1, 2 or 3 wherein said layer has a layer-like local order.
33. The semiconductor device of claim 23 wherein said layer has a layer-like local order.
34. The method of claims 24 or 25 wherein said layer has a layer-like local order.
35. The method of claims 26 or 27 wherein said layer has a layer-like local order.
36. The semiconductor of claims 1, 2 or 3 wherein said layer is formed by deposition from P2 vapor species.
37. The semiconductor device of claim 23 wherein said layer is formed by deposition from P2 vapor species.
38. The method of claims 24 or 25 wherein said layer is formed by deposition from P2 vapor species.
39. The method of claims 26 or 27 wherein said layer is formed by deposition from P2 vapor species.
40. The semiconductor device of claims 1, 2 or 3 wherein said layer is formed by sputtering.
41. The semiconductor device of claim 23 wherein said layer is formed by sputtering.
42. The method of claims 24 or 25 wherein said layer is formed by sputtering.
43. The method of claims 26 or 27 wherein said layer is formed by sputtering.
44. The semiconductor device of claims 1, 2 or 3 wherein said layer is formed by molecular beam deposition
45. The semiconductor device of claim 23 wherein said layer is formed by molecular beam deposition.
46. The method of claims 24 or 25 wherein said layer is formed by molecular beam deposition.
47. The method of claims 26 or 27 wherein said layer is formed by molecular beam deposition.
48. The semiconductor device of claims 1, 2 or 3 wherein said layer is formed by vacuum deposition.
49. The semiconductor device of claim 23 wherein said layer is formed by vacuum deposition.
50. The method of claims 24 or 25 wherein said layer is formed by vacuum deposition.
51. The method of claims 26 or 27 wherein said layer is formed by vacuum deposition.
52. A semiconductor device as defined in claim 4 wherein said semiconductor is a III-V device.
53. The semiconductor device of claims 1, 2 or 3 wherein said layer is formed by chemical vapor deposition.
54. The semiconductor device of claim 23 wherein said layer is formed by chemical vapor deposition.
55. The method of claims 24 or 25 wherein said layer is formed by chemical vapor deposition.
56. The method of claims 26 or 27 wherein said layer is formed by chemical vapor deposition.
57. The semiconductor device of claim 1 wherein said semiconductor is GaAs.
58. The semiconductor device or method of claims 24 or 26 wherein said semiconductor is GaAs.
59. The semiconductor device of claim 1 wherein said semiconductor is InP.
60. The semiconductor device or method of claims 24 or 26 wherein said semiconductor is InP.
61. The semiconductor device of claim 1 wherein said semiconductor is GaP.
62. The semiconductor device or method of claims 24 or 26 wherein said semiconductor is GaP.
63. The method of claim 26 wherein said pnictide is elemental.
64. The semiconductor device or method of claim 63 in which said pnictide is phosphorus.
65. The semiconductor device or method of claim 63 in which said pnictide is arsenic.
66. The semiconductor device or method of claim 63 in which said pnictide is antimony.
67. The semiconductor device or method of claim 63 in which said pnictide is bismuth.
68. The semiconductor device or method of claim 63 in which said pnictide has a layer-like local order.
69. The semiconductor device or method of claim 63 in which said pnictide has a layer-like puckered sheet-like local order.
70. The method of claim 26 wherein said pnictide is an alkali metal pnictide.
71. The semiconductor device or method of claims 1, 24 or 70 in which said pnictide is phosphorus.
72. The semiconductor device or method of claims 1, 24 or 70 in which said pnictide is arsenic.
73. The semiconductor device or method of claims 1, 24 or 70 in which said pnictide is antimony.
74. The semiconductor device or method of claims 1, 24 or 70 in which said pnictide is bismuth.
75. The semiconductor device or method of claims 1, 24 or 70 in which said pnictide has a layer-like local order.
76. The semiconductor device or method of claims 1, 24 or 70 in which said pnictide has a puckered sheet-like local order.
77. The semiconductor device or method of claims 1, 24 or 70 in which said alkali metal is potassium.
78. The method of claims 26 or 27 wherein said pnictide is a polypnictide having the formula MP15 where M is an alkali metal and P is a pnictide.
79. The method of claims 26 or 27 wherein said pnictide is a polypnictide having the formula MPx where M is an alkali metal and P ranges from 15 to infinity.
80. The method of claim 24 in an MIS device.
81. The method of claim 26 in an MIS device.
82. The method of claims 80 or 81 in a MISFET device.
83. The method of claim 24 wherein said semiconductor is comprised in a metal-semiconductor device.
84. The method of claim 26 wherein said semiconductor is comprised in a metal-semiconductor device.
85. The method of claims 83 or 84 in which said device is a MESFET.
86. The method of claim 24 wherein said semiconductor is comprised in an opto-electronic device.
87. The method of claim 26 wherein said semiconductor is comprised in an opto-electronic device.
88. The method of claims 86 or 87 wherein said device is a light emitting device.
89. The method of claims 86 or 87 in which said device is a light detecting device.
90. The method of claims 86 or 87 in which said device is a laser.
91. The method of claims 86 or 87 in which said device is a P-I-N diode.
92. The method of claims 86 or 87 in which said device is a avalanche diode.
93. The method of claims 86 or 87 in which said device is a solar cell.
94. The method of claims 86 or 87 in which said device is a photocathode.
95. A semiconductor device comprising:
a semiconductor substrate formed from a semiconductor material, and a passivating layer including elemental phosphorus deposited on a surface of said semiconductor substrate.
a semiconductor substrate formed from a semiconductor material, and a passivating layer including elemental phosphorus deposited on a surface of said semiconductor substrate.
96. A semiconductor device comprising:
a semiconductor substrate formed from a semiconductor material, and a passivating layer formed from a polyphosphide deposited on a surface of said semiconductor substrate.
a semiconductor substrate formed from a semiconductor material, and a passivating layer formed from a polyphosphide deposited on a surface of said semiconductor substrate.
97. The device as claimed in claim 96 wherein said polyphosphide is MPx, where M is an alkali metal and x is in the range of 15 to infinity.
98. The device as claimed in claims 95 or 96 wherein said semiconductor substrate is formed from a Group III-V
compound.
compound.
99. The device as claimed in claims 95 or 96 wherein said passivating layer reduces the density of surface static at the surface of the semiconductor substrate.
100. The semiconductor device defined in claims 95 or 96 wherein said passivating layer reduces the recombination velocity of charge carriers at the surface of the semi-conductor substrate.
101. The semiconductor device defined in claims 95 or 96 wherein said passivating layer increases the photoluminescence of the semiconductor substrate.
102. A metal insulating semiconductor device comprising:
a semiconductor substrate formed from a compound of III-V semiconductor material, and an insulating layer formed from an elemental pnictide material on said semiconductor substrate.
a semiconductor substrate formed from a compound of III-V semiconductor material, and an insulating layer formed from an elemental pnictide material on said semiconductor substrate.
103. A metal insulating semiconductor device comprising:
a semiconductor substrate formed from a compound of III-V semiconductor material, and an insulated layer formed from a polypnictide or said semiconductor substrate, said polypnictide being a compound formed from an alkali metal and a pnictide.
a semiconductor substrate formed from a compound of III-V semiconductor material, and an insulated layer formed from a polypnictide or said semiconductor substrate, said polypnictide being a compound formed from an alkali metal and a pnictide.
104. A metal insulating semiconductor device as claimed in claims 102 or 103 further including:
a layer of silicon nitride on said insulating layer for providing both a second insulating layer and for increasing the breakdown voltage of said first insulating layer.
a layer of silicon nitride on said insulating layer for providing both a second insulating layer and for increasing the breakdown voltage of said first insulating layer.
105. A metal insulating semiconductor device comprising:
a substrate formed from a semiconductor material, and an insulating layer formed from an elemental pnictide material on said substrate.
a substrate formed from a semiconductor material, and an insulating layer formed from an elemental pnictide material on said substrate.
106. A metal insulating semiconductor device comprising:
a substrate formed from a semiconductor material, and an insulating layer formed from a polypnictide on said semiconductor substrate said polypnictide being a compound formed from an alkali metal and a pnictide.
a substrate formed from a semiconductor material, and an insulating layer formed from a polypnictide on said semiconductor substrate said polypnictide being a compound formed from an alkali metal and a pnictide.
107. The device as claimed in claim 105 wherein said elemental pnictide is phosphorus.
108. The device as claimed in claim 106 wherein said polypnictide is MPx, where M is an alkali metal and x is in the range of 15 to infinity.
109. The device of claim 102 wherein said layer is elemental phosphorus.
110. The device of claim 103 wherein said polypnictide is a polyphosphide.
111. The device of claim 110 wherein said polyphosphide has the formula MPx, where x is equal to or greater than 15.
112. The device of claim 111 wherein x is equal to 15.
113. The device of claim 111 where M is an alkali metal.
114. The device of claim 113 wherein x is equal to 15.
115. The device of claim 113 wherein x is very much greater than 15.
116. The device of claim 112 where M is an alkali metal.
117. The device of claim 110 wherein said polyphosphide is KP15.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US58111584A | 1984-02-17 | 1984-02-17 | |
| US581,115 | 1995-12-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1241896A true CA1241896A (en) | 1988-09-13 |
Family
ID=24323947
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000457668A Expired CA1241896A (en) | 1984-02-17 | 1984-06-28 | Passivation and insulation of iii-v devices with pnictides, particularly amorphous pnictides having a layer-like structure |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1241896A (en) |
-
1984
- 1984-06-28 CA CA000457668A patent/CA1241896A/en not_active Expired
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