CA1238130A - Subscriber line interface - Google Patents

Abstract

SUBSCRIBER LINE INTERFACE
ABSTRACT OF THE DISCLOSURE

A subscriber line interface circuit which includes a pair of amplifiers whose outputs are con-nected to the subscriber's line. The inputs are con-trolled whereby each of the amplifiers may either source or sink the line current. This circuit also includes an arrangement to control the voltage level to the amplifier and the line such that power consumption is minimized.

Description

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SUBSCRIBER LINE INTE~ACE
FIELD OF THE INVENTION
The present invention relates to telephone line circuits and more particularly to a subscriber line interface circuit for supplying the full range of line supervision functions and regulated loop current while at the same time reducing power dyes-potion in the subscriber line interface circuit.
BACKGROUND OF THE INVENTION
Subscriber stations are normally connected to the central office or telephone exchange by means of two metallic conductors to form a subscriber's loop circuit.
Such loops often vary greatly in length and other kirk-teristics resulting in different loop impedances as seen from the central office. As a result, difficult problems related to the signal and battery feed are experienced.
Battery feeds historically have used split winding, highly balanced transformers and large keeps-ions to feed do current to the subscriber's loop and also to provide an arc. coupling on the wire. These passive devices are bulky and heavy but generally provide good performance. By incorporating various arrangements of relays and some method of loop sensing, other special-iced services are achieved: Hotel/motel, ground start, and AN. More recently, many modifications in the form of active device enhancement to transformers have been tried so as to reduce their bulk and weight. These have included floating feeds, negative inductance simulation, do blocked inductors, etc. These methods generally have preserved good performance but only partially offset the size, weight, and cost factors of transformers while incorporating, as a tradeoff, circuit complexity.
The most recent efforts, however, have been aimed at the use of an all solid state interface circuit, commonly Jo - - \

called a SLICK The inherent assumption is of realizing a custom integrated circuit so as to achieve the ultimate goal of minimum size and weight. These factors are extremely important since line circuits consume the bulk of the space and weight in a moderate size telephone exchange. The all solid state realizations of these circuits have, however, been fraught with two general problems:
(1) Difficult in meeting some transmission specifications that the older passive device approaches could meet, and I Limited features, once beyond a simple standard line interface the circuits would need additional relays (a cost, size penalty) or not be usable at all. Some of the specific problems, one or more of which tend to appear in recent SLIT circuits are:
(a) power dissipation at short loops is excessive, leading to thermal problems for the ICY
(b) excess COO. current drain beyond that required for adequate transmission performance and therefore excess engery cost, (c) longitudinal balance is deficient, (d) limited features, such as lack of (i) analog loop back for testing (ii) ground start line (iii) AN lines (iv) loop current reversal for hotel/motel.
SUMMARY OF THE INVENTION
This invention directly addresses each of the deficiencies cited above. This can best be understood by reference to the figures. Two Its are shown, split by voltage requirements. The circuitry is shown this way solely upon the assumption that final cost may be minimized by separating high voltage (relatively larger area of silicon) devices from low voltage (relatively small) devices. To minimize excess power on short loops, a pulse width modulator (Pal) of the "chopper" type is employed to lower the effective battery voltage supplied to the TIP, RING line driving amplifiers. This voltage is made a function of the do loop current control circuit so that just enough overhead voltage to keep the amplifiers active is supplied above and beyond that required to provide desired loop current. This minimizes ohmic losses. The chopper itself, operating in a Class D
switching mode, operates in a near loss less manner. To minimize excess COO. battery drain at short loops, a do loop control circuit is employed in a feedback path, whereby loop voltage is sensed, low pass filtered, analog processed by a predetermined linear function, and the output used to control the TIP, RING driving (transcon-Dakotans) amplifiers. By proper choice of the feedback function, a desirable loop current versus loop resistance is obtained: a current between 55-65 ma at 100 ohms loop which decreases smoothly to a minimum of 20 ma at 2000 ohm loop. A secondary output of this circuit controls pulse width of the PAM described above.
It can be shown that for the type of TIP, RING
drive amplifiers chosen, longitudinal balance becomes essentially a match of certain pairs of resistors, on a ratio basis, which together with the operational amplifier form the functional block which is a transconductance amplifier. This is essentially a technology issue to obtain the required ratio matching (0.1% or better), and thin film resistors are envisioned. Longitudinal balance ~1238~;~

in the present of 60 ho common mode current, when those current magnitudes exceed the steady-state do loop current component, can only be maintained if the output TIP, RING amplifiers can both source or sink current.
This implies a complementary output stage and further imposes a restriction of Class A stage biasing so as to minimize crossover distortion when current direction reverses. Balanced source or sinking to the common mode current only is achieved by a common mode amplifier.
Adequate amplifier gain-bandwidth must be available to achieve desired balance at the upper frequency of interest (about 3khz).
Synthesis of a complex ARC. input impedance is achieved by feedback, wherein loop voltage is sensed, hi-pass filtered with a time constant equal to 900 ohms and 2.16 us, and used to control loop current.
Good OW return loss (match to desired 2 wire input impedance) requires attention to the gain-bandwidth of the intrinsic operational amplifiers and the choice of resistor values which together with the Ox Amp form the TIP, RING line driving transconductance amplifiers. This is a circuit analysis/design tradeoff problem. Hybrid balance (OW return loss) requires first good 2 wire input impedance and then a careful accounting in the balance networks for all poles zeros formed by amplifiers and external components.
This invention, by design, incorporates detectors for Ring Trip, AN, and ground start line conditions and sufficient control features to support ground start, loop current reversal, and line cutoff. For cutoff, both TIP
RING amplifiers are put in a high impedance state. This eliminates the need for an external cutoff relay. (This cutoff feature is needed prior to the new exchange initial cutover at an existing older exchange site.) For ground start, the TIP AMPLIFIER is put in a high impedance state.

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- BRIEF DES~RIPTIQN OF THY DRAWING
Figure 1 shows the relative placement of Figures

2 and 3. Figures 2 and 3, when put along side each other, show a detailed schematic of an embodiment of the subscriber line interface circuit of the present invention. Figure 4 shows in greater detail the power supply circuit. Figure 5 is a chart showing the timing for the power circuit.
DESCRIPTION OF TIRE PREFERRED EMBODIMENT
The drawings, Figures 2 and 3, when placed along side each other, as shown in Figure 1, show in schematic form a subscriber line interface circuit with associated circuitry for providing signal conversion between a two wire bidirectional transmission line and a pair of unit directional transmission paths.
The terminals for connection to the subscriber's line are labeled To and Al. Direct current is supplied to the line for operation of the subscriber's station from a pair of line driver amplifiers labeled AT and AR. Long-tudinal balance of the line is maintained by inserting 2 pairs of matched resistors R5, R6 and Roll, R13 into each of the lines.
Longitudinal balance in the present of 60 cycle power line interference currents which exceed the steady state direct current loop component is maintained by having the drive amplifiers capable of sourcing or sinking current.
To minimize crossover distortion in such an arrangement, the amplifiers are each operated as Class ABE Resistors R6 and Roll in cooperation with diodes Do, Do and Do and Do also provide lightning protection by shunting excess current to ground.
The line drive amplifiers are operated as current drivers with a shunt voltage feedback to avoid possible instability when connected to highly capacitive lines. The two amplifiers AT and AR are symmetrical. The configuration of these amplifiers is arranged to have a differential input and a bidirectional output. In this manner current can be either soured or sunk, depending upon the differences of the inputs. Additionally, a common mode amplifier AC is used to drive the inverting inputs of these amplifiers AT
and AR via resistors R4 and R17, respectively, as shown.
The output of amplifier AC is a function of the bias voltage and the common mode voltage which is one-half of the sum of the voltages at the To and Al leads taken from the junction of resistors R7 and R8. The output of amplifier AC is con-netted to the inverting inputs of amplifiers AT and AR in the configuration shown, and for a zero difference between the positive inputs and the negative inputs of transconduct-ante amplifiers AT and AR the voltage output will be one-half of the "effective" battery voltage. Therefore, the loop resistance load which "floats" between the To and Rlterminals will in the quiescent state (no loop current), have voltages at the To and Al terminals such that the "mid-point" voltage between resistors R7 and R8 will be equal to one-half the effective source battery voltage.
The action of the common mode negative feedback AC is such that common voltages on the To and Al terminals as induced by a balance resistance source to ground will tend to be offset in an equal manner by excursions at the transconduct-ante amplifiers AT and AR outputs, thus providing a balanced longitudinal impedance to ground.
The common mode feedback only affects signals common to the To and Al conductors and has no effect on differential (voice) signals. A further advantage of the overall configuration is that the common mode feedback is taken after resistors R6 and Roll. Protection resistors, R6 and Roll, limit lightning surges to a maximum current of about AYE, where the current is shunted to ground or battery by diodes Do J Do, Do or Do. This limits otherwise

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destructive potentials to a safe value. although the value of resistors R6 and Roll in each leg To and Al is nominally the same, over their life, the ratio matching could change (due to lightning exposure) several percent and could never be guaranteed to match closely. However, the feedback after resistors R6 and Roll makes balance very insensitive to the resistor R6 and Roll matching. The resistors R5 and R13 though are the most sensitive to affecting balance and track closely.
To ensure greater reliability the circuit has been designed for the placement of the components on two circuit chips. The components that must interface with the external line have a higher voltage rating and are located on a first chip labeled Icily, while those components that interface with the internal exchange circuitry are designed with lower voltage rated components and are located on a second chip labeled ISSUE. The difference in control levels is corrected by providing a level shift circuit that trays-fates the lower voltage inputs from ISSUE to the higher voltages required by the components of Icily. The input relative to ground potential is shifted to appear relative to one-half of the effective battery voltage. This is done to match the quiescent biasing of the amplifier AC.
A switching mode transistor, Al, is also present on Icily because o-f voltage requirements. This transistor with inductance Lo, capacitance Of, and catch diode Do form a conventional "chopper" converter that converts the exchange battery voltage to the output voltage US= (Vat), where Don time duty cycle of Al. Additionally, control inputs high impedance-HZT and power down-PDN are fed to both output stage amplifiers AT and AR. The high impedance state HUT allows implementation of the cutoff and ground start functions. The power down feature is to conserve power.
The current IO, shown as a logic function of HUT and HER, at gate Go, is switched in for ground start applications.

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To maintain control of the do loop current and the proper arc. levels, the sideband differential signal from amplifier PA is split into a "do" path and an "a"
path, by use of a low-pass filter consisting of R26 and C2 and hi-pass filters R28 and C3. A typical time constant for the for low-pass filter is 10 my, which allows adequate filtering for loop current control while still providing fast enough response to detect dial pulsing (10 pus) trays-itchiness. The high-pass filter serves two functions. One is to simply couple the voice signals and block do including do offset errors of the amplifiers) and the other is to synthesize a complex input impedance at the TIP I RING, by proper time constant choice. Input impedance synthesis occurs because the voice signal is fed back thrum the summing amplifier SUM to the line driving amplifiers AT and AR via amplifier AD with overall negative feedback.
The do loop current control features two con-trot characteristics designated "main" and "secondary", plus input and output polarity swishing at the amplifiers.
The polarity switching amplifier provides either +1 or -1 voltage gain under logic control, depending on desired sub-scriber loop current direction: normal or reverse. Since the whole structure is in a feedback loop, from the line conductors, amplifier DA, DC loop control, summing amp SUM, and amplifier AD, simultaneously inverting signal polarities to the do at the control block at input and output will force a reversal of loop current direction. That is, toe input signal sign to tip AT, ring AR amplifiers and the loop voltage sign will both invert when loop current is reversed, but signal sense is always positive thrum the control block.
The desired characteristic for loop current versus loop resistance is a smoothly decreasing current from 55-65 ma at 100 ohms to 20 ma at 2000 ohms. The constraints on curve shape are relatively loose, so as to still satisfy ~23~31~

transmission requirements, and a generally hyperbolic shape is satisfactory. The importance of this is that the relation-ship of loop current versus loop voltage is linear. This form, being linear, is relatively easy to implement and is the correct relationship to place in a feedback loop. Some scaling is necessary because of loop gain factors. This "main" characteristic controls loop current out to 2000 ohms.
The potential problem of amplifier clipping to voice signals at long loops or low battery is possible.
Simply stated, there may not be enough battery voltage to sustain desired loop current and keep the amplifiers in the active region: the amplifier voltage "overhead". To pro-vent this, a "secondary" characteristic is constantly computed keeping the amplifier active region voltage constant as a function of battery voltage.
The loop current is totally under control of the do current control just described. The pulse width modulator PAM is used to supply an effective battery voltage, less than the real battery voltage, at short loops to reduce power dissipation. The PUMA is slaved to the voltage level as output from the loop control such that the effective battery potential supplied to the amply-liens AT and AR is equal to the loop voltage plus a constant.
The level of the constant voltage is chosen to be somewhat larger than the amplifier overhead voltage. Thus only necessary ohmic losses are dissipated as heat. This sire-logy keeps maximum IT power under 1 watt as compared to the normal 2 watts or greater otherwise.
The PAM also incorporates a novel "open loop"
battery voltage compensation as shown in Figure 4. A
voltage to current converter VCl generates a current proportional to the exchange battery voltage. A second voltage to current converter VC2 is slaved to the first via resistor R30 to generate a second current. A current I

mirror, CM, also generates a current, I, in an opposite direction from that of the first current I. A logic controlled switch, S, can interrupt the current I and is controlled from a D flip-flop FF2, whose D input=GND
(logic 0). A zero is clocked to output Q at the check pulse Folk positive edge. An asynchronous preset, PRY
sets Logic one at PRY set to zero, via the comparator;
CMPl, which occurs when the capacitor voltage Ye is less or equal to zero. The overall action of these elements is to synchronize the capacitor, C22, voltage, as shown, to the clock Folk such that the capacitor starts a discharge ramp with current I as Folk goes positive, and starts a charge ramp with current I just after Ye goes to zero.
For any constant Vat and associated current I, and con-slant clock frequency, vcl=vc2 and Ye goes to zero at exactly T0/2 (half-cycle). The effect of Vat is only to change the slope of the capacitor voltage ramp. A
second comparator, CMP2, generates the duty cycle signal D
to transistor Al. The duty cycle is D=vth/vcpeak. The voltage vth=(loop voltage +V2), scaled down.
Battery compensation is achieved as follows: For capacitor C22, vcpeak=(K3)(Vbat)(T0)/(2C). Let I=(K3)(Vbat) then vcpeak=(K3)(Vbat)(T0)/(2C). But, for the converter output voltage=(inpu~ voltage)X(duty cycle). Thus Us=
(Vat), where D=Ton/T0. But Ton/T0=vth~vcpeak=D. Therefore, Vs=(vth)(Vbat)(2C)/((K3)(Vbat)(T0))=(vth)(2C)/((K33)(T0)), and is not dependent on Vat. The advantage of this "open loop"
Vat compensation over a closed loop feedback approach is the fact that both a loop filter capacitor and associated IT pin are eliminated. Without Vat compensation, voltage V2 would have to be set substantially larger to cover Vat variation and would result in needlessly higher IT power dissipation. With this scheme, the PAM is swanked to an external clock so that it can be phase locked to the 8khz -~38~3~

voice sampling frequency o-f a following CODE or equivalent to eliminate inter modulation products.
Four different characteristics of the external loop are sensed: (loop sense, AN, ground start, and ring trip. Loop sensing involves detecting OFF hook vs. ON hook states and dial pulsing. Since the loop is driven with transconductance amplifiers, the voltage input to these amplifiers is proportional to loop current. But loop current is a predetermined function of loop resistance (the LOOP
CONTROL circuitry), so a simple threshold on the input signal, taken from the DO loop control can be used. Thus the threshold is related directly to loop resistance, and set for about 2500 ohms equivalent. A small hysteresis is added.
AN (Automatic Number Identification) in this context means differentiating between two subscribers sharing a two party line. One Jill have a standard tote-phone set and the other a set where there is a do path (less than 2600 ohms) to ground from the "mid-point".
This path will be inductive (so as not to load the voice signal) and is provided either by ringer inductance, specially arranged, or a separate inductor. Detection is accomplished by sensing loop current imbalance resulting from the path to ground when the AN marked subscriber goes off hook. The imbalance current is directly related to the difference of TIP, RING bias voltage TV, and the common mode voltage, Yam'. The level shifted value of Yam', that is Yam''. The difference voltage is compared to threshold and a small hysteresis is added.
Ground start detection is employed for lines toeing to a PAYBACKS using ground start signaling. In ground start, the COO. side TIP feed is open circuit (hi-impedance), and the COO. must sense external application of a resistive ground (less than 400 ohms) at the RING lead on the opposite end of loop. For the SLICK the task is to sense current flow in the RING conductor alone, ignoring activity on the TIP side. To accomplish this, amplifiers AT and AR are put in HUT state while a constant current It, about ma, is sunk to -50V at the junctions of R8 and R7 on the RING lead.
Then OR a SLIT is a function of RING current. To sense RING voltage only, a scaled factor of loop voltage is sub-treated from Yam and compared to a threshold value, plus small hysteresis. This complete operation is performed by a circuit using a differential comparator similar to that for AN.
Ring trip detection is initiated when a signal from the logic sets the ring trip latch which actuates the ringing relay. The ring relay contacts connect ringing generator and its ground to the loop via the R6 resistors.
The SLIT Icily is disconnected at contacts RCl and Rc2 to prevent the higher ringing voltages from damaging Icily.
Detection of ringing current is achieved by summing the signals vdiff and (Vrng~, as shown in the drawing which then is proportional to ringing current. The ringing current thrum the ringer has an arc. component only, since the ringer is capacitively coupled to the line. when the subscriber goes OFF hook, an additional do path thrum the phone is established. Because the ringing generator is biased to -50V, a do component will now appear in add-lion to the arc. component. The overall function of the detector is to quickly sense less than 100 my) this new condition and reset the ringing latch and thereby disco-neat the ringing generator. That is, "ring trip" occurs.
The detector first sums vdiff and (Vrng) and applies a gain of 10X to the resultant signal. This signal is then limited to +0.75V swing, which creates a clipping of the upper portion of the otherwise sinusoidal signal.
This signal is then low pass filtered to reduce the magnitude of the arc. component, such that no detection occurs for ON
hook at comparator (Vth=lZ5mV). For OFF hook, the additional do current raises the peak magnitude of the filtered signal to trip the comparator and reset the latch. The filter kapok-it or is biased to -100 my during ON hook so that the total 225 my excursion needed to reach Vth cannot occur for greater than 5 my. This delay is needed to mask the operate time of the ringing relay during which the "ring current" signal is not valid. The circuit parameters allow trip times no greater than 100 my.
In this hybrid, the voice signal present at the receive port is transmitted to the subscriber line via the TIP and RING current driver Ox Amps AT and AR. However a portion of this signal is picked up by the differential amplifier DUFF bridging the TIP and RING conductors and is fed back toward the transmit port. The actual amount of this signal that gets fed back depends Oil the impedance of the subscriber line. In order to cancel these signals to prevent echoes and system oscillations, a separate "leakage"
path from the receive port to *he transmit port is establish-Ed This leak path shapes the frequency spectrum of the received voice to be identical with that of the reflected signal coming from the differential amplifier bridging the TIP and RING conductors. These two signals are then summed together 180 degrees out of phase and are used as the output to the transmit port. Three different leak paths (Net, NET, and NET) are presented that will cancel reflections from three different classes of lines. The top two paths match the SLICK in a four wire sense, to the R-C parallel combinations assumed to represent loaded and non loaded lines. The bottom path matches the standard termination of 900 ohms and 2.16 us. Network selection is accomplished by a logic controlled "three position switch". The "switch"
is implemented with solid state technology.

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It will be obvious to those skilled in the art that numerous modifications o-f the present invention can be made without departing from the spirit of the invention which shall be limited only by the claims appended hereto.

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Claims (7)

WHAT IS CLAIMED IS:

1. A line interface circuit for use in a pulse code modulated telephone exchange for supplying operating current to an associated subscriber station;
first and second line feed resistance means coupled to a two wire line, operational amplifier drive means for supplying loop current through said feed resistance means to said two wire line and responsive to a control signal for supplying current to said associated line, voltage sensing means connected to said two wire line and responsive to the voltage across said line for generating a control signal indicative thereof, and a variable line current power supply means operated responsive to said control signal, said supply means comprising a pulse width modulated type operating in phase with said exchange voice sampling frequency.

2. A line interface circuit as claimed in Claim 1 wherein said power supply means further comprises:
a pulse width modulation control and a chopper transistor operated from the exchange battery.

3. A line interface circuit as claimed in Claim 2 wherein said power supply means further comprises an output filter.

4. A line interface circuit as claimed in Claim 2 wherein said circuit is implementable as an integrated circuit.

5. A line interface circuit as claimed in Claim 2 wherein said sensing means further comprises:
a differential amplifier means and coupling means connecting said differential amplifier output to said pulse width modulator control.

6. A line interface circuit as claimed in Claim 5 wherein said coupling means further comprises:
a low-pass filter means.

7. A line interface circuit as claimed in Claim 2 wherein said pulse width modulation control comprises a bistable triggered by said exchange sampling frequency source, a capacitor store, a charge and dis-charge means operated from said bistable and a first and a second comparator means operated to condition said bi-stable and said second comparator operated upon sensing a preset level to output a signal to operate said chopper transistor.