CA1232330A - Radio remote control apparatus with encoded signals for automatic rolling doors - Google Patents
Radio remote control apparatus with encoded signals for automatic rolling doorsInfo
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- CA1232330A CA1232330A CA000475323A CA475323A CA1232330A CA 1232330 A CA1232330 A CA 1232330A CA 000475323 A CA000475323 A CA 000475323A CA 475323 A CA475323 A CA 475323A CA 1232330 A CA1232330 A CA 1232330A
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Abstract
ABSTRACT OF THE DISCLOSURE
A novel radio remote control apparatus with encoded signals for automatic rolling doors is provided herein. It includes, in combination, a signal transmitting device with a plurality of circuits arranged for transmitting encoded signals, and a signal receiving device having a plurality of circuit units functionally associated with the signal transmitting device. The circuit units are also mechanically coupled with an automatic rolling door for receiving the encoded signals from the signal transmitting device and for effecting the control operations of "up", "down" and "stop"
movements of the automatic rolling door therewith. This provides an improved remote control device with a simplified circuit arrangement but with a very large range of encoding numbers.
A novel radio remote control apparatus with encoded signals for automatic rolling doors is provided herein. It includes, in combination, a signal transmitting device with a plurality of circuits arranged for transmitting encoded signals, and a signal receiving device having a plurality of circuit units functionally associated with the signal transmitting device. The circuit units are also mechanically coupled with an automatic rolling door for receiving the encoded signals from the signal transmitting device and for effecting the control operations of "up", "down" and "stop"
movements of the automatic rolling door therewith. This provides an improved remote control device with a simplified circuit arrangement but with a very large range of encoding numbers.
Description
~3~ 3~
This invention relates to a romote control apparatus for automatic rolling dors. More particularly, it relates to a radio remote control ap~aratus with predetermined coded signals adapted for use in safely controlling the '`up", ~down~ and "stop" of the automatic rolling doors.
Conventionally, all the remote control devices for automatic rolling doors can be used only for controlling the "up" and "down" movements of the automatic rolling doors.
Above all the encoding numbers arranged ~herein for providing the control signals between the transmitting unit and the receiving unit thereof are confined to, at most, four digits.
Even if a known remote control device is provided with more encoding numbers, the circuit arrangement is complicated, and therefore errors are easy to incurred therewith. Consequently, problems encountered during the use of the known remote control device include the following:
1) Since the operational control of the known remote control devices is usually restricted to the movements of straight "up"
and "down" without any optional control func~ion, e.g., a midway stop, if a child or any other object clings to the rolling door during its upward movement, it will endanger the lie of the child and/or cause damage to the rolling door; and
This invention relates to a romote control apparatus for automatic rolling dors. More particularly, it relates to a radio remote control ap~aratus with predetermined coded signals adapted for use in safely controlling the '`up", ~down~ and "stop" of the automatic rolling doors.
Conventionally, all the remote control devices for automatic rolling doors can be used only for controlling the "up" and "down" movements of the automatic rolling doors.
Above all the encoding numbers arranged ~herein for providing the control signals between the transmitting unit and the receiving unit thereof are confined to, at most, four digits.
Even if a known remote control device is provided with more encoding numbers, the circuit arrangement is complicated, and therefore errors are easy to incurred therewith. Consequently, problems encountered during the use of the known remote control device include the following:
1) Since the operational control of the known remote control devices is usually restricted to the movements of straight "up"
and "down" without any optional control func~ion, e.g., a midway stop, if a child or any other object clings to the rolling door during its upward movement, it will endanger the lie of the child and/or cause damage to the rolling door; and
2) Owing to the limitations of the encoding numbers between the transmitting unit and receiving unit, if a burgular can determine the operating frequency of the remote control device by means of a trial-and-error method using the encoding numbers, the chance of the burglar being successful in finding out the exact control signals for opening the rolling door is very great, to the distinct disadvantage of the owner.
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Therefore, there is a great need for developing an improved remote control device with a simplified circuit arrangement but with a very large range of encoding numbers.
It is accordingly an object of a primary aspect of this invention to provide a radio remote control apparatus with encoded signals by which operations for controlling the "up", "down" and "stop" of the automatic rolling doors can be safely and conveniently performed.
It is an object of another aspect of this invention to provide a radio remote control apparatus with encoded signals for automatic rolling doors wherein the control signals can be arranged with 38 x 39 encoding numbers, so as to offer a great variety of control signals for ensuring the safe performance thereof.
~ ccording to a broad aspect of the present invention, a radio remote control apparatus with encoded signals for automatic rolling doors, is provided, the remote control apparatus including the combination of a signal transmitting unit and a siqnal receiving unit. The signal trà nsmitting unit includes: a control signal setting circuit for providing different, e.g., three kinds of control signals to be output but one kind at a time on a selective basis: a memory means coupled with the control signal se1,ting means for outputting a series of tri-state signals: a tri-state address encoding circuit connected to the function encoding means for providing a series of encoding numbers in multiple powers of the base 3 a counting means connected to the memory means for providing oscillations and outputting a series of alternating pulses: an .
~L~3;~33~3 ad~ress converting means coupled with the tri-state address encoding means and the counting means for outputting a series of encoded address signals:and a radio transmitting means coupled with the encoded number ~rnsmission means for converting the modulated address encoding signals into radio transmitting signals and transmitting same; The signal receiving unit preferably includes: a PCM signal decoding means for receiving the radio signal from the radio transmitting device and decoding the same for outputting correct PCM
tri-state signals therefrom; a PC~ signal discriminating means connected to the PCM signal decoding means foL identifying the tri-state signals input therein and outputting the identified signals in mono-state; a second triggering means coupled with the signal discriminating means for converting the mono-state signals into a triggering signal: a feedback means connected to the second triggering means for feeding the triggering signal back to the PC~ signal decoding means: and a control means electrically connected to the second triggering means and mechanically coupled with an automatic rolling door for converting the triggering signal into a control signal so that operations of up, and down and stop of the automatic rolling door can safely effected therewith.
By one variant of this aspect of the invention, the control signal setting means comprises three signal setting loops each having a pushbutton coupled therewith for outputting three different kinds of control signals Lespectively representing the control of "up", "down" and "stop" operations.
By another variant thereof, the memory means comprises
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Therefore, there is a great need for developing an improved remote control device with a simplified circuit arrangement but with a very large range of encoding numbers.
It is accordingly an object of a primary aspect of this invention to provide a radio remote control apparatus with encoded signals by which operations for controlling the "up", "down" and "stop" of the automatic rolling doors can be safely and conveniently performed.
It is an object of another aspect of this invention to provide a radio remote control apparatus with encoded signals for automatic rolling doors wherein the control signals can be arranged with 38 x 39 encoding numbers, so as to offer a great variety of control signals for ensuring the safe performance thereof.
~ ccording to a broad aspect of the present invention, a radio remote control apparatus with encoded signals for automatic rolling doors, is provided, the remote control apparatus including the combination of a signal transmitting unit and a siqnal receiving unit. The signal trà nsmitting unit includes: a control signal setting circuit for providing different, e.g., three kinds of control signals to be output but one kind at a time on a selective basis: a memory means coupled with the control signal se1,ting means for outputting a series of tri-state signals: a tri-state address encoding circuit connected to the function encoding means for providing a series of encoding numbers in multiple powers of the base 3 a counting means connected to the memory means for providing oscillations and outputting a series of alternating pulses: an .
~L~3;~33~3 ad~ress converting means coupled with the tri-state address encoding means and the counting means for outputting a series of encoded address signals:and a radio transmitting means coupled with the encoded number ~rnsmission means for converting the modulated address encoding signals into radio transmitting signals and transmitting same; The signal receiving unit preferably includes: a PCM signal decoding means for receiving the radio signal from the radio transmitting device and decoding the same for outputting correct PCM
tri-state signals therefrom; a PC~ signal discriminating means connected to the PCM signal decoding means foL identifying the tri-state signals input therein and outputting the identified signals in mono-state; a second triggering means coupled with the signal discriminating means for converting the mono-state signals into a triggering signal: a feedback means connected to the second triggering means for feeding the triggering signal back to the PC~ signal decoding means: and a control means electrically connected to the second triggering means and mechanically coupled with an automatic rolling door for converting the triggering signal into a control signal so that operations of up, and down and stop of the automatic rolling door can safely effected therewith.
By one variant of this aspect of the invention, the control signal setting means comprises three signal setting loops each having a pushbutton coupled therewith for outputting three different kinds of control signals Lespectively representing the control of "up", "down" and "stop" operations.
By another variant thereof, the memory means comprises
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3~33~3 three sets of memory circuit separately connected to the signal setting loops for providing a memorized output in conjunction with the operations of the pushbuttons.
By still another variant thereof, the function encoding means comprises a high-impedance semiconductor having an output and a plurality of inputs respectively coupled with the memory means for providing three encoded signals in "open", "high" and "low" states.
By yet anothr variant thereof, the tri-state address encoding means comprises an address circuit having a ~irst address portion combined with nine high-impedance semiconduc-tor switches in series, and a second address portion with eight high-impedance semiconductor switches in series-connection with the first address portion for providing an output with a multiplicy of address encoding numbers therefrom.
By still another variant theeof, the counting means comprises a counting circuit coupled with the memory means for pe~forming the transmission of a modulated signal in tri-state address encoded number and the feeding back a "clear" signal to the memory means so as to clear out the control signal thereof.
By yet a further variant thereof, the addresses converting means comprises a series-connected NOR gate and NOT
gate circuit coupled with the counting means and the tri-state address encoding means for permitting the output of the address encoded numbers one set at a time under the control of said counting means.
By a still further variant thereof, the first triggering means comprises an OR gate circuit coupled with both 3~33~
the counting means and the memory means for outputting a high-state t~iggering signal therefrom.
By yet another variant thereof, the encoded number transmission means comprises a PCM tci-state address IC eoupled with the counting means and the first tciggering means for outputting a modulated signal with tri-state address encoded numbecs.
By a still further variant thereof, the radio signal transmitting means eomprises in eombination with an RF
oseillator, an amplifier and an antenna and connected to the eneoded number transmission means for eonverting the modulated signals reeeived from the encoded number tranmission means into radio signals to be transmitted thereform.
By another variant thereof, the PCM signal decoding means eom~rises: a superhetrodyne receiving circuit for reeeiving the radio signals from ~he signal trasmitting deviee a first PCM signal deeoding circuit eonnected to the superheterodyne reeeiving circuit and the first PCM signal decoding circuit and being capable of decoding up to 38 eneoding numbers: whereby a great variety of up to 39 x 38 deeoding numbers are available for deeoding the tri-state signals received from the receiving cireuit and outputting them in mono-state PCM signals therefrom. Preferably, the first PCM
signal deeoding eireuit includes: a first PCM tri-state address IC for signal deeoding operation; a first PC
oscillating loop connected to the first PCM tri-state address IC for encoded number identification thereof so as to effect an output from the first PCM tri-state address iC within a time 33~
limit set by the first RC timing loop. Fur~hermore, the second PCM signal decoding circuit may include: a second PCM
tri-state address IC for signal decoding operation: a second RC
oscillating loop connected to the second PCM tri-state address IC for comparing the frequency of the received tri-state signals; and a second RC timing loop coupled with the second PCM tri-state address IC for encoded number identification so as to effect an output from the second PCM tri-state address IC
within a time limit set by the second RC timing loop.
Preferably the first PC~ tri-state address IC and the second PCM tri-state address IC are connected in series, the time limit provided by the first RC timing loop being sufficie~nt for the second PCM tri-s~ate address IC to receive at least two complete PCM tri-state signals.
By another variant thereof, the tri-state discriminating means comprises: an "up" state discriminating loop coupled with the second PCM tri-state address IC: a ~down~
state discriminating loop connected to the "up" state discriminating lcop: and a "stop" state discriminating loop coupled with the second PCM tri-state address IC and associated with the "up" and "down" state discriminating loops; thereby, the mono-state signals received from the PCM signal decoding means are respectively discriminated by the rel.ated "up", "down" and "stop" discriminating loops and a mono-state signal involving one of the tri-state signals "up", "down" or "stop"
is output there~rom.
By yet a further variant thereof, the triggering means comprises three sets of series--connected SCRs and relays - 5a -3~33~
respectively coupled with the "up". "down~ and "stop"
discriminating loops so that when a mono-state signal is output from any one of said "up", "down" and "stop" state discriminating looes, a related SCR will be energized to drive the associated relay for output a control signal therefrom.
B~ yet another variant thereof, the feedback means comprises a diode regulating loop and an in~egrating loop respectively coupled with the triggering means and the PCM
signal decoding means for feeding the control signal of "up"
and "down" state back into the PCM signal decoding means.
By a still further variant thereof the contral rneans comprises an "up`' control loop, a "down" control loop, and a "stop~' control loop combined together, where said "up" control loop and "down" control loop are respectively coupled with the related relays of the second ~riggering means and the control mechanism of an automatic rolling door for effecting operations of up and down movements; while the "stop" control loop is series-connected with the ''upll and "down" control loops, thereby, when a "stop" state signal is received and output theref~om, the opration of the "up" control loop or the "down"
control loop will be immediately stopped thereat~
In the accompanying drawings:
Figure 1 is a block diagram of a signal transmitting unit embodied in the radio remote control apparatus with encoded signals for automatic rolling doors according to one embodiment of this invention Figure 2 is a CiLCUit diagram of Fig. 1:
Figure 3 is a time sequence diagram of Fig. 2;
- 5~ -3~33~
~ igu~ 4 1~ bl~k ~ia~r~m of a ~ignal receiving unit embodied in the radio remote control apparatus with encoded signals for automatic rolling doors according to one embodiment of this invention:
Figure 5 is a circuit diagram of Fig. 4:
Figure 6 is time sequence of Fig. 5; and Figure 7 is a modified circuit diagram of the preferred embodiment shown in Fig. 5 where an IC address circuit and a control circuit are removed therefrom according to one embodiment of this in~ention.
Referring to Figs. 1 and ~, a preferred embodiment of a radio remote control apparatus with encoded signals for automatic rolling doors according to one embodiment of this invention is shown. The remote control apparatus includes the combination of a signal transmitting unit 1 and a signal receiving unit 2. As shown in Fig. 1, the signal transmitting unit 1 is combined with a control signal setting circuit 10, a memory circuit 20. a function encoding circuit 30, a tri-state address encoding circuit 40, a first counting circuit 50, an address converting circuit 60, a triggering circui~ 70, an encoding number transmitting circuit 80 and a radio signal transmitting circuit 90.
Referring to Fig. 2, the control signal setting circuit 10 is mainly formed with three setting loops 11, 12 and 13 respectively arranged for "up", "down" and "stop"
operations, and each having a pushbutton KBl, KB2, KB3 substantially coupled thereto. When the contacts of the pushbuttons KBl, KB2, and KB3 are not turned on, the output 3~
terminals b, a and c of the loops 11. 12. and 13 are kept in contact with the power supply Vdd and held at a logically high "H" state. When the contacts of the pushbuttons KB1, K~2 and KB3 are separatedly turned on, the output terminals b, a and e of the loops 11, 12 and 13 are ehanged into a logically low "L"
state.
The memory eireuit 20 electrieally coupled with the eontrol signal setting circuit lO is primarily composed of three R-S flie-flops 21, 22 and 23 respeetively - 5d -~.~3~33~
associated with the operations of "up", "down" and "stop"
oE the loops 11, 12 and 13. As can be seen in the drawing, the set terminal S3 of the flip-flop 23 for "stop" is connected to the "stop" loop 13 while the reset terminal R3 is coupled with a high potential source thereof. Consequently, when the pushbutton KB3 is turned on, the set terminal S3 will be at low potential state and the Q3 output at high potential state~
effecting a memory output therefrom. On the other hand, when the high potential source i is changed into a low potential level, the Q3 output will also output a high potential signal therefrom. As to the flip-flop 21 for "up", the set terminal Sl thereof is coupled with the outputs b and a of the setting loops 11 and 12 through an AND gate 24. Therefore, any low potential input therefrom will cause the set terminal Sl to remain at low "L" state. Meanwhile, as the reset terminal Rl is connected with both the output c of the setting loop 13 and the high potential source i through another AND gate 25, the reset terminal Rl is normally kept at "H" state.
When any one of the outputs b and a of setting loops 11 and 12 for "up" and "down" is rendered at "L" level, and the output c of the setting loop 12 for "stop" together with the terminal i is kept at "H" state, the Ql output thereof will feed a low signal to a node d, from which the low signal will be inverted through a NOT gage 26, causing the node e thereof to be at "H" state. This :~3~23~
condition of high state at the node e is conducive to the coupling of the setting terminals of the 'Idown'' setting loop 12, to which the flip-flop 21 (for up ) and the flip-flop 22 (for down) are connected, because only when the output a of the setting loop 12 is at "L'l state, can an "L'l state be produced at the Q2 output of the flip-flop 22.
If the output of the 'Idown'l setting loop 12 is kept at "H" state, and there is a signal output at the node e (either high or low), the Q2 output of the flip-flop 22 will remain at "H" state. To have the Q2 out~ut being kept at "H" state is useful for the signal transmission at the node e no matter whether the signal is high or low. This condition will become clear in the following descriptions.
The function encoding circuit 30 associated with the memory circuit 20 is mainly a high-impedance semiconduc-tor with an output g and a plurality o input terminals respectively connected to the output f of the "down'l flip-flop 22 and the node e. When "L" signals are output from the Q2 of the l'down 1I flip-flop 22, no matter what kind of signals are in transmission at the node e, the output of the terminal g will always be maintained open thereat. When IIHII signals are output Erom the Q2 of the "down" flip-flop 22, the input terminals of the high-impedance semiconductor switch 30 will be energized to conduct, and, in this condition, if "H" signals are present at the node e, "L'l signals will be output from ~,, 3~33~
the terminal g.
The tri-state address encoding circuit ~0 coupled with the function encoding circuit 30 comprises a first address portion 41 made up with nine high-impedance semiconductor switches in series for providing 3 = 19683 address encoding mumbers, and a second address portion 42 with eight high-impedance semiconductor swltches for providing 3 = 656 address encoding numbers. Therefore, when the first and second address portions 41 and 42 are connected in series, an output of 3 x 3 = 129,147,163 address encoding numbers is obtained therewith.
It shall be appreciated that the arrangement of the high-impedance semiconduc-tor switches of the first and second address portions 41 and 42 differ a little from each other to provide an output -of "up", "down" and "stop" signals with different addresses so as to ensure the security of the preferred embodiment of this inven-tion. This will become clear in the following descriptions.
The counting circuit 50 is connected with the memory circuit 20. When any one of the pushbuttons KBl, KB2 and KB3 is pressed down, a continuous memory signal from ther memory circuit 20 will be fed to pin 12 of the counting circuit 50, and at the same time, the pins 9, 10 and 11 of the counting circuit 50 are ac-tuated to oscillate thereat, and an output of alternate clock pulses in divide-by -2 "H" and "L" potentials is developed across the pin 1 while another alternate clock pul.ses in divide-
3~33~3 three sets of memory circuit separately connected to the signal setting loops for providing a memorized output in conjunction with the operations of the pushbuttons.
By still another variant thereof, the function encoding means comprises a high-impedance semiconductor having an output and a plurality of inputs respectively coupled with the memory means for providing three encoded signals in "open", "high" and "low" states.
By yet anothr variant thereof, the tri-state address encoding means comprises an address circuit having a ~irst address portion combined with nine high-impedance semiconduc-tor switches in series, and a second address portion with eight high-impedance semiconductor switches in series-connection with the first address portion for providing an output with a multiplicy of address encoding numbers therefrom.
By still another variant theeof, the counting means comprises a counting circuit coupled with the memory means for pe~forming the transmission of a modulated signal in tri-state address encoded number and the feeding back a "clear" signal to the memory means so as to clear out the control signal thereof.
By yet a further variant thereof, the addresses converting means comprises a series-connected NOR gate and NOT
gate circuit coupled with the counting means and the tri-state address encoding means for permitting the output of the address encoded numbers one set at a time under the control of said counting means.
By a still further variant thereof, the first triggering means comprises an OR gate circuit coupled with both 3~33~
the counting means and the memory means for outputting a high-state t~iggering signal therefrom.
By yet another variant thereof, the encoded number transmission means comprises a PCM tci-state address IC eoupled with the counting means and the first tciggering means for outputting a modulated signal with tri-state address encoded numbecs.
By a still further variant thereof, the radio signal transmitting means eomprises in eombination with an RF
oseillator, an amplifier and an antenna and connected to the eneoded number transmission means for eonverting the modulated signals reeeived from the encoded number tranmission means into radio signals to be transmitted thereform.
By another variant thereof, the PCM signal decoding means eom~rises: a superhetrodyne receiving circuit for reeeiving the radio signals from ~he signal trasmitting deviee a first PCM signal deeoding circuit eonnected to the superheterodyne reeeiving circuit and the first PCM signal decoding circuit and being capable of decoding up to 38 eneoding numbers: whereby a great variety of up to 39 x 38 deeoding numbers are available for deeoding the tri-state signals received from the receiving cireuit and outputting them in mono-state PCM signals therefrom. Preferably, the first PCM
signal deeoding eireuit includes: a first PCM tri-state address IC for signal deeoding operation; a first PC
oscillating loop connected to the first PCM tri-state address IC for encoded number identification thereof so as to effect an output from the first PCM tri-state address iC within a time 33~
limit set by the first RC timing loop. Fur~hermore, the second PCM signal decoding circuit may include: a second PCM
tri-state address IC for signal decoding operation: a second RC
oscillating loop connected to the second PCM tri-state address IC for comparing the frequency of the received tri-state signals; and a second RC timing loop coupled with the second PCM tri-state address IC for encoded number identification so as to effect an output from the second PCM tri-state address IC
within a time limit set by the second RC timing loop.
Preferably the first PC~ tri-state address IC and the second PCM tri-state address IC are connected in series, the time limit provided by the first RC timing loop being sufficie~nt for the second PCM tri-s~ate address IC to receive at least two complete PCM tri-state signals.
By another variant thereof, the tri-state discriminating means comprises: an "up" state discriminating loop coupled with the second PCM tri-state address IC: a ~down~
state discriminating loop connected to the "up" state discriminating lcop: and a "stop" state discriminating loop coupled with the second PCM tri-state address IC and associated with the "up" and "down" state discriminating loops; thereby, the mono-state signals received from the PCM signal decoding means are respectively discriminated by the rel.ated "up", "down" and "stop" discriminating loops and a mono-state signal involving one of the tri-state signals "up", "down" or "stop"
is output there~rom.
By yet a further variant thereof, the triggering means comprises three sets of series--connected SCRs and relays - 5a -3~33~
respectively coupled with the "up". "down~ and "stop"
discriminating loops so that when a mono-state signal is output from any one of said "up", "down" and "stop" state discriminating looes, a related SCR will be energized to drive the associated relay for output a control signal therefrom.
B~ yet another variant thereof, the feedback means comprises a diode regulating loop and an in~egrating loop respectively coupled with the triggering means and the PCM
signal decoding means for feeding the control signal of "up"
and "down" state back into the PCM signal decoding means.
By a still further variant thereof the contral rneans comprises an "up`' control loop, a "down" control loop, and a "stop~' control loop combined together, where said "up" control loop and "down" control loop are respectively coupled with the related relays of the second ~riggering means and the control mechanism of an automatic rolling door for effecting operations of up and down movements; while the "stop" control loop is series-connected with the ''upll and "down" control loops, thereby, when a "stop" state signal is received and output theref~om, the opration of the "up" control loop or the "down"
control loop will be immediately stopped thereat~
In the accompanying drawings:
Figure 1 is a block diagram of a signal transmitting unit embodied in the radio remote control apparatus with encoded signals for automatic rolling doors according to one embodiment of this invention Figure 2 is a CiLCUit diagram of Fig. 1:
Figure 3 is a time sequence diagram of Fig. 2;
- 5~ -3~33~
~ igu~ 4 1~ bl~k ~ia~r~m of a ~ignal receiving unit embodied in the radio remote control apparatus with encoded signals for automatic rolling doors according to one embodiment of this invention:
Figure 5 is a circuit diagram of Fig. 4:
Figure 6 is time sequence of Fig. 5; and Figure 7 is a modified circuit diagram of the preferred embodiment shown in Fig. 5 where an IC address circuit and a control circuit are removed therefrom according to one embodiment of this in~ention.
Referring to Figs. 1 and ~, a preferred embodiment of a radio remote control apparatus with encoded signals for automatic rolling doors according to one embodiment of this invention is shown. The remote control apparatus includes the combination of a signal transmitting unit 1 and a signal receiving unit 2. As shown in Fig. 1, the signal transmitting unit 1 is combined with a control signal setting circuit 10, a memory circuit 20. a function encoding circuit 30, a tri-state address encoding circuit 40, a first counting circuit 50, an address converting circuit 60, a triggering circui~ 70, an encoding number transmitting circuit 80 and a radio signal transmitting circuit 90.
Referring to Fig. 2, the control signal setting circuit 10 is mainly formed with three setting loops 11, 12 and 13 respectively arranged for "up", "down" and "stop"
operations, and each having a pushbutton KBl, KB2, KB3 substantially coupled thereto. When the contacts of the pushbuttons KBl, KB2, and KB3 are not turned on, the output 3~
terminals b, a and c of the loops 11. 12. and 13 are kept in contact with the power supply Vdd and held at a logically high "H" state. When the contacts of the pushbuttons KB1, K~2 and KB3 are separatedly turned on, the output terminals b, a and e of the loops 11, 12 and 13 are ehanged into a logically low "L"
state.
The memory eireuit 20 electrieally coupled with the eontrol signal setting circuit lO is primarily composed of three R-S flie-flops 21, 22 and 23 respeetively - 5d -~.~3~33~
associated with the operations of "up", "down" and "stop"
oE the loops 11, 12 and 13. As can be seen in the drawing, the set terminal S3 of the flip-flop 23 for "stop" is connected to the "stop" loop 13 while the reset terminal R3 is coupled with a high potential source thereof. Consequently, when the pushbutton KB3 is turned on, the set terminal S3 will be at low potential state and the Q3 output at high potential state~
effecting a memory output therefrom. On the other hand, when the high potential source i is changed into a low potential level, the Q3 output will also output a high potential signal therefrom. As to the flip-flop 21 for "up", the set terminal Sl thereof is coupled with the outputs b and a of the setting loops 11 and 12 through an AND gate 24. Therefore, any low potential input therefrom will cause the set terminal Sl to remain at low "L" state. Meanwhile, as the reset terminal Rl is connected with both the output c of the setting loop 13 and the high potential source i through another AND gate 25, the reset terminal Rl is normally kept at "H" state.
When any one of the outputs b and a of setting loops 11 and 12 for "up" and "down" is rendered at "L" level, and the output c of the setting loop 12 for "stop" together with the terminal i is kept at "H" state, the Ql output thereof will feed a low signal to a node d, from which the low signal will be inverted through a NOT gage 26, causing the node e thereof to be at "H" state. This :~3~23~
condition of high state at the node e is conducive to the coupling of the setting terminals of the 'Idown'' setting loop 12, to which the flip-flop 21 (for up ) and the flip-flop 22 (for down) are connected, because only when the output a of the setting loop 12 is at "L'l state, can an "L'l state be produced at the Q2 output of the flip-flop 22.
If the output of the 'Idown'l setting loop 12 is kept at "H" state, and there is a signal output at the node e (either high or low), the Q2 output of the flip-flop 22 will remain at "H" state. To have the Q2 out~ut being kept at "H" state is useful for the signal transmission at the node e no matter whether the signal is high or low. This condition will become clear in the following descriptions.
The function encoding circuit 30 associated with the memory circuit 20 is mainly a high-impedance semiconduc-tor with an output g and a plurality o input terminals respectively connected to the output f of the "down'l flip-flop 22 and the node e. When "L" signals are output from the Q2 of the l'down 1I flip-flop 22, no matter what kind of signals are in transmission at the node e, the output of the terminal g will always be maintained open thereat. When IIHII signals are output Erom the Q2 of the "down" flip-flop 22, the input terminals of the high-impedance semiconductor switch 30 will be energized to conduct, and, in this condition, if "H" signals are present at the node e, "L'l signals will be output from ~,, 3~33~
the terminal g.
The tri-state address encoding circuit ~0 coupled with the function encoding circuit 30 comprises a first address portion 41 made up with nine high-impedance semiconductor switches in series for providing 3 = 19683 address encoding mumbers, and a second address portion 42 with eight high-impedance semiconductor swltches for providing 3 = 656 address encoding numbers. Therefore, when the first and second address portions 41 and 42 are connected in series, an output of 3 x 3 = 129,147,163 address encoding numbers is obtained therewith.
It shall be appreciated that the arrangement of the high-impedance semiconduc-tor switches of the first and second address portions 41 and 42 differ a little from each other to provide an output -of "up", "down" and "stop" signals with different addresses so as to ensure the security of the preferred embodiment of this inven-tion. This will become clear in the following descriptions.
The counting circuit 50 is connected with the memory circuit 20. When any one of the pushbuttons KBl, KB2 and KB3 is pressed down, a continuous memory signal from ther memory circuit 20 will be fed to pin 12 of the counting circuit 50, and at the same time, the pins 9, 10 and 11 of the counting circuit 50 are ac-tuated to oscillate thereat, and an output of alternate clock pulses in divide-by -2 "H" and "L" potentials is developed across the pin 1 while another alternate clock pul.ses in divide-
4 13 by -2 and divide-by -2 and is output from the pin 7.
Apparently, the alternating speed of the clock pulses output at the pin 7 is the highest. Thus, when the clock pulses bave been alternated two times at the pin 1, only one alternation of the clock pulses is made at the pin 2.
This advantage of staggering condition is useful for the alternate clock pulses to be fed back to the high-poten-tial terminal i of the memory circuit 20. As a result, when the alternate clock pulses of the pin 2 are changed from "H" into "L", the high-potential terminal will be rendered to produce an instantaneous "L" output therefrom and cause the continuous memory output of the memory circuit 20 to be cleared therewith. In the mean-time, the counting circuit 50 will cease oscillating,and, after one complete cycle of the clock pulses is output at the pin 2, two complete cycles of the clock pulses have been output at the pin 1.
The address converting circuit 60 coupled with the counting circuit 50 and the tri-state address encoding circuit 40 is mainly combined with a NOR gate 61 and a NOT gate 62 connected in series where the NOR gate 61 is used to receive the signals output from the pin 2 of the counting circuit 50 and the not Q3 of the "stop" flip-flop 23. When "Ll' signals are output from the not Q3 ofthe flip-flop 23, the NOR gate 61 will be in an enabled state, and an "H" signal will be produced at the output C
during the time the first half cycle of the "L" signal ~3'~
being output at the pin 2 of the counting circuit 50. On the other hand, the conduction of the switch elements C in the first address portion 41 of the address encoding circuit are also under the control of the output C in providing series output of the encoded address therefrom. While, when the second half cycle of the "H" signal is output at the pin 2, an "L" signal will be output from the NOR gate 61 and converted into an l'H" signal through the NOT gate 62 and output from the terminal D thereof, by which the switch element D' in the second address portion 42 is controlled to conduct thereat. However, if the "H" signal is being output from the not Q3 of the "stop" flip-flop 23, no matter what kind of singnal is being output at the pin 2 of the counting circuit 50, the output D of the address converting circuit 60 is always kept at "H" state. Such an arrangement is made for ensuring that whenever the pushbotton KB3 is pressed down, the encoded address siynal of the second address portion 42 can be immediately output therefrom.
The first triggering circuit 70 coupled with the counting circuit 50 and the memory circuit 20 is substantially an OR gate arranged therein for receiving the output signals coming from the memory 20 and the pin 2 of the counting circuit 50 where any "H" signal from either circuits will cause an "H" output of the triggering signal from the OR gate 70.
~3.~ 3~3~
The encoded number transmission circuit 80 connected with the counting circuit 50 and the first triggering circuit 70 is composed of a PCM tri-state address IC, e.g. the IC-145026 manufactured by the Motorola Corpo-ration, where the signals coming from the pin 7 of the counting circuit 50 are received by the encoded number transmission circuit 80 at the pin 11 and used as the clock pulses thereof while the signals coming from the triggering circuit 70 are received at the pin 14 and used as a triggering signal thereof. In addition, the pins 1 through 7 as well as the pins 9 and 10 o the tra-nsmis-sion circuit 80 are set as the address pins and xespec-tively coupled with the corresponding high-impeaance semiconductor switches of the tri-state address encoding circuit 40. Therefore, when the PCM IC circuit 80 is triggered, the address signals of the first address portion 41 or the second address portion 42 will be modulated and output through the pin 15 of the IC circuit 80. It shall be appreciated that, since the PCM IC
available on the market at present is usually limited to 9 pins for the address, only 9 high-impedance semicon-ductor switches can be connected in series to the first and second address portions 41 and 42.
The radio signal transmitting circuit 90 connected to the encoded number transmission circuit 80 is conventionally combined with an RF oscillator, a modulator, an amplifier and an antenna for converting the modulated signals received from the encoded number 3~
transmission circuit 80 into the radio signals and transmit therefrom.
Shown in Fig. 3 is a time sequence of the signal transmitting unit 1 illustrated in Fig. 2. As shown therein, when the "down" pushbutton KB2 is pressed down, an "L" signal will be outpu-t from the terminal f of the "down" flip-flop 22 and the terminal d oE the "up" flip-flop 21 where the "L" at the terminal d will be fed into the encoding circuit 30 as well as the reset terminal R2 of the "down" flip-flop 22 through the terminal e of the NOT gate 26. On the other hand, since the reset R2 of the flip-flop 22 is at "H" state, the output f is low, causing the encoding circuit 30 to be at an open condi-tion thereat so that an open signal is produced at the output g thereof. In the preferred embodiment of this invention, the "open" signal represents the "down" con-trol position. Beside, the output at the terminal k is a low potential which is used to trigger the counting circuit 50 for outputting the required oscillation there-from, and, owing to the fact that the output j is also at a low potential level with respect ot the not Q3 terminal of the "stop" flip-flop 23, the encoded addresses of the first and second address portions 41 and 42 are output at the terminal n in positive-negative half cycle series.
2' When the pushbutton KBl for "up" or KN3 for "stop"
is pressed down, the output at the terminal f is always at "H" state. Thus, if the "up" pushbutton KBl is pressed down, an "H" signal from the terminal e will be 33~
output through the terminal g. This "H" signal in the preferred embodi-ment represents the "up" control position. However, lf the pushbutton KB3 is pressed down, an "1" signal from the terminal e will be output through the terminal g, and this "1" signal in the preferred embodiment represents the "stop" control position.
On the other hand, if two of the three pushbu-t-tons KBl, KB2 and KB3 are pressed down simultaneously, the resultant operations can be clearly seen in Fig. 2 where the sequence occurs from first "stop", then "down" and the last "up". It shall be appreciated that every time the pushbutton is pressed down, only one signal is permitted to be an output.
In the preferred embodiment, the "stop" signal comes first in the sequence simply because i-t was considered tha-t the "stop" feature is important for the automatic rolling doors and, of course, there is no limitation in this configuration. It shall be further appreciated that modifications can be readily made in -the preferred embodiment of the transmitting unit 1, as an example, by changing it into a bi-state function for "up" and "down" and the like.
Referring to Fig. 4, a preferred embodiment of the signal re-ceiving unit 2 according to an embodiment of this invention, is shown in which the signal receiving unit 2 is mainly combined with a PCM signal decoding circuit 110, a tri-state signal discriminating circuit 120, a second triggering circuit 130, a feedback circui-t 140 and a 3,~3~
control circuit 150.
As shown in Fig. 5, the PCM signal decoding circuit 110 is combined with a superheterodyne receiver 111, a first PCM tri-state address IC MSIl and a second PCM tri-state address IC MSI2. The first PCM tri-state IC, such as the IC-145028 manufactured by the Motorola .~ Corporation, includes 9 address codes from Al to A9 which are capable of decoding up to 3 encoding numbers, a first RC oscillating loop R21, C22/ and a first RC timing circuit R23, C24 respectively coupled with the pins 6, 7 and 10. The PCM tri-state signals output in mono-state series received from the transmitting unit 1 are first compared by the first RC oscillating circuit R21, C22 for frequency identification, decoded through the address codes A1 to A9 of the IC MSI1 for encoding number identi-fication, and then the identified signals are permitted to output from the pin 11 within the time limit set by the first RC counting circuit R23, C24. The second PCM
address IC MSI2 same as the IC-145028 above has 8 address codes from Al to A8, a second RC oscillating ci.rcuit R24, C26 and an RC counting circuit R25, C27 separately coupled with the pins 6, 7 and 10 oE the IC MSI2 whose pin 12 is used as a function code while the pin 11 is used as an output code thereat. Similarly, the PCM tri-state signals output in mono-state series received from the transmitting unit 1 are separately compared in fre-quency through the second RC circuit R24, C26 and decoded 33q3 in encoding numbers through the address codes from Al to A8 for outputting the identified signals thereof from the pin 9 with an additional "H" signal output from the pin 11 in a time set by the second RC counting circuit R25, C27. As can be seen from the drawing, the IC MSI 1 is connected to the IC MSI2 in series through an AND gate 113. It shall be understood that the time duration set by the R23,C24 in the counting circuit of the IC MSIl is sufficient for enabling the IC MSI2 to receive a complete transmission of two PCM mono-state signals so that a high selectivity in 3 x 3 encoding numbers can be ob-tained therewith. The application of the function-code pin 12 of the IC MSI2 is that when the input thereof is high, and two different waveforms are also input to the pin 9, the pin 11 will output a high signal with a longex timer duration provided by the RC circuit R25, C27, and another high signal with a short time duration provided by the RC circuit R24, C26. These two different timing signals, in the preferred embodiment, respectively represent the "up" signal and the "down" signal as well.
When the input of the ~unction code of-the pin 12 is a low signal with another predetermined waveform input to the pin 9 and a high signal to the pin 11 in the time provided by the RC circuit R25, C27, this low signal represents the "stop" signal, and all other signals are not recognized th.ereat.
The tri-state signal discriminating circuit 120 is combined with an "up" state discriminating loop 121, a ~ ~3;~333~
"down" state discriminating loop 122 and a "stop" state discriminating loop 123, wherein the "up" state discriml-nating loop 121 is composed of a first AND gate 124a having its input terminals separately connected to the pins 11 and 12 of the second IC MSI2, an RC charging loop R29, C29, a Eirst NOT gate 124b, and a second NOl` gate 124c, resepectively connected in series; and the "down"
discriminating loop 122 includes a third NOT gate 125a connected to the output of the fist AND gate 124a of the "up" state discriminating loop 121, an RC discharging loop R31, C31, and a second AND gate 125b. Since the first AND gate 124a is connected to the pins 11 and 12 of the second IC MSI2, when the input k from the Eunction code pin 12 and the input 1 oE a timing signal R25 x C27 from the pin 11 are both at high state, the output m of the first AND gate 124a will be high with a time duration provided by the RC circuit R25, C27. Because the time of this "H" signal from the R25, C27 is sufficient for the charging loop R29, C29 to be charged to a high voltage level, the output n thereof will be at high state, and through the first and second NOT gates 124b and 124c, this "H"'signal will remain high at the output r of the second NOT gate 124c. In the preferred embodiment, this "H" signal is the "up" signal. However, when the pin 11 of the second IC MSI2 outputs an "~I" signal with a time duration provided by the RC circuit R24, C26, due to the fact that the configuration of the preferred embodiment of this invention is based on R25 x R27 > 2/3 R29 x C29, the time of the "H" slgnal from the RC circuit R24, C26 will not enable the RC charging circui-t R29, C29 of the "up" state discriminating loop 121 to be charged to a high voltage level. Thus, the output o of the first NOT
gate 124b is also at high state. Meanwhile, as the "H"
signal of the first AND gate 124a is rendered as an "L"
signal through the third NOT gate 125a, the RC discharg-ing circuit R31, C31 will discharge to a low voltage level in the predetermined RC time; while, upon receiving the "H" signal from the output o of the first NOT gate 124b and output p from the RC discharging circuit R31, C31, the second AND gate 125b will output an "H" signal therefrom. This "H" sigrlal output in the preferred embo-diment is the "down" signal.
The "stop" state discriminating loop 123 is composed of a fourth NOT gate 126a and a third AND gate 126b, both of which are respectively connected to the pin 11 and pin 12 of the second IC MSI2, when the output of -the pin 12 is an "L" signal while the output of the pin 11 is an "H"
signal having a time duration from the the RC circuit R24, C26,~ the output s of the third AND gate 126b will be an "H" signal which is the "stop" signal in the preferred embodiment. Owing to the fact that -the output signal of the first IC MSIl is relayed to the first AND gate 124a of the "down" state loop 122 through an OR gate 114; when the input of the pin 12 of the second IC MSI2 is at "L"
state and being converted into an "H" state through the 3~
fourth NOT gate 126a, the signal fed into the third A~D
gate 126b is always kept at "~" state. Under this condition, as soon as the superheterodyne receiver 111 has a signal in output thereat, this output signal will be instantly encoded by the second IC MSI2 and output therefrom. This is the instant "s-top" configuration specifically arranged in the preferred embodiment of this invention for effecting the emergency stop operation of the automatic rolling door.
The second triggering circuit 130 is mainly combined with an RC loop R26, C28, and three groups of SCR and relay loops SCRl, Rll; SCR2, RL2; and SCR3, RL3, respec-tively coupled with with the "up", "down" and "stop"
state discriminating loops 121, 122 and 123. When a signal is output from the corresponding discriminating loops 121, 122 and 123, the associated SCR will be ener-gized to activate related relay RL in operation. It shall be appreciated that the RC circuit R26, C28 is arranged therein for keeping the triggering circuit 130 in stable condition. ln addition, since the hold current (IH) of the resistor R26 and the relay RL is lower than that of the SCR, after the capacitor C28 charges the SCR
to keep a hold current therewith, the SCR will be turned off thereat. As a result, very minimal spike-waves are produced by the SCR so that there js no need to connect an RC loop to each SCR.
The feedback circuit 140 is primarly composed of a diode loop D3, D4 and an integrating loop C32, R32. As 3233~1 can be seen in the drawing, when any one of the SCR and relay groups SCRl, RLl; SCR2, RL2; and SCR3, RL3 is energized to conduct thereat, a sinusoidal wave signal will be developed across the diode loop D3, D4 and rectified thereErom, and then, the rectified signal will be shaped in chopped condition by a diode D2 and inverted as an "L" signal through the integrating loop C32, R32, from which an "L" signal is fed back to the pin 12 of the second IC MSI2 accordingly.
The control circuit 150 is combined with an "up"
control loop 151, a "down" control loop 152 and a "stop"
control loop 153, where the "up" and "down" control loops 151, 152 are respectively under the control of the relays RI.l and RL2 with interlocking effect. When the "up" or "down" relay RLl or RL2 is activated, the coil U or D of the "up" or "down" control loops 151, 152 will be energized to drive the related mechanism of the automatic rolling door to move up or down therefrom. However, when the automatic rolling door has reached at the locating point set by a limit switch LSU (for up) or LSD (for down) during the movement, the associated circuit will be turned off, and the coil U or D is thus demagnetized and recovered to its original state. On the other hand, as the "stop" control loop 153 is connected in series with the "up" and "down" control loops 152 and 153, when the "stop" relay RL3 is activated, both the "up" loop 151 and the "down" loop 152 will be disenabled therea-t.
~3~
Referring to Fig. 6, there is shown an operational time sequence of the preferred embodiment illustrated in Fig. 5. As shown in Fig. 6, the time sequence is divided into three parts a, b and c, respectively representing the "up", "down" and "stop" state operations. When the input terminals 1 and k of the first AND gate 124a are at "H" state with the terminal 1 having a time duration from R25 x C27 of the second IC MSI2, the output m of the first AND gate 124a will output an "H" signal with a time duration provided from the R25, C27. This "H" signal output is then changed into a high-voltage level at the input terminal n through the charging and discharging operations of the RC circuit R29, C39, and, after successive conversions through the first and second NOT
gates 124a and 124b, an "H" signal will be produced at the output r thereof. Shown in Fig. 6(b) is a time sequence of the "down" state operation. When another "H"
signal with a time from the R24, C26 of the second IC
MSI2 is fed into the first AND gate 124a, the output m thereof wi11 also be at an "H" state. However, due to the short time duration from the R24, C26, this "H"
state cannot enable the RC circuit R29, C29 of the "up"
state control loop 121 to be charged to a high-voltate level. Therefore, the output of the "up" state control loop 121 is maintained at "L" state. Meanwhile, the "H"
signal from the R24, C26 is inverted into an "L" signal through the third NOT gate, causing the RC discharging circuit R31, C31 to suddenly go up to an "H" state and 3~33~
then s-tarting to discharge so that an "H" signal will be output from the terminal q of the second AND gate 125b accordingly.
It shall be appreciated that the preferred embodiment of the signal receiving unit 2 sho~n in Fig. 5 can be modified to including only one PCM tri-state address IC in the- PCM signal decoding circuit llO
provided that the encoding numbers of the modified embodiment are the same as that of the transmitting unit l. As shown in Fig. 7, a modified preferred ernbodiment of the signal receiving unit 2 according to this invention comprises a PCM signal decoding circuit llO, a tri-state signal discriminating circuit 120, a triggering circuit 130 and a feedback circuit l~0. As can be seen in the drawing, only one PCM tri-sate address IC MSI is used, and the control circuit 150 in Fig. 5 is also rernoved without affecting the performance of the preferred embodiment of the signal receiving unit 2.
,i.:\~
Apparently, the alternating speed of the clock pulses output at the pin 7 is the highest. Thus, when the clock pulses bave been alternated two times at the pin 1, only one alternation of the clock pulses is made at the pin 2.
This advantage of staggering condition is useful for the alternate clock pulses to be fed back to the high-poten-tial terminal i of the memory circuit 20. As a result, when the alternate clock pulses of the pin 2 are changed from "H" into "L", the high-potential terminal will be rendered to produce an instantaneous "L" output therefrom and cause the continuous memory output of the memory circuit 20 to be cleared therewith. In the mean-time, the counting circuit 50 will cease oscillating,and, after one complete cycle of the clock pulses is output at the pin 2, two complete cycles of the clock pulses have been output at the pin 1.
The address converting circuit 60 coupled with the counting circuit 50 and the tri-state address encoding circuit 40 is mainly combined with a NOR gate 61 and a NOT gate 62 connected in series where the NOR gate 61 is used to receive the signals output from the pin 2 of the counting circuit 50 and the not Q3 of the "stop" flip-flop 23. When "Ll' signals are output from the not Q3 ofthe flip-flop 23, the NOR gate 61 will be in an enabled state, and an "H" signal will be produced at the output C
during the time the first half cycle of the "L" signal ~3'~
being output at the pin 2 of the counting circuit 50. On the other hand, the conduction of the switch elements C in the first address portion 41 of the address encoding circuit are also under the control of the output C in providing series output of the encoded address therefrom. While, when the second half cycle of the "H" signal is output at the pin 2, an "L" signal will be output from the NOR gate 61 and converted into an l'H" signal through the NOT gate 62 and output from the terminal D thereof, by which the switch element D' in the second address portion 42 is controlled to conduct thereat. However, if the "H" signal is being output from the not Q3 of the "stop" flip-flop 23, no matter what kind of singnal is being output at the pin 2 of the counting circuit 50, the output D of the address converting circuit 60 is always kept at "H" state. Such an arrangement is made for ensuring that whenever the pushbotton KB3 is pressed down, the encoded address siynal of the second address portion 42 can be immediately output therefrom.
The first triggering circuit 70 coupled with the counting circuit 50 and the memory circuit 20 is substantially an OR gate arranged therein for receiving the output signals coming from the memory 20 and the pin 2 of the counting circuit 50 where any "H" signal from either circuits will cause an "H" output of the triggering signal from the OR gate 70.
~3.~ 3~3~
The encoded number transmission circuit 80 connected with the counting circuit 50 and the first triggering circuit 70 is composed of a PCM tri-state address IC, e.g. the IC-145026 manufactured by the Motorola Corpo-ration, where the signals coming from the pin 7 of the counting circuit 50 are received by the encoded number transmission circuit 80 at the pin 11 and used as the clock pulses thereof while the signals coming from the triggering circuit 70 are received at the pin 14 and used as a triggering signal thereof. In addition, the pins 1 through 7 as well as the pins 9 and 10 o the tra-nsmis-sion circuit 80 are set as the address pins and xespec-tively coupled with the corresponding high-impeaance semiconductor switches of the tri-state address encoding circuit 40. Therefore, when the PCM IC circuit 80 is triggered, the address signals of the first address portion 41 or the second address portion 42 will be modulated and output through the pin 15 of the IC circuit 80. It shall be appreciated that, since the PCM IC
available on the market at present is usually limited to 9 pins for the address, only 9 high-impedance semicon-ductor switches can be connected in series to the first and second address portions 41 and 42.
The radio signal transmitting circuit 90 connected to the encoded number transmission circuit 80 is conventionally combined with an RF oscillator, a modulator, an amplifier and an antenna for converting the modulated signals received from the encoded number 3~
transmission circuit 80 into the radio signals and transmit therefrom.
Shown in Fig. 3 is a time sequence of the signal transmitting unit 1 illustrated in Fig. 2. As shown therein, when the "down" pushbutton KB2 is pressed down, an "L" signal will be outpu-t from the terminal f of the "down" flip-flop 22 and the terminal d oE the "up" flip-flop 21 where the "L" at the terminal d will be fed into the encoding circuit 30 as well as the reset terminal R2 of the "down" flip-flop 22 through the terminal e of the NOT gate 26. On the other hand, since the reset R2 of the flip-flop 22 is at "H" state, the output f is low, causing the encoding circuit 30 to be at an open condi-tion thereat so that an open signal is produced at the output g thereof. In the preferred embodiment of this invention, the "open" signal represents the "down" con-trol position. Beside, the output at the terminal k is a low potential which is used to trigger the counting circuit 50 for outputting the required oscillation there-from, and, owing to the fact that the output j is also at a low potential level with respect ot the not Q3 terminal of the "stop" flip-flop 23, the encoded addresses of the first and second address portions 41 and 42 are output at the terminal n in positive-negative half cycle series.
2' When the pushbutton KBl for "up" or KN3 for "stop"
is pressed down, the output at the terminal f is always at "H" state. Thus, if the "up" pushbutton KBl is pressed down, an "H" signal from the terminal e will be 33~
output through the terminal g. This "H" signal in the preferred embodi-ment represents the "up" control position. However, lf the pushbutton KB3 is pressed down, an "1" signal from the terminal e will be output through the terminal g, and this "1" signal in the preferred embodiment represents the "stop" control position.
On the other hand, if two of the three pushbu-t-tons KBl, KB2 and KB3 are pressed down simultaneously, the resultant operations can be clearly seen in Fig. 2 where the sequence occurs from first "stop", then "down" and the last "up". It shall be appreciated that every time the pushbutton is pressed down, only one signal is permitted to be an output.
In the preferred embodiment, the "stop" signal comes first in the sequence simply because i-t was considered tha-t the "stop" feature is important for the automatic rolling doors and, of course, there is no limitation in this configuration. It shall be further appreciated that modifications can be readily made in -the preferred embodiment of the transmitting unit 1, as an example, by changing it into a bi-state function for "up" and "down" and the like.
Referring to Fig. 4, a preferred embodiment of the signal re-ceiving unit 2 according to an embodiment of this invention, is shown in which the signal receiving unit 2 is mainly combined with a PCM signal decoding circuit 110, a tri-state signal discriminating circuit 120, a second triggering circuit 130, a feedback circui-t 140 and a 3,~3~
control circuit 150.
As shown in Fig. 5, the PCM signal decoding circuit 110 is combined with a superheterodyne receiver 111, a first PCM tri-state address IC MSIl and a second PCM tri-state address IC MSI2. The first PCM tri-state IC, such as the IC-145028 manufactured by the Motorola .~ Corporation, includes 9 address codes from Al to A9 which are capable of decoding up to 3 encoding numbers, a first RC oscillating loop R21, C22/ and a first RC timing circuit R23, C24 respectively coupled with the pins 6, 7 and 10. The PCM tri-state signals output in mono-state series received from the transmitting unit 1 are first compared by the first RC oscillating circuit R21, C22 for frequency identification, decoded through the address codes A1 to A9 of the IC MSI1 for encoding number identi-fication, and then the identified signals are permitted to output from the pin 11 within the time limit set by the first RC counting circuit R23, C24. The second PCM
address IC MSI2 same as the IC-145028 above has 8 address codes from Al to A8, a second RC oscillating ci.rcuit R24, C26 and an RC counting circuit R25, C27 separately coupled with the pins 6, 7 and 10 oE the IC MSI2 whose pin 12 is used as a function code while the pin 11 is used as an output code thereat. Similarly, the PCM tri-state signals output in mono-state series received from the transmitting unit 1 are separately compared in fre-quency through the second RC circuit R24, C26 and decoded 33q3 in encoding numbers through the address codes from Al to A8 for outputting the identified signals thereof from the pin 9 with an additional "H" signal output from the pin 11 in a time set by the second RC counting circuit R25, C27. As can be seen from the drawing, the IC MSI 1 is connected to the IC MSI2 in series through an AND gate 113. It shall be understood that the time duration set by the R23,C24 in the counting circuit of the IC MSIl is sufficient for enabling the IC MSI2 to receive a complete transmission of two PCM mono-state signals so that a high selectivity in 3 x 3 encoding numbers can be ob-tained therewith. The application of the function-code pin 12 of the IC MSI2 is that when the input thereof is high, and two different waveforms are also input to the pin 9, the pin 11 will output a high signal with a longex timer duration provided by the RC circuit R25, C27, and another high signal with a short time duration provided by the RC circuit R24, C26. These two different timing signals, in the preferred embodiment, respectively represent the "up" signal and the "down" signal as well.
When the input of the ~unction code of-the pin 12 is a low signal with another predetermined waveform input to the pin 9 and a high signal to the pin 11 in the time provided by the RC circuit R25, C27, this low signal represents the "stop" signal, and all other signals are not recognized th.ereat.
The tri-state signal discriminating circuit 120 is combined with an "up" state discriminating loop 121, a ~ ~3;~333~
"down" state discriminating loop 122 and a "stop" state discriminating loop 123, wherein the "up" state discriml-nating loop 121 is composed of a first AND gate 124a having its input terminals separately connected to the pins 11 and 12 of the second IC MSI2, an RC charging loop R29, C29, a Eirst NOT gate 124b, and a second NOl` gate 124c, resepectively connected in series; and the "down"
discriminating loop 122 includes a third NOT gate 125a connected to the output of the fist AND gate 124a of the "up" state discriminating loop 121, an RC discharging loop R31, C31, and a second AND gate 125b. Since the first AND gate 124a is connected to the pins 11 and 12 of the second IC MSI2, when the input k from the Eunction code pin 12 and the input 1 oE a timing signal R25 x C27 from the pin 11 are both at high state, the output m of the first AND gate 124a will be high with a time duration provided by the RC circuit R25, C27. Because the time of this "H" signal from the R25, C27 is sufficient for the charging loop R29, C29 to be charged to a high voltage level, the output n thereof will be at high state, and through the first and second NOT gates 124b and 124c, this "H"'signal will remain high at the output r of the second NOT gate 124c. In the preferred embodiment, this "H" signal is the "up" signal. However, when the pin 11 of the second IC MSI2 outputs an "~I" signal with a time duration provided by the RC circuit R24, C26, due to the fact that the configuration of the preferred embodiment of this invention is based on R25 x R27 > 2/3 R29 x C29, the time of the "H" slgnal from the RC circuit R24, C26 will not enable the RC charging circui-t R29, C29 of the "up" state discriminating loop 121 to be charged to a high voltage level. Thus, the output o of the first NOT
gate 124b is also at high state. Meanwhile, as the "H"
signal of the first AND gate 124a is rendered as an "L"
signal through the third NOT gate 125a, the RC discharg-ing circuit R31, C31 will discharge to a low voltage level in the predetermined RC time; while, upon receiving the "H" signal from the output o of the first NOT gate 124b and output p from the RC discharging circuit R31, C31, the second AND gate 125b will output an "H" signal therefrom. This "H" sigrlal output in the preferred embo-diment is the "down" signal.
The "stop" state discriminating loop 123 is composed of a fourth NOT gate 126a and a third AND gate 126b, both of which are respectively connected to the pin 11 and pin 12 of the second IC MSI2, when the output of -the pin 12 is an "L" signal while the output of the pin 11 is an "H"
signal having a time duration from the the RC circuit R24, C26,~ the output s of the third AND gate 126b will be an "H" signal which is the "stop" signal in the preferred embodiment. Owing to the fact that -the output signal of the first IC MSIl is relayed to the first AND gate 124a of the "down" state loop 122 through an OR gate 114; when the input of the pin 12 of the second IC MSI2 is at "L"
state and being converted into an "H" state through the 3~
fourth NOT gate 126a, the signal fed into the third A~D
gate 126b is always kept at "~" state. Under this condition, as soon as the superheterodyne receiver 111 has a signal in output thereat, this output signal will be instantly encoded by the second IC MSI2 and output therefrom. This is the instant "s-top" configuration specifically arranged in the preferred embodiment of this invention for effecting the emergency stop operation of the automatic rolling door.
The second triggering circuit 130 is mainly combined with an RC loop R26, C28, and three groups of SCR and relay loops SCRl, Rll; SCR2, RL2; and SCR3, RL3, respec-tively coupled with with the "up", "down" and "stop"
state discriminating loops 121, 122 and 123. When a signal is output from the corresponding discriminating loops 121, 122 and 123, the associated SCR will be ener-gized to activate related relay RL in operation. It shall be appreciated that the RC circuit R26, C28 is arranged therein for keeping the triggering circuit 130 in stable condition. ln addition, since the hold current (IH) of the resistor R26 and the relay RL is lower than that of the SCR, after the capacitor C28 charges the SCR
to keep a hold current therewith, the SCR will be turned off thereat. As a result, very minimal spike-waves are produced by the SCR so that there js no need to connect an RC loop to each SCR.
The feedback circuit 140 is primarly composed of a diode loop D3, D4 and an integrating loop C32, R32. As 3233~1 can be seen in the drawing, when any one of the SCR and relay groups SCRl, RLl; SCR2, RL2; and SCR3, RL3 is energized to conduct thereat, a sinusoidal wave signal will be developed across the diode loop D3, D4 and rectified thereErom, and then, the rectified signal will be shaped in chopped condition by a diode D2 and inverted as an "L" signal through the integrating loop C32, R32, from which an "L" signal is fed back to the pin 12 of the second IC MSI2 accordingly.
The control circuit 150 is combined with an "up"
control loop 151, a "down" control loop 152 and a "stop"
control loop 153, where the "up" and "down" control loops 151, 152 are respectively under the control of the relays RI.l and RL2 with interlocking effect. When the "up" or "down" relay RLl or RL2 is activated, the coil U or D of the "up" or "down" control loops 151, 152 will be energized to drive the related mechanism of the automatic rolling door to move up or down therefrom. However, when the automatic rolling door has reached at the locating point set by a limit switch LSU (for up) or LSD (for down) during the movement, the associated circuit will be turned off, and the coil U or D is thus demagnetized and recovered to its original state. On the other hand, as the "stop" control loop 153 is connected in series with the "up" and "down" control loops 152 and 153, when the "stop" relay RL3 is activated, both the "up" loop 151 and the "down" loop 152 will be disenabled therea-t.
~3~
Referring to Fig. 6, there is shown an operational time sequence of the preferred embodiment illustrated in Fig. 5. As shown in Fig. 6, the time sequence is divided into three parts a, b and c, respectively representing the "up", "down" and "stop" state operations. When the input terminals 1 and k of the first AND gate 124a are at "H" state with the terminal 1 having a time duration from R25 x C27 of the second IC MSI2, the output m of the first AND gate 124a will output an "H" signal with a time duration provided from the R25, C27. This "H" signal output is then changed into a high-voltage level at the input terminal n through the charging and discharging operations of the RC circuit R29, C39, and, after successive conversions through the first and second NOT
gates 124a and 124b, an "H" signal will be produced at the output r thereof. Shown in Fig. 6(b) is a time sequence of the "down" state operation. When another "H"
signal with a time from the R24, C26 of the second IC
MSI2 is fed into the first AND gate 124a, the output m thereof wi11 also be at an "H" state. However, due to the short time duration from the R24, C26, this "H"
state cannot enable the RC circuit R29, C29 of the "up"
state control loop 121 to be charged to a high-voltate level. Therefore, the output of the "up" state control loop 121 is maintained at "L" state. Meanwhile, the "H"
signal from the R24, C26 is inverted into an "L" signal through the third NOT gate, causing the RC discharging circuit R31, C31 to suddenly go up to an "H" state and 3~33~
then s-tarting to discharge so that an "H" signal will be output from the terminal q of the second AND gate 125b accordingly.
It shall be appreciated that the preferred embodiment of the signal receiving unit 2 sho~n in Fig. 5 can be modified to including only one PCM tri-state address IC in the- PCM signal decoding circuit llO
provided that the encoding numbers of the modified embodiment are the same as that of the transmitting unit l. As shown in Fig. 7, a modified preferred ernbodiment of the signal receiving unit 2 according to this invention comprises a PCM signal decoding circuit llO, a tri-state signal discriminating circuit 120, a triggering circuit 130 and a feedback circuit l~0. As can be seen in the drawing, only one PCM tri-sate address IC MSI is used, and the control circuit 150 in Fig. 5 is also rernoved without affecting the performance of the preferred embodiment of the signal receiving unit 2.
,i.:\~
Claims (18)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A radio remote control apparatus with encoded signals for automatic rolling doors comprising:
(a). a signal transmitting device combined with:
a control signal setting means for providing different kinds of control signals to be output one kind at a time on selective basis;
a memory means coupled with said control signal setting means for outputting a series of tri-state signals of "up", "down" and "stop" in conjunction with said control signal setting means;
a function encoding means associated with said memory means for providing a series of encoded tri-state signals;
a tri-state address encoding means connected to said function encoding means for providing a series of encoding numbers in multiple powers of base 3;
a counting means connected to said memory means for providing oscillations and outputting a series of alternating pulses;
an address converting means coupled with said tri-state address encoding means and said counting means for outputting a series of encoded address signals;
a first triggering means connected with said memory means and said counting means for provi-ding a triggering signal therefrom;
an encoded number transmission means associated with said counting means and said triggering means for transmitting a series of modulated address encoding signals; and a radio transmitting means coupled with said encoded number transmission means for converting said modulated address encoding signas into radio transmitting signals and transmitting same; and (b). a radio receiving device associated with said radio transmitting device and combined with:
a PCM signal decoding means for receiving the radio signal from said radio transmitting device and decoding the same for outputting correct PCM tri-state signals therefrom;
a PCM signal discriminating means connected to said PCM signal decoding means for identifying the tri-state signals input therein and output-ting the identified signals in mono-state;
a second triggering means coupled with said signal discriminating means for converting said mono-state signals into a triggering signal;
a feedback means connected to said second trig-gering means for feeding the triggering signal back to said PCM signal decoding means; and a control means electrically connected to said second triggering means and mechanically coupl-ed with an automatic rolling door for convert-ing said triggering signal into a control signal so that operations of up, down and stop of the automatic rolling door can be safely effected therewith.
(a). a signal transmitting device combined with:
a control signal setting means for providing different kinds of control signals to be output one kind at a time on selective basis;
a memory means coupled with said control signal setting means for outputting a series of tri-state signals of "up", "down" and "stop" in conjunction with said control signal setting means;
a function encoding means associated with said memory means for providing a series of encoded tri-state signals;
a tri-state address encoding means connected to said function encoding means for providing a series of encoding numbers in multiple powers of base 3;
a counting means connected to said memory means for providing oscillations and outputting a series of alternating pulses;
an address converting means coupled with said tri-state address encoding means and said counting means for outputting a series of encoded address signals;
a first triggering means connected with said memory means and said counting means for provi-ding a triggering signal therefrom;
an encoded number transmission means associated with said counting means and said triggering means for transmitting a series of modulated address encoding signals; and a radio transmitting means coupled with said encoded number transmission means for converting said modulated address encoding signas into radio transmitting signals and transmitting same; and (b). a radio receiving device associated with said radio transmitting device and combined with:
a PCM signal decoding means for receiving the radio signal from said radio transmitting device and decoding the same for outputting correct PCM tri-state signals therefrom;
a PCM signal discriminating means connected to said PCM signal decoding means for identifying the tri-state signals input therein and output-ting the identified signals in mono-state;
a second triggering means coupled with said signal discriminating means for converting said mono-state signals into a triggering signal;
a feedback means connected to said second trig-gering means for feeding the triggering signal back to said PCM signal decoding means; and a control means electrically connected to said second triggering means and mechanically coupl-ed with an automatic rolling door for convert-ing said triggering signal into a control signal so that operations of up, down and stop of the automatic rolling door can be safely effected therewith.
2. A radio remote control apparatus according to Claim 1 wherein said control signal setting means comprises three signal setting loops each hvaing a pushbutton coupled therewith for outputting three different kinds of control signals respectively representing the control of "up", "down" and "stop" operations.
3. A radio remote control apparatus according to Claim 1 wherein said memory means comprises three sets of memory circuit separately connected to said signal setting loops for providing a memorized output in conjunction with the operations of said pushbuttons.
4. A radio remote control apparatus according to Claim 1 wherein said function encoding means comprises a high-impedance semiconductor having an output and a plurality of inputs respectively coupled with said memory means for providing three encoded signals in "open", "high" and "low" states.
5. A radio remote control apparatus according to Claim 1 wherein said tri-state address encoding means comprises an address circuit having a first address portion combined with nine high-impedance semiconduc-tor switches in series, and a second address portion with eight high-impedance semiconductor switches in series-connection with said first address portion for providing an output with a multiplicy of address encoding numbers therefrom.
6. A radio remote control apparatus according to Claim 1 wherein said counting means comprises a counting circuit coupled with said memory means for performing the transmission of a modulated signal in tri-state address encoded number and the feeding back a "clear"
signal to said memory means so as to clear out the control signal thereof.
signal to said memory means so as to clear out the control signal thereof.
7. A radio remote control apparatus according to Claim 1 wherein said address converting means comprises a series-connected NOR gate and NOT gate circuit coupled with said counting means and said tri-state address encoding means for permitting the output of said address encoded numbers one set at a time under the control of said counting means.
8. A radio remote control apparatus according to Claim 1 wherein said first triggering means comprises an OR
gate circuit coupled with both said counting means and said memory means for outputting a high-state triggering signal therefrom.
gate circuit coupled with both said counting means and said memory means for outputting a high-state triggering signal therefrom.
9. A radio remote control apparatus according to Claim 1 wherein said encoded number transmission means comprises a PCM tri-state address IC coupled with said counting means and said first triggering means for outputting a modulated signal with tri-state address encoded numbers.
10. A radio remote control apparatus according to Claim 1 wherein said radio signal transmitting means comprises in combination with an RF oscillator, an amplifier and an antenna and connected to said encoded number transmission means for converting the modulated signals received from said encoded number transmission means into radio signals to be transmitted therefrom.
11. A radio remote control apparatus according to Claim 1 wherein said PCM signal decoding means comprises:
a superheterodyne receiving circuit for receiving the radio signals from said signal transmitting device;
a first PCM signal decoding circuit connected to said superheterodyne receiving circuit and being capable of decoding up to 39 encoding numbers; and a second PCM signal decoding circuit coupled with said superheterodyne receiving circuit and said first PCM signal decoding circuit and being capable of decoding up to 38 encoding numbers; thereby, a great variety of up to 39 x 38 decoding numbers are available for decoding the tri-state signals received from said receiving circuit and outputting them in mono-state PCM signals therefrom.
a superheterodyne receiving circuit for receiving the radio signals from said signal transmitting device;
a first PCM signal decoding circuit connected to said superheterodyne receiving circuit and being capable of decoding up to 39 encoding numbers; and a second PCM signal decoding circuit coupled with said superheterodyne receiving circuit and said first PCM signal decoding circuit and being capable of decoding up to 38 encoding numbers; thereby, a great variety of up to 39 x 38 decoding numbers are available for decoding the tri-state signals received from said receiving circuit and outputting them in mono-state PCM signals therefrom.
12. A radio remote control apparatus according to Claim 11 wherein said first PCM signal decoding circuit includes:
a first PCM tri-state address IC for signal decoding operations;
a first RC oscillating loop connected to said first PCM tri-state address IC for comparing the frequency of the received tri-state signals; and a first RC timing loop coupled with said first PCM
tri-state address IC for encoded number identifica-tion thereof so as to effect an output from said first PCM tri-state address IC within a time limit set by said first RC timing loop.
a first PCM tri-state address IC for signal decoding operations;
a first RC oscillating loop connected to said first PCM tri-state address IC for comparing the frequency of the received tri-state signals; and a first RC timing loop coupled with said first PCM
tri-state address IC for encoded number identifica-tion thereof so as to effect an output from said first PCM tri-state address IC within a time limit set by said first RC timing loop.
13. A radio remote control apparatus according to Claim 11 wherein said second PCM signal decoding circuit includes:
a second PCM tri-state address IC for signal decoding operations;
a second RC oscillating loop connected to said second PCM tri-state address IC for comparing the frequency of the received tri-state signals; and a second RC timing loop coupled with said second PCM
tri-state address IC for encoded number identifica-tion so as to effect an output from said second PCM
tri-state address IC within a time limit set by said second RC timing loop.
a second PCM tri-state address IC for signal decoding operations;
a second RC oscillating loop connected to said second PCM tri-state address IC for comparing the frequency of the received tri-state signals; and a second RC timing loop coupled with said second PCM
tri-state address IC for encoded number identifica-tion so as to effect an output from said second PCM
tri-state address IC within a time limit set by said second RC timing loop.
14. A radio remote control apparatus according to Claim 13 wherein when said first PCM tri-state address IC
and said second PCM tri-state address IC are connected in series, the time limit provided by said first RC timing loop is sufficient for said second PCM tri-state address IC to receive at least two complete PCM tri-state signals.
and said second PCM tri-state address IC are connected in series, the time limit provided by said first RC timing loop is sufficient for said second PCM tri-state address IC to receive at least two complete PCM tri-state signals.
15. A radio remote control apparatus according to Claim 1 wherein said tri-state discriminating means comprises:
an "up" state discriminating loop coupled with said second PCM tri-state address IC;
a "down" state discriminating loop connected to said "up" state discriminating loop; and a "stop" state discriminating loop coupled with said second PCM tri-state address IC and associated with said "up" and "down" state discriminating loops;
thereby, said mono-state signals received from said PCM signal decoding means are respectively discriminated by the related "up", "down" and "stop"
discriminating loops and a mono-state signal involving one of said tri-state signals "up", "down"
or "stop" is output therefrom.
an "up" state discriminating loop coupled with said second PCM tri-state address IC;
a "down" state discriminating loop connected to said "up" state discriminating loop; and a "stop" state discriminating loop coupled with said second PCM tri-state address IC and associated with said "up" and "down" state discriminating loops;
thereby, said mono-state signals received from said PCM signal decoding means are respectively discriminated by the related "up", "down" and "stop"
discriminating loops and a mono-state signal involving one of said tri-state signals "up", "down"
or "stop" is output therefrom.
16. A radio remote control apparatus according to Claim 1 wherein said triggering means comprises three sets of series-connected SCRs and relays respectively coupled with said "up", "down" and "stop" discirminating loops so that when a mono-state signal is output from any one of said "up", "down" and "stop" state discriminating loops, a related SCR will be energized to drive the associated relay for output a control signal therefrom.
17. A radio remote control apparatus according to Claim 1 wherein said feedback means comprises a diode regulating loop and an integrating loop respectively coupled with said triggering means and said PCM
signal decoding means for feeding the control signal of "up" and "down" state back into said PCM signal decoding means.
signal decoding means for feeding the control signal of "up" and "down" state back into said PCM signal decoding means.
18. A radio remote control apparatus according to Claim 1 wherein said control means comprises an "up" control loop, a "down" control loop, and a "stop" control loop combined together, where said "up" control loop and "down" control loop are respectively coupled with the related relays of said second triggering means and the control mechanism of an automatic rolling door for effecting operations of up and down movements; while said "stop" control loop is series-connected with said "up" and "down" control loops, thereby, when a "stop" state signal is received and output therefrom, the operation of the "up" control loop or the "down" control loop will be immediately stopped thereat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000475323A CA1232330A (en) | 1985-02-27 | 1985-02-27 | Radio remote control apparatus with encoded signals for automatic rolling doors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000475323A CA1232330A (en) | 1985-02-27 | 1985-02-27 | Radio remote control apparatus with encoded signals for automatic rolling doors |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1232330A true CA1232330A (en) | 1988-02-02 |
Family
ID=4129921
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000475323A Expired CA1232330A (en) | 1985-02-27 | 1985-02-27 | Radio remote control apparatus with encoded signals for automatic rolling doors |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1232330A (en) |
-
1985
- 1985-02-27 CA CA000475323A patent/CA1232330A/en not_active Expired
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