CA1188777A - Sequential detonation of explosions - Google Patents
Sequential detonation of explosionsInfo
- Publication number
- CA1188777A CA1188777A CA000396095A CA396095A CA1188777A CA 1188777 A CA1188777 A CA 1188777A CA 000396095 A CA000396095 A CA 000396095A CA 396095 A CA396095 A CA 396095A CA 1188777 A CA1188777 A CA 1188777A
- Authority
- CA
- Canada
- Prior art keywords
- signal
- module
- calibrating
- mode
- timing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42D—BLASTING
- F42D1/00—Blasting methods or apparatus, e.g. loading or tamping
- F42D1/04—Arrangements for ignition
- F42D1/045—Arrangements for electric ignition
- F42D1/05—Electric circuits for blasting
- F42D1/055—Electric circuits for blasting specially adapted for firing multiple charges with a time delay
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25054—Calibration timer, compare 1st, number of pulses during calibration with second counter
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/26—Pc applications
- G05B2219/2665—Detonator, fuze
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Measurement Of Unknown Time Intervals (AREA)
- Air Bags (AREA)
Abstract
ABSTRACT
A system for the sequential detonation of explosions.
There is a series of activating modules connected in parallel with a shot exploder. The shot exploder supplies a series of calibrating signals. The first calibrating signal calibrates the first module in the series and successive calibrating signals calibrate successive modules. After each module has been calibrated it supplies a mode switching signal to the next module, so that the said next module responds to the next calibrating signal and is calibrated by it. Each module has an internal oscillator (14), a calibrating counter (22), a timing counter (20) and a comparator (24). The timing signals of the oscillator (14) are routed to the counters (20, 22) via gates (16, 18). A mode control section (42) supplies a calibration mode signal to the gate (18) for the calibrating counter (22) and a timing mode signal to the gate (16) for the timing counter (20). The mode control section (42) supplies the calibration mode signal when it receives a mode switching signal at an input terminal (40) and a calibrating signal from the shot exploder via a pulse discriminator (34). The timing mode signal is supplied at the end of the calibrating signal.
A mode switching signal is then also supplied to the next module via an output terminal (50). In the timing mode, the count of the timing counter (20) is compared with that of the calibrating counter (22) by a comparator (24). When the counts are equal the comparator (24) resets the timing counter (20) and increases the count of a delay counter (26). When the delay counter (26) has a count of 36 an activating signal is supplied to the detonator connected to that module via a terminal (28).
A system for the sequential detonation of explosions.
There is a series of activating modules connected in parallel with a shot exploder. The shot exploder supplies a series of calibrating signals. The first calibrating signal calibrates the first module in the series and successive calibrating signals calibrate successive modules. After each module has been calibrated it supplies a mode switching signal to the next module, so that the said next module responds to the next calibrating signal and is calibrated by it. Each module has an internal oscillator (14), a calibrating counter (22), a timing counter (20) and a comparator (24). The timing signals of the oscillator (14) are routed to the counters (20, 22) via gates (16, 18). A mode control section (42) supplies a calibration mode signal to the gate (18) for the calibrating counter (22) and a timing mode signal to the gate (16) for the timing counter (20). The mode control section (42) supplies the calibration mode signal when it receives a mode switching signal at an input terminal (40) and a calibrating signal from the shot exploder via a pulse discriminator (34). The timing mode signal is supplied at the end of the calibrating signal.
A mode switching signal is then also supplied to the next module via an output terminal (50). In the timing mode, the count of the timing counter (20) is compared with that of the calibrating counter (22) by a comparator (24). When the counts are equal the comparator (24) resets the timing counter (20) and increases the count of a delay counter (26). When the delay counter (26) has a count of 36 an activating signal is supplied to the detonator connected to that module via a terminal (28).
Description
THIS IN~ENTION relates to the sequential detonation of explosions.
The applicant is aware of a suggestion for a deton-ating system which has a series of activating modules which are all remotely supplied, simultaneously, with a calibrating time signal which determines the intershot time interval. Each module has a local oscillator, two counters and a comparator.
Thus, a first one of the counters counts the number of signals supplied by the oscillator during the calibration period and the second counter then counts the number of signals supplied by the oscillator in operation and when the comparator detects that the two counters have the same count it supplies a signal which resets the second counter and also increases the count of a third counter. When the third counter has counted a predetermined number it supplies an activating signal to a detonator.
With the ~bo~edescribed sug~ested system calibration of all the' modules takes place before a first ~nodule in the series is acti~ated. The accuracy of the modules is determined by the'stability of the' oscillators of the modules. Thus the oscillator of the last module n~st be su~ficiently stable for a time ~eriod of T ~ nt where T is the interyal between finalisa-tion of calibration and acti~ation of the first module, n is the number of modules, and -t is the intershot interval.
Further, with the aboyedescribed suggested system, the intershot interval is fixed for all the modules.
In an attempt to overcome or minimise these disad-vantages it is proposed that the modules be successively calibrated.
Thus, according to the invention there is provided an activating module for a sequential activating system having a series of the modules, which includes a timing signa]. generating means for generating a timing signal;
a mode control means for supplying a calibration mode signal, an operative mode signal, and an output mode switching signal to be supplied to a successive module in a series thereof;
a calibrating recording means for recording the timing signal when in a calibration mode and for supplying a recorded calibration signal;
an operatiye timing signal determining means responsive to the mode control means for determining when the timing signal generating means has generated an operatiye timing signal, when in the operatiye-mode, that has a predetermined relationship to the recorded ca].ibration signal and for supplying a prompting ~ .. . . _, .
. siynal which is supplied directly to a ~etonator or to a further processing means when the operative timing signal has been generated;
a calibrating signal supply connection means for connecting the module to a shot exploder which supplies a series of calibrating signals for successive modules in a series thereof;
a first gate means, responsive to the mode control means, the output o~ which is supplied to the calibrating recordi.ng means for enabling the calibrating recording means whilst the appropriate calibrating signal is extant;
a mode control input connection means for receiving an input mode switching signal that the module is to go into its calibration mode and for supplying the input mode switching signal to the mode control means;
a second gate means, responsive to the mode control means, connecting the timing signal generating means with the operative timing signal determining means; and a mode control output connection means for supplying the mode switching signal to a successive module in a series thereof.
The timing signal genera-ting means may conveniently include an oscillator. The oscillator may generate a series of signals. For example, the oscillator may generate a square wave or pulses. Thus, the calibrating recordiny means may include a calibrating counter for counting and recording the number of signals generated by the oscil.lator whilst the calibrating signal is extant. Similarly, ~he operative timing signal determing means may include a timing counter for .~
counting the number of signals generated by the oscillator and a comparator for comparing the count of the timing counter with that o~ the calibrating counter and supplyi.n~ an output signal when the two counts are equal. ~s a furthe~ feature, the output signal of the comparator may reset the timing counter which then starts countin~ again. The operative timiny signal determining means may thus include a further counter for counting the number of times the comparator supplies its output signal and for supplying the prompting signal when it has counted a predeterm:ined number. It will thus be appreciated that the time between shots will be the time duration of the su~cessi~e calibrating signals and the number of modules that have been calibrated before the first detonator is activated wili be dependent on the predetermined count of the further counter.
It will be understood that the mode control means suppiies its calibrating mode signal when it has received its inpu~ mode switching signal and for the duration of the calibrating signal received thereafter. The mode control means may then supply the operative mode signal at the end of the calibrating siynal received by it after receipt by it of the input mode switching signal, i.e. at the end of the calibrating mode. Further, the mode control means may supply the output mode switching si~nal at the same time as the operative mode signal. ~n order to ensure that the module does not react to any further input mode switching signals or calibratin~
signals, the mode control means m,ay latch itself by means of the operative mode si~nal, to maintain supply o,f this signal.
In a preferred form, the control ~eans supplies the 77'7 calibration mode signal, after receipt by it of the input mode switching signal, for so long as it receives the calibrating signal, and the calibrating counter then counts the number of timing signals generated by the oscillator during the duration of the calibration mode signal. In a preferred form, the control means may also comprise a network of logic and bistable elements.
It will further be appreciated that the module will need to be connected or connectable with a detonator~ Thus, the module may include a detonator connection means for connection thereof to a detonator, an activating signal being supplied to the detonator either directly from the operative timing signal determining means or the further processing means.
Still further according to the invention there is provided a sequential activating system~which includes a shot exploder for supplying power and a series of calibrating signals;
a series of modules according to the invention, with the calibrating signal supply connection means of each module being connected to the shot exploder, the mode control input connection means of a first module in the series being connected to the shot exploder, and the mode control input connection means of a second and each successive module in the series being connected to the mode control output connection means of its imrnediately preceding module.
r,~
The invention also extends to a method of activatiny a series of detonators which includes providing a series of activating modules;
supplying a calibrating signal to a first one of the modu]es and successive calibrating signals to successive modules in the series; and with each module a) generating internally a timing signal;
b) placing it in a calibration mode;
c) supplying it with the appropriate calibrating signal having a predetermined time duration;
d) determining and recording the value of timing signal - . equal to that calihrating signal -- e) placing the module in an operative mode;
f) determining when the timing signal generated during the operative mode has a predetermined relationship to the recorded value of the timing signal; and . g) activating a detonator associated with that module when the timing signal generated during the operative mode attains the predetermined relationship.
The invention is now described, by way of an example t with reference to the accompanying drawings in which:
Figure 1 shows a circuit diagram of part of an activating module in accordance with the invention;
Figure 2 shows schematicall~ how a series of activating modules are inter-connected with a shot exploder and detonators to provide a detonating system in accordance with the inven-tion, and Figure 3 sho~s a series of timing diagrams.
Referring to Figure 1, shown generally therein by reference numeral 10 is an activating module for a sequential activating system. The module 10 has an internal timing arrangement 12 which comprises a local oscillator 14 which generates a square wave, two 2-input NAND-gates 16 and 18, a timing counter 20 and a calibrating counter 22, a comparator 24, and a divide-by-32 counter 26. The oscil]ator 14 supplies a signal of any frequency within predetermined design limits.
The long term stability of the frequency oE oscillation of the signal is not critical. The timing arrangement 12 is calibrated by means of a signal supplied from a remote shot exploder (as will be discussed hereinafter with reference to Figure 2). As indicated, the square wave signal supplied by the oscillator 14 -is supplied to inputs 16.1 and 18.1 of the gates 16 and 18. To ..... .
place the timing arrangement 12 in a calibrating mode, a calibration mode signal is supplied to the input 18. 2 o:E the gate 18. To place the timing arrangement 12 in an operative mode, an operative mode signal is supplied to the input 16 . 2 o~
the gate 16. When the gate 18 is opened by means of a calibration mode signal supplied to its terminal 18.2, pulses are supplied to the calibrating counter 22. The calibrating counter 22 counts the number of pulses supplied hy the generator 14 whilst in the calibration mode. This count is held by the calibrating counter 22. It will be appreciated, __~_ _ when in the operative mode, the timing gate 16 is opened and d ~ 9 the square waye pulses ~enerated by the oscillator 14 are supplied to the timing counter 20, at substantially the same frequency as when in the calibration mode. The timin~ counter 20 counts these pulses, the comparator 24 comparin~ the count in the counters 20 and 22. When the ti~ing counter 20 has counted the same number as that stored in the calibrating counter 22, the comparator 24 supplies a signal to the counter 26 and also a re set signal to the timing counter 20. The timing counter 20 then begins counting from zero again and when it has counted the same number as stored by the calibrating counter 22 a further signal is supplied by the comparator 24.
This carries on until such time as the counter 26 has reached a count of 32, at which time it supplies an activating signal to a terminal 28, to which in use an instantaneous electric detonator is connected as is shown in Fig-ure 2 and discussed hereinafter.
Power and calibrating signals are supplied to the module 10 via terminals 30 and grounded terminals 32. The module dis-criminates between DC power supply and calibrating signals by means of a pulse discriminator 34 which is connected to the terminals 30. The pulse discriminator supplies an inverted signal. If a DC energising signal is supplied this is routed by the pulse discriminator 34 to output 34.1 to which is connected an energy storage capacitor 36. Calibrating signals are supplied, logically inyerted, to an output 34.~. This output is connected to Qne of the inp~ts 38.1 of a 3-input NAND
gate 38. A second input 38.2 is connected to a mode control 7~7 input terminal 40 via an inverter 39 and a third input 38.3 is connected to a ~eedback supply from an inverter 48. The output of the gate 38 is suppplied to a D-flip-flop 44 which in turn is connected to an R-S flip-flop 46. The D-flip-~lop responds to a negative-going signal. As shown, the output of the f lip-flop 44 is also connected to the input 18.2 of the NAND gate 18. Similarly, the output of the R-S flip-flop 46 is connected to the input 16.2 of the NAND gate 16~ It is also ~ed back to the input 38.3 of the NAND gate 38 via the inverter 48.
Finally, it will be noted that the output of the ~-S flip-flop 46 is also connected to a mode control output terminal 50, via an inverter 51. The inverters 38, 48 and 51, gate 38, a flip-flops 44 and 46 constitute a mode control section.
In operation, when the module is energised, the flip-flops 44 and 46 are reset so that their outputs are low. This is accomplished by a suitable network (not shown~ as is well known in the art. As a result of the inverter 48 a high signal is fed back to the NAND gate 38. When the module 10 is to be calibrated, a high signal is supplied to the input terminal 38.2 of the NAND gate 38 via a low signal supplied to the t.erminal 40 which is inverted by the inverter 39. When the next calibration signal arrives at the module 10 via the terminal 30 it is inverted and routed by means of the pulse discriminator 34 to the input 38.1 of the NAND gate 38. The output ol the NAND gate 38 accordingly goes low~ changing the state of the flip-flop 44. A high signal is then supplied by the flip-flop 44 to the NAND gate 18 and pulses are accordingly routed to the counter 22 as described above. At the termination of the calibrating signal the output of the NAND gate 38 again goes low~ changing the state of the D flip-flop 44 which in turn sets the flip-flop 46 whose output accordingly ~oes high.
This signal which is supplied to the NAND gate 16 places the timing arrangement 12 in its operative mode and timing commences~ The signal that is fed back to the NANV gate 38 is low which accordingly disables the NAND gate 38. rrhe output of the flip-flop 46 thereafter stays high. A low signal is also supplied at the terminal 50.
Reference is now made to Figure 2 in which is shown the -manner in which a number of the modules 10 are inter-connected with a shot exploder 52 to provide a system for sequentially activating a series of detonators 54.1, 54.2, 54.3. The shot exploder 52 has outputs 56 and 58. These outputs are connected to the terminals ~0 and 32 of the modules 10 by means of cables 60 and 62. Further, the terminal 40 of a first one of the modules 10.1 is connected to its terminal 32. By this means, the first module 10.1 is enabled so that when a calibration signal is supplied to the system via the cables 60 and 62 the NAND gate 38 of the module 10.1 is enabled. It will further be noted that the mode control output terminal 50 of each module is connected to the mode control input ter~inal 40 of the next module. It will thus be understood that when the shot exploder 52 generates its ener~ising signal, all the modules 10 are energised. ~hen the ~irst calibrating signal is supplied it is routed by the pulse discriminatol-s 34 of all the ~odules to their associated N~ND gates 38. Howeyer, ~s only the first module 10.1 will be supplied with a calihrating enable signal by its terminal 40, only the -timiny arrangement 12 of that module 10.1 will go into its calihration ~ode with its calibrating counter 22 recording the number of signals supplied by the oscillator 14 whilst the calibrating signal is present.
Thus, at the beginning of the ~irst calibrating si~nal 66 (as shown in Figure 3(a)) having a duration of Tl the signal supplied to the input 38.1 of the N~ND gate 38 changes from a low to a high. The output of the NAND gate 38 accordingly goes low causing the flip-f~op 44 of the first module 10.1 to change state as is shown at 68 in Figure 3(b). At the end of the first calibrating signal, the signal supplied to input 38.1 again changes from a low to a high such that the output of the NAND gate 38 goes low, causing the flip-flop 44 to once again change state. At this stage the output of the flip-flop 44 goes low causing the flip-flop 46 to be set, and go high, as is shown at 70 in Figure 3 (c). The fed-back signal disables the NAND gate 38. Further, the high signal from the flip-flop 46 of the first module 10.1 is inverted and supplied via its output terminal 50 to the input terminal 40 of the nex-t module 10.2 which in turn enables the NAND gate 38 of that module.
Thus, when the next cal'ibrating signal 72 having a duration of T2 is supplied, it is routed to the timing arrangement 12 of the module 10.2. At the end of the second calibrating signal 72 the R-S fli~-flop 46 of the second module 10.2 is set, causing its out~)ut to go high as is indicated at 74 in ~igure 3 (d~. ~s was inclicated earlier, a hi'~h si~nal supplied by the flip-flop 46 o~ any module 10 ~ aces its ti~ing arrangement 12 in an operatiye mode. Thus, a-fter a time period equal to 32 x Tl after the ~-S flip-flop 46 o~ the first module 10.1 has changed sta-te, a firing si~nal is supplied to its associated detonator 34.1 ~ia its output terminal 28. Similarly, a time interval 32 x T2 after the ~-S flip-flop 46 of the second module 10.2 has changed state, its detonator 54.2 is supplied with an activating si~nal. It will be appreciated that the interval between activation of the detonator 54.1 and activation of the detonator 54.2 will be T2 + 32 (T2 - Tl). I'hus, as the last module in a series thereof is calibrated some time after the first module, its oscillator has to be stable for a much shorter time than if it had been calibrated at the same time.
F~~rther, with the invention, each module may be separately c~librated with a different time interval, if so desired.
.....
. _,~ , .
"
The applicant is aware of a suggestion for a deton-ating system which has a series of activating modules which are all remotely supplied, simultaneously, with a calibrating time signal which determines the intershot time interval. Each module has a local oscillator, two counters and a comparator.
Thus, a first one of the counters counts the number of signals supplied by the oscillator during the calibration period and the second counter then counts the number of signals supplied by the oscillator in operation and when the comparator detects that the two counters have the same count it supplies a signal which resets the second counter and also increases the count of a third counter. When the third counter has counted a predetermined number it supplies an activating signal to a detonator.
With the ~bo~edescribed sug~ested system calibration of all the' modules takes place before a first ~nodule in the series is acti~ated. The accuracy of the modules is determined by the'stability of the' oscillators of the modules. Thus the oscillator of the last module n~st be su~ficiently stable for a time ~eriod of T ~ nt where T is the interyal between finalisa-tion of calibration and acti~ation of the first module, n is the number of modules, and -t is the intershot interval.
Further, with the aboyedescribed suggested system, the intershot interval is fixed for all the modules.
In an attempt to overcome or minimise these disad-vantages it is proposed that the modules be successively calibrated.
Thus, according to the invention there is provided an activating module for a sequential activating system having a series of the modules, which includes a timing signa]. generating means for generating a timing signal;
a mode control means for supplying a calibration mode signal, an operative mode signal, and an output mode switching signal to be supplied to a successive module in a series thereof;
a calibrating recording means for recording the timing signal when in a calibration mode and for supplying a recorded calibration signal;
an operatiye timing signal determining means responsive to the mode control means for determining when the timing signal generating means has generated an operatiye timing signal, when in the operatiye-mode, that has a predetermined relationship to the recorded ca].ibration signal and for supplying a prompting ~ .. . . _, .
. siynal which is supplied directly to a ~etonator or to a further processing means when the operative timing signal has been generated;
a calibrating signal supply connection means for connecting the module to a shot exploder which supplies a series of calibrating signals for successive modules in a series thereof;
a first gate means, responsive to the mode control means, the output o~ which is supplied to the calibrating recordi.ng means for enabling the calibrating recording means whilst the appropriate calibrating signal is extant;
a mode control input connection means for receiving an input mode switching signal that the module is to go into its calibration mode and for supplying the input mode switching signal to the mode control means;
a second gate means, responsive to the mode control means, connecting the timing signal generating means with the operative timing signal determining means; and a mode control output connection means for supplying the mode switching signal to a successive module in a series thereof.
The timing signal genera-ting means may conveniently include an oscillator. The oscillator may generate a series of signals. For example, the oscillator may generate a square wave or pulses. Thus, the calibrating recordiny means may include a calibrating counter for counting and recording the number of signals generated by the oscil.lator whilst the calibrating signal is extant. Similarly, ~he operative timing signal determing means may include a timing counter for .~
counting the number of signals generated by the oscillator and a comparator for comparing the count of the timing counter with that o~ the calibrating counter and supplyi.n~ an output signal when the two counts are equal. ~s a furthe~ feature, the output signal of the comparator may reset the timing counter which then starts countin~ again. The operative timiny signal determining means may thus include a further counter for counting the number of times the comparator supplies its output signal and for supplying the prompting signal when it has counted a predeterm:ined number. It will thus be appreciated that the time between shots will be the time duration of the su~cessi~e calibrating signals and the number of modules that have been calibrated before the first detonator is activated wili be dependent on the predetermined count of the further counter.
It will be understood that the mode control means suppiies its calibrating mode signal when it has received its inpu~ mode switching signal and for the duration of the calibrating signal received thereafter. The mode control means may then supply the operative mode signal at the end of the calibrating siynal received by it after receipt by it of the input mode switching signal, i.e. at the end of the calibrating mode. Further, the mode control means may supply the output mode switching si~nal at the same time as the operative mode signal. ~n order to ensure that the module does not react to any further input mode switching signals or calibratin~
signals, the mode control means m,ay latch itself by means of the operative mode si~nal, to maintain supply o,f this signal.
In a preferred form, the control ~eans supplies the 77'7 calibration mode signal, after receipt by it of the input mode switching signal, for so long as it receives the calibrating signal, and the calibrating counter then counts the number of timing signals generated by the oscillator during the duration of the calibration mode signal. In a preferred form, the control means may also comprise a network of logic and bistable elements.
It will further be appreciated that the module will need to be connected or connectable with a detonator~ Thus, the module may include a detonator connection means for connection thereof to a detonator, an activating signal being supplied to the detonator either directly from the operative timing signal determining means or the further processing means.
Still further according to the invention there is provided a sequential activating system~which includes a shot exploder for supplying power and a series of calibrating signals;
a series of modules according to the invention, with the calibrating signal supply connection means of each module being connected to the shot exploder, the mode control input connection means of a first module in the series being connected to the shot exploder, and the mode control input connection means of a second and each successive module in the series being connected to the mode control output connection means of its imrnediately preceding module.
r,~
The invention also extends to a method of activatiny a series of detonators which includes providing a series of activating modules;
supplying a calibrating signal to a first one of the modu]es and successive calibrating signals to successive modules in the series; and with each module a) generating internally a timing signal;
b) placing it in a calibration mode;
c) supplying it with the appropriate calibrating signal having a predetermined time duration;
d) determining and recording the value of timing signal - . equal to that calihrating signal -- e) placing the module in an operative mode;
f) determining when the timing signal generated during the operative mode has a predetermined relationship to the recorded value of the timing signal; and . g) activating a detonator associated with that module when the timing signal generated during the operative mode attains the predetermined relationship.
The invention is now described, by way of an example t with reference to the accompanying drawings in which:
Figure 1 shows a circuit diagram of part of an activating module in accordance with the invention;
Figure 2 shows schematicall~ how a series of activating modules are inter-connected with a shot exploder and detonators to provide a detonating system in accordance with the inven-tion, and Figure 3 sho~s a series of timing diagrams.
Referring to Figure 1, shown generally therein by reference numeral 10 is an activating module for a sequential activating system. The module 10 has an internal timing arrangement 12 which comprises a local oscillator 14 which generates a square wave, two 2-input NAND-gates 16 and 18, a timing counter 20 and a calibrating counter 22, a comparator 24, and a divide-by-32 counter 26. The oscil]ator 14 supplies a signal of any frequency within predetermined design limits.
The long term stability of the frequency oE oscillation of the signal is not critical. The timing arrangement 12 is calibrated by means of a signal supplied from a remote shot exploder (as will be discussed hereinafter with reference to Figure 2). As indicated, the square wave signal supplied by the oscillator 14 -is supplied to inputs 16.1 and 18.1 of the gates 16 and 18. To ..... .
place the timing arrangement 12 in a calibrating mode, a calibration mode signal is supplied to the input 18. 2 o:E the gate 18. To place the timing arrangement 12 in an operative mode, an operative mode signal is supplied to the input 16 . 2 o~
the gate 16. When the gate 18 is opened by means of a calibration mode signal supplied to its terminal 18.2, pulses are supplied to the calibrating counter 22. The calibrating counter 22 counts the number of pulses supplied hy the generator 14 whilst in the calibration mode. This count is held by the calibrating counter 22. It will be appreciated, __~_ _ when in the operative mode, the timing gate 16 is opened and d ~ 9 the square waye pulses ~enerated by the oscillator 14 are supplied to the timing counter 20, at substantially the same frequency as when in the calibration mode. The timin~ counter 20 counts these pulses, the comparator 24 comparin~ the count in the counters 20 and 22. When the ti~ing counter 20 has counted the same number as that stored in the calibrating counter 22, the comparator 24 supplies a signal to the counter 26 and also a re set signal to the timing counter 20. The timing counter 20 then begins counting from zero again and when it has counted the same number as stored by the calibrating counter 22 a further signal is supplied by the comparator 24.
This carries on until such time as the counter 26 has reached a count of 32, at which time it supplies an activating signal to a terminal 28, to which in use an instantaneous electric detonator is connected as is shown in Fig-ure 2 and discussed hereinafter.
Power and calibrating signals are supplied to the module 10 via terminals 30 and grounded terminals 32. The module dis-criminates between DC power supply and calibrating signals by means of a pulse discriminator 34 which is connected to the terminals 30. The pulse discriminator supplies an inverted signal. If a DC energising signal is supplied this is routed by the pulse discriminator 34 to output 34.1 to which is connected an energy storage capacitor 36. Calibrating signals are supplied, logically inyerted, to an output 34.~. This output is connected to Qne of the inp~ts 38.1 of a 3-input NAND
gate 38. A second input 38.2 is connected to a mode control 7~7 input terminal 40 via an inverter 39 and a third input 38.3 is connected to a ~eedback supply from an inverter 48. The output of the gate 38 is suppplied to a D-flip-flop 44 which in turn is connected to an R-S flip-flop 46. The D-flip-~lop responds to a negative-going signal. As shown, the output of the f lip-flop 44 is also connected to the input 18.2 of the NAND gate 18. Similarly, the output of the R-S flip-flop 46 is connected to the input 16.2 of the NAND gate 16~ It is also ~ed back to the input 38.3 of the NAND gate 38 via the inverter 48.
Finally, it will be noted that the output of the ~-S flip-flop 46 is also connected to a mode control output terminal 50, via an inverter 51. The inverters 38, 48 and 51, gate 38, a flip-flops 44 and 46 constitute a mode control section.
In operation, when the module is energised, the flip-flops 44 and 46 are reset so that their outputs are low. This is accomplished by a suitable network (not shown~ as is well known in the art. As a result of the inverter 48 a high signal is fed back to the NAND gate 38. When the module 10 is to be calibrated, a high signal is supplied to the input terminal 38.2 of the NAND gate 38 via a low signal supplied to the t.erminal 40 which is inverted by the inverter 39. When the next calibration signal arrives at the module 10 via the terminal 30 it is inverted and routed by means of the pulse discriminator 34 to the input 38.1 of the NAND gate 38. The output ol the NAND gate 38 accordingly goes low~ changing the state of the flip-flop 44. A high signal is then supplied by the flip-flop 44 to the NAND gate 18 and pulses are accordingly routed to the counter 22 as described above. At the termination of the calibrating signal the output of the NAND gate 38 again goes low~ changing the state of the D flip-flop 44 which in turn sets the flip-flop 46 whose output accordingly ~oes high.
This signal which is supplied to the NAND gate 16 places the timing arrangement 12 in its operative mode and timing commences~ The signal that is fed back to the NANV gate 38 is low which accordingly disables the NAND gate 38. rrhe output of the flip-flop 46 thereafter stays high. A low signal is also supplied at the terminal 50.
Reference is now made to Figure 2 in which is shown the -manner in which a number of the modules 10 are inter-connected with a shot exploder 52 to provide a system for sequentially activating a series of detonators 54.1, 54.2, 54.3. The shot exploder 52 has outputs 56 and 58. These outputs are connected to the terminals ~0 and 32 of the modules 10 by means of cables 60 and 62. Further, the terminal 40 of a first one of the modules 10.1 is connected to its terminal 32. By this means, the first module 10.1 is enabled so that when a calibration signal is supplied to the system via the cables 60 and 62 the NAND gate 38 of the module 10.1 is enabled. It will further be noted that the mode control output terminal 50 of each module is connected to the mode control input ter~inal 40 of the next module. It will thus be understood that when the shot exploder 52 generates its ener~ising signal, all the modules 10 are energised. ~hen the ~irst calibrating signal is supplied it is routed by the pulse discriminatol-s 34 of all the ~odules to their associated N~ND gates 38. Howeyer, ~s only the first module 10.1 will be supplied with a calihrating enable signal by its terminal 40, only the -timiny arrangement 12 of that module 10.1 will go into its calihration ~ode with its calibrating counter 22 recording the number of signals supplied by the oscillator 14 whilst the calibrating signal is present.
Thus, at the beginning of the ~irst calibrating si~nal 66 (as shown in Figure 3(a)) having a duration of Tl the signal supplied to the input 38.1 of the N~ND gate 38 changes from a low to a high. The output of the NAND gate 38 accordingly goes low causing the flip-f~op 44 of the first module 10.1 to change state as is shown at 68 in Figure 3(b). At the end of the first calibrating signal, the signal supplied to input 38.1 again changes from a low to a high such that the output of the NAND gate 38 goes low, causing the flip-flop 44 to once again change state. At this stage the output of the flip-flop 44 goes low causing the flip-flop 46 to be set, and go high, as is shown at 70 in Figure 3 (c). The fed-back signal disables the NAND gate 38. Further, the high signal from the flip-flop 46 of the first module 10.1 is inverted and supplied via its output terminal 50 to the input terminal 40 of the nex-t module 10.2 which in turn enables the NAND gate 38 of that module.
Thus, when the next cal'ibrating signal 72 having a duration of T2 is supplied, it is routed to the timing arrangement 12 of the module 10.2. At the end of the second calibrating signal 72 the R-S fli~-flop 46 of the second module 10.2 is set, causing its out~)ut to go high as is indicated at 74 in ~igure 3 (d~. ~s was inclicated earlier, a hi'~h si~nal supplied by the flip-flop 46 o~ any module 10 ~ aces its ti~ing arrangement 12 in an operatiye mode. Thus, a-fter a time period equal to 32 x Tl after the ~-S flip-flop 46 o~ the first module 10.1 has changed sta-te, a firing si~nal is supplied to its associated detonator 34.1 ~ia its output terminal 28. Similarly, a time interval 32 x T2 after the ~-S flip-flop 46 of the second module 10.2 has changed state, its detonator 54.2 is supplied with an activating si~nal. It will be appreciated that the interval between activation of the detonator 54.1 and activation of the detonator 54.2 will be T2 + 32 (T2 - Tl). I'hus, as the last module in a series thereof is calibrated some time after the first module, its oscillator has to be stable for a much shorter time than if it had been calibrated at the same time.
F~~rther, with the invention, each module may be separately c~librated with a different time interval, if so desired.
.....
. _,~ , .
"
Claims (13)
1. An activating module for a sequential activating system having a series of the modules, which includes a timing signal generating means for generating a timing signal;
a mode control means for supplying a calibration mode signal, an operative mode signal, and an output mode switching signal to be supplied to a successive module in a series thereof;
a calibrating recording means for recording the timing signal when in a calibration mode and for supplying a recorded calibration signal;
an operative timing signal determining means responsive to the mode control means for determining when the timing signal generating means has generated an operative timing signal, when in the operative mode, that has a predetermined relationship to the recorded calibration signal and for supplying a prompting signal which is supplied directly to a detonator or to a further processing means when the operative timing signal has been generated;
a calibrating signal supply connection means for connecting the module to a shot exploder which supplies a series of calibrating signals for successive modules in a series thereof;
a first gate means, responsive to the mode control means, the output of which is supplied to the calibrating recording means for enabling the calibrating recording means whilst the appropriate calibrating signal is extant;
a mode control input connection means for receiving an input mode switching signal that the module is to go into its calibration mode and for supplying the input mode switching signal to the mode control means;
a second gate means, responsive to the mode control means, connecting the timing signal generating means with the operative timing signal determining means; and a mode control output connection means for supplying the mode switching signal to a successive module in a series thereof.
a mode control means for supplying a calibration mode signal, an operative mode signal, and an output mode switching signal to be supplied to a successive module in a series thereof;
a calibrating recording means for recording the timing signal when in a calibration mode and for supplying a recorded calibration signal;
an operative timing signal determining means responsive to the mode control means for determining when the timing signal generating means has generated an operative timing signal, when in the operative mode, that has a predetermined relationship to the recorded calibration signal and for supplying a prompting signal which is supplied directly to a detonator or to a further processing means when the operative timing signal has been generated;
a calibrating signal supply connection means for connecting the module to a shot exploder which supplies a series of calibrating signals for successive modules in a series thereof;
a first gate means, responsive to the mode control means, the output of which is supplied to the calibrating recording means for enabling the calibrating recording means whilst the appropriate calibrating signal is extant;
a mode control input connection means for receiving an input mode switching signal that the module is to go into its calibration mode and for supplying the input mode switching signal to the mode control means;
a second gate means, responsive to the mode control means, connecting the timing signal generating means with the operative timing signal determining means; and a mode control output connection means for supplying the mode switching signal to a successive module in a series thereof.
2. A module as claimed in Claim 1, in which the timing signal generating means includes an oscillator.
3. A module as claimed in Claim 1, in which the timing signal generating means includes an oscillator for generating a series of signals and the calibrating recording means includes a calibrating counter for counting and recording the number of signals generated by the oscillator whilst the calibrating signal is extant.
4. A module as claimed in Claim 3, in which the operative timing signal determining means includes a timing counter for counting the number of signals generated by the oscillator and a comparator for comparing the count of the timing counter with that of the calibrating counter, and supplying an output signal when the two counts are equal.
5. A module as claimed in Claim 4, in which the comparator has an output for resetting the timing counter and the operative timing signal determining means includes a further counter for counting the number of times the comparator supplies its output signal and for supplying the prompting signal when it has counted a predetermined number.
6. A module as claimed in Claim 1, in which the mode control means has a sensing means for sensing the termination of the calibrating signal received by it after receipt by it of the input mode switching signal and for then supplying the operative mode signal.
7. A module as claimed in Claim 6, in which the mode control means supplies the operative mode signal and the output mode switching signal at the same time.
8. A module as claimed in Claim 1, in which the mode control means has a latch feedback connection for latching itself upon supplying the operative mode signal to maintain the supply of this signal.
9. A module as claimed in Claim 3, in which the mode control means supplies the calibration mode signal, after receipt by it of the input mode switching signal, for so long as it receives the calibrating signal, and the calibrating counter then counts the number of timing signals generated by the oscillator during the duration of the calibration mode signal.
10. A module as claimed in Claim 1, in which the mode control means comprises a network of logic elements.
11. A module as claimed in Claim 1, which includes a detonator connection means for connection to a detonator.
12. A sequential activating system which includes a shot exploder for supplying power and a series of calibrating signals;
a series of modules as claimed in Claim 1 with the calibrating signal supply connection means of each module being connected to the shot exploder, the mode control input connection means of a first module in the series being connected to the shot exploder, and the mode control input connection means of a second and each successive module in the series being connected to the mode control output connection means of its immediately preceding module.
a series of modules as claimed in Claim 1 with the calibrating signal supply connection means of each module being connected to the shot exploder, the mode control input connection means of a first module in the series being connected to the shot exploder, and the mode control input connection means of a second and each successive module in the series being connected to the mode control output connection means of its immediately preceding module.
13. A method of activating a series of detonators which includes providing a series of activating modules;
supplying a calibrating signal to a first one of the modules and successive calibrating signals to successive modules in the series; and with each module a) generating internally a timing signal;
b) placing it in a calibration mode;
c) supplying it with the appropriate calibrating signal having a predetermined time duration;
d) determining and recording the value of timing signal equal to that calibrating signal e) placing the module in an operative mode;
f) determining when the timing signal generated during the operative mode has a predetermined relationship to the recorded value of the timing signal. and g) activating a detonator associated with that module when the timing signal generated during the operative mode attains the predetermined relationship.
supplying a calibrating signal to a first one of the modules and successive calibrating signals to successive modules in the series; and with each module a) generating internally a timing signal;
b) placing it in a calibration mode;
c) supplying it with the appropriate calibrating signal having a predetermined time duration;
d) determining and recording the value of timing signal equal to that calibrating signal e) placing the module in an operative mode;
f) determining when the timing signal generated during the operative mode has a predetermined relationship to the recorded value of the timing signal. and g) activating a detonator associated with that module when the timing signal generated during the operative mode attains the predetermined relationship.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| ZA81/0944 | 1981-02-12 | ||
| ZA81944 | 1981-02-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1188777A true CA1188777A (en) | 1985-06-11 |
Family
ID=25575197
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000396095A Expired CA1188777A (en) | 1981-02-12 | 1982-02-11 | Sequential detonation of explosions |
Country Status (5)
| Country | Link |
|---|---|
| AU (1) | AU545560B2 (en) |
| CA (1) | CA1188777A (en) |
| GB (1) | GB2093286B (en) |
| NZ (1) | NZ199616A (en) |
| ZW (1) | ZW2182A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5014622A (en) * | 1987-07-31 | 1991-05-14 | Michel Jullian | Blasting system and components therefor |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NO167995C (en) * | 1982-07-02 | 1992-01-02 | Schlumberger Ltd | PROCEDURE AND SYSTEM FOR SELECTIVE BROENN PERFORING BY A SIMPLE WIRE. |
| EG19633A (en) * | 1983-12-22 | 1995-08-30 | Dynamit Nobel Ag | Process for chronologically staggered release of electronic explosive detonating device |
| US5117756A (en) * | 1989-02-03 | 1992-06-02 | Atlas Powder Company | Method and apparatus for a calibrated electronic timing circuit |
| GB9423313D0 (en) * | 1994-11-18 | 1995-01-11 | Explosive Dev Ltd | Improvements in or relating to detonation means |
| DE19525202C1 (en) * | 1995-07-11 | 1996-02-08 | Honeywell Ag | Inductively programmed electronic detonator calibration system |
| ID28799A (en) * | 1998-08-13 | 2001-07-05 | Expert Explosives | EXPLOSIVE STRUCTURE |
| WO2004020934A1 (en) * | 2002-08-30 | 2004-03-11 | Orica Explosives Technology Pty Ltd. | Access control for electronic blasting machines |
| ES2540533T3 (en) | 2007-02-16 | 2015-07-10 | Orica Explosives Technology Pty Ltd | Detonator set, blasting apparatus and corresponding method |
-
1982
- 1982-02-01 NZ NZ199616A patent/NZ199616A/en unknown
- 1982-02-02 ZW ZW21/82A patent/ZW2182A1/en unknown
- 1982-02-02 AU AU79996/82A patent/AU545560B2/en not_active Ceased
- 1982-02-08 GB GB8203610A patent/GB2093286B/en not_active Expired
- 1982-02-11 CA CA000396095A patent/CA1188777A/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5014622A (en) * | 1987-07-31 | 1991-05-14 | Michel Jullian | Blasting system and components therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| NZ199616A (en) | 1985-11-08 |
| GB2093286A (en) | 1982-08-25 |
| GB2093286B (en) | 1985-02-13 |
| ZW2182A1 (en) | 1982-09-18 |
| AU545560B2 (en) | 1985-07-18 |
| AU7999682A (en) | 1982-09-23 |
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