CA1181524A - Electronic postal meter system - Google Patents

Abstract

ELECTRONIC POSTAL METER SYSTEM

ABSTRACT OF THE DISCLOSURE

An electronic postal meter system is separated into a meter unit and an input/output control unit. The two units are linked by a communications link which preferably uses light transmitting fibers to transmit data and instruc-ions. The meter unit is used to process and store only that data which pertains to the critical accounting functions of the meter or to the control of the printer driven by the electronics control within the meter unit. Less critical functions, such as sip-to zone conversions, are restricted to the less secure control unit. By restricting the meter unit to highly critical data and by encoding only the meter unit in a secure housing, the overall security of the meter system is enhanced. Novel failure detect circuitry for a printer setting detector array and a novel event-indicating signal generator circuit are dis-closed. The significant routines employed in the operation of the meter system are described.

Description

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B_G~IOUND OF TIIE INVENrrION

The present invention relates to an electronic postal meter and more particularly to an electronic meter wllich is highl~ secure from tamperiny involving the data processing capabilities of the meter.
Postal meters in use today are, almost universally, mechanical dev_ces in which postage values are set, printed, and accounted for by means of mechanical ajsemblies such as linkages and registers. Such meters include a mechanica' ascending register which provides a record of the amount of postage printed over the life of the meter. The meter also includes a mechanical descending register which provides a record of the amount of postage remaining for use in the meter. To prevent tampering with the critical functions of such mechanical meters, a number of different mechanical inter-locks have been used. Such interlocks prevent a user from printing postage amounts without changing the conten-ts of the ascending and descending registers. Similarly, such inter-locks make it nearly impossible for a user, without leaving telltale signs, to reset the descending register himself to "rechargc" the postal meter.
Electronic postal meters have been deve~oped. In such meters, a computer device such as a microprocessor may calculate postage amounts and cause an electrically dri~en printer to be set to the proper postage amount. ~11 data, including critical accounting data, is stored in electrical format in memory units.

--2 ~ ~ r The advantages of electronic postal meters are kno~n Such n~eters, having fewer mechanical parts, should last longer and prove more reliable than mechanical meters.
Furthermore, electronic postal meters are extremely versatile devices which may perform functions that cannot practisally be performed in a purely mechanical meter. For e~ample, an electronic postal meter may include logic circuitry for determining the destination zone of a package given the zip code of the point o~ origin and the zip code of the point o~
lQ destinatio.~ Moreover, such meters can genera1ly be more -~-e2dill- change1 to ~cc~mmodate changes in t~e postal reglla-tions or rates. Also, such meters are generally capable of perLorming at high speeds, a necessity ror high volume mailing operations.
While electronic postal meters have many advantages, they also present ~-ertain problems which ha~ already been solved in the wide~y-used mechanical postal meters. The use o~ electronics to perform the necessary meter functions renders obsolete man~ of the mechar.ical interlocks formerly

2~ developed to prevent tampering with the meter conten.s.
Naturally, this increases the ris~ that a user knowledgeable in the electronic technologies employed in a postal meter ma~
find a way to print postage amounts ~ithout these amounts beirl-, reaister~d in the descending or ascending registers.
Simil.-rly, a ~no-~le~geable an2 unscrupulous user may attempt to develop a method for "rechar~ing" the meter without the normal]y necessary payment to the Post OLfice - ~notllcr pro1~lcm whic11 can arise Wit]1 electror1ic postal mcLers i5 t11~t their prop~r opcration dcl)ends ul~on the proper functionin~ of m/lnycomPoncnts which cannot be readily in;pLcted. For the most part, thesecomponen~s are "binary' in natl1xe; that is, their output is either on or off~ A failedcomponent may, unless noticed, provide an unchanging output which would be-inteLpret~d erroneously by the microprocessor.
Still another pro~lem with electronic postal l0 meters is that such meters will not necessarily be dis~bled upon a malfunction or failure in a particular section or upon the occurrence of certain events. The meter will con-tinue to function, albeit perhaps improperly, until in-structed to stop.

The present invention is at~ electronic postal meter which is highly secure from tampering. The system includes a meter scction which has a postage printer and an electronic control unit for setting the postage printer and for processing and storing postal accounting and meter sctcing inLormation. The meter section further includes a secure housing which encloses the post~ge printer and the electronic control unit to prevent tampering with either. The system also includes a control unit for processing and storing information other than postal a~counting or meter setting information. A communications link is provided between the meter section and the control unit.

~' . ' , t' ~ ..,.. . ' ~ y isolatincJ tl~at section of thc system including the plintcr and the critical accounting and mcter sctting fullctions frorn thc relnailling ful-ctions of the meter, the access to the critical accounting and meter setting circuitry S can be severely restricted without restrictiog access to the less critical sections of the meter. The less critical sections i~y include such things as postage tabies or the like, which can thus be more readily al~-ered without affecting the accounting information or meter setting information isolated within the secured housing. Thus, a meter serviceman could up-date postage tables or cornputation sections without firsthaviny to call in a Postal Service representative.
In one ell~odiment, the meter verifies the proper operation of the detectors upon which it rclies by temporarily driving parallel amplifier inputs to predetermined signal states while checking the outputs of the amplifiers for the presence of both of two possible signal states. Unless both signal states are detected, the meter operation ~ill be inhibited.

In still another embodiment, an event-indicating signal generator circuit is incorporated into the meter. This circuit includes means for generating at least one event-indicating signal upon the occurrence of a predetermined physical event.
Each different event-indicating signal is applied to a different data input terminal of the processor so that the processor can respond appropriately to the particular type of event.

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The present invention is an improvement in an electronic postal meter of the type having an electronic accounting system connected to control a postage printing device, the accounting system comprising a computer having a plurality of routines for controlling the operation of the meter, and wherein the meter further comprises means for applying data and control signals to the electronic accounting system~ ~he improvement comprises means for determining the occurrence of errors o~ first and second dif~erent types, thq computer having a first routine responsi~e to error conditions of the first type for reinitialization of the meter to clear the e~rors of the first type to conr.ect further operation of the meter. The computer further has a second routine responsive to errors of the secon~ type for inhibiting furt~er operation of the meter independently of any reinitia,liz,.~tior~ procedures.

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t DESC}~IrlIO~ OF Tll~ T)R~WINGS
Whilc thc specification concludcs Witll claims particularly pointin~ out and dl~tinctly claiming that which is regarded as the present invention, details of a pre-ferred embodiment of the invention may be more readily ascertained from the follo~ing detailed description when read in conjunction with the accompanying drawings wherein:
FIGUI~ 1 is a perspcctive view of the housings for one embodiment of an electronic postal meter system into which the present invention may be incorpor.lted;
FIGURE 2 is a basi.c block diagram of an electronic postal meter incorporating the present invention;
FIGUI~ 3 is a more detailed block diagram of the meter unit of the electronic postal meter system;
FIGUI~ 4 is a schematic dia~ram of a preferred embodiment of a noise-rejecting input/output channel linking the meter unit to the control unit of the system;
FIGURE 5 is a detailed schematic diagram of a preferred circuit for protecting against abnormal variations 2b of a supply voltage;
FIGURE 6 is a perspective view of a portion of one embodiment of a postage printer for the meter system;
FIGUI~ 7 is a perspective view of selected parts of the mechanism of FIGURE 6i . .

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FIGUI~ ~ is an elev;ltion view ta~en alonc~ lines B-3 of FICUR 7;
FIGUI~ 9 is a top view of position encoder plat~s for a prcfcrred form of postage printer;
FIGURE 10 is a detailed schcmatic diacJram of the interface bctween the meter unit electronics and the drive motors for one embodiment o~ postacJe printer;
FIGURE 11 is a detailed schemati.c diagram of a pos~age printer setting detector array, incluclincJ.the input connecl:ions to the meter section electronic control section;
FIGURE 12 is a detailed schemati.c diagram of an interrupt generator cireuit for the electronic contro]. of the meter section;
FICURE 13 is a detailed schematic diagram of a eondition - indicating LED display;
FIGURE 14 is a representation of the assignment of memory locations in a nonvolatile memory;
FIGURE 15 is a representation of the assignment of memory locations in random access memory unit 38;
FIGURE 16 is a more detailed representation of the assignment of memory loeations for display indicator 2~its within unit 33;
FIGURE 17 is a representation of the assignment of memory locations in random access memory unit 40;
FIGURE 18 is a representation of the assignment of memory locations in random access memory unit 42;

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FIGURL 19 is a more detai,led rcpresentation of the assigl~ment of mcmory locations for status character bits within unit 42;
FIGUI~E 20 is a simplifiçd ~low chart of the operation of the postal meter system;
FIGUI~ES 21-26, taken collectively, comprise a more detai~ed flow chart of the main program for the postal l~eter system;
FIGUR~ 27 is a flow chart of a routine for establishing 10 counter loops or, with slight modification, fi~ed time delays;
FIGUI~S 23-29, takerl collectively, cornprise a rlow chart of an INITS subroutine which resets the postage printer to zero;
FIGU~ 30 is a flow chart of a TNVM subroutine which lS checks for the presence of error indicators stored in the nonvolatile memory;
FIGURE 31 is a flow chart of a TINT subroutine used to test,the operation of interrupt photocells;
FIGURE 32 is a flow chart of a TPST subroutine 20 which compares the contents of a ~leter setting register with the contentsof the descending register;
FIGURE 33 is a flow chart of a READS subroutine for reading printer setting detectors and for checking for detector failure;
FIGUR~ 34 is a flow chart of a ClIKSM subroutine which generates error-detecting checksums for stored informa-tion;

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FI~UrU, 35 is a flow chart of an ER~r~ subroutinc which rctricvcs c~ror indications s~ored in nonvolatile mcmory for use in deciding whether certain subroutines should be called;
FIGU~ 36 is a flow c}lart of a DISP subroutine which outputs condition-indicating data from memory to the LED
display;
FIGURE 37 is a flow chart of a DSBLE subroutine which is uscd to dri~e the printer to a disablcd position;

~'IGURE 38 is a flow chart of a ~E~D~ subroutine for readirlg selected memory registers;

FIGURE 3~ is a flow chart of a SETZ suhroutine which performs preliminary and final operations during set~ing of the postage printer;
YIGURE 40 is a flow chart of a STER subroutine which handles error messages and calls a disabling routine;
FIGUJRES 41 42, taken collectively, comprise a flow chart of a SETS routine used to set the printer to a desiréd postage;

FIGURE 93 is a flow chart of a STEPS subroutine used to control the bank select motor of the printer;

FIGURE 44 is a flow chart of a STEPD subroutine used to control the digit select motor of the printer;

FIGURE 45 is a CMP subroutin,e called during setting of the printer to a desired post,age value;
FIGURE 46 is a flow chart of an ENABL subroutine which controls enabling of the printer.
FIGURE 47 is aflow chart of an ENBLE subroutinc for dri~ing the printer to an enabled position when there is sufficient postage; - , . 9 ~, ~, FIGURE 4B is a flow chart of an ERRl subroutine for incrementing cumulative error indieators associated with the setting of the printer;
FIGURE ~9 is a flow ehart of a DISAB routine for ealling a printer disabling subroutine and for generating error indicators;
FIGURE 50 is a flow chart of a D~SLT subroutine called to disable the meter when problems oeeur during reading or setting;
~IGURE 51 is a flow ehart of a LOAD/SEND subroutine which provides restrieted access to the nonvolatile memory;
FIGURE 52 is a flow chart showing a modiflcation of the TNVM subroutine of FIGURE 30; and FIGUR~ 53 is a flow chart showing a modification of the CHKSM subroutine of FIGURE 34.

DETAILED DESCRIPTION
Referring now to FIGURE 1, the meter section of a~
eleetronie postal meter system may be a relatively small unit 10 which, in one embodiment, eontains eleetronie eireuitry for performing necessary postal calculations for storing critical aceounting data and for eontrolllng a postage printer. Meter ~nit 10 is eontrolled by a control unit 12 whieh preferably has a segmented numeral display, baek-lighted legend panels and a keyboard for entering data and eommands into the meter unit. The meter unit 10 rests on a relatively larger base ll whieh will, aeeording to a pre-ferred embodiment of the invention, inelude a power supply such as an AC to DC eonverter eireuit for eonvertinc3 110 volt alternating line voltage to a positive or negative DC

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vol~gc slJitable ~3 power supp~y ~oltage for thc logic circuitry contained in me~cr unit 10. Thc conncctions bet~cen the AC to DC convcrter in base 11 and the meter unit 10 can be conventional, detachable connectors which pcrmit the meter to be removed from the base for servicing.
Preferably, a monitored mcchanical interlock is used to secure the meter to the base. Whcn such an interlock i-relcased in orcler to remove the meter from the base, a siynal is generated which can disable the meter (i.e., assure preser~ation of its contents) before the meter is actually separatcd from its base. This signal is generated within an event-indicating signal generator circuit described in detail later.
Refcrring to FIGURE 2, circuitry for the meter unit 10 may be linked to the remote control unit 12 through a communications link consisting of input/output channel 14.
The meter unit 10 accepts data and instructions sent to it through channel 14 from the control unit 12. In turn, the meter unit 10 provides signals to the control unit 12 through channel 14 representing the results of calculations, requests for instructions and error messages.
Control unit 12 may include a keyboard for remotely enteriny data and instructions into~the system and a printer or display for presenting the results of calculations, instruction requests and error messages to an operator.
While unit 12 is represented as a single device, the input and outl~u~ sections of unit 12 obviously coulcl bc physically indcr,er3dent units. l~or exalnple~ the output SCCtiOIl migh~ be a prinLer or C~T display while the input section might be a keybo~rd terminal~ Unit 12 might also be a larger host S computer wllich would control meter unit 10 as one component of a more comp]ex mail-handling system.
~ central processor unit 16 in the meter com~unicates with random access memory 18, output ports 19 associated with the random access mernory 18 and with a memory interface unit 20 which yenerally controls the flow of data and instructiolls between central processor unit 16, read-only memory 22 and a special purpose, non-volatile random access memory 2~. A
power supply circuit 100, to be described in detail later, provides power for these and other components. In a preferred embodiment of the invention, the components may be cor~nereially-available solid state devices. For example, central proeessox unit 16, random aceess memory 18 and read-only memory 22 may be, resp-ctively, -~040, 4002 and 4001 chips available in a Mcs,fiO Micro Computer Set from Intel Corporation of Santa Clara, California. These particular chips employ negative logic; that is, a binary "1" is represented by a negative voltage such as - 15 volts whereas a binary "0" is r~presented by a more positive voltage such as zero voltage or ground.
Output signals from the central processor unit 16 are tran.smitted through output ports 19, which share input/
output data paths with random aeeess memory 18, to printer setting ~lements 26, to an input multiplexer 28 which controls a printer setting detector array 30 to the input/output ehannel 14, and to an output multiplexer 11 which controls an LED display array 13.

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Inputs to the meter unit include both internal and external inputs in a preferred embodiment. The external inputs are provided by control unit 12 through channel 14 to a buffer or input port system 34. Internal inputs rep-resenting the status of components of a printer setting deviceare provided by the printer setting detector array 30 under the control of multiplexer 28. Multiplexer 28 may be a conven-tional shift register multiplexer device such as a 4003 chip available from Intel Corporation. Additional internal inputs are provided by an event-indicating signal generator circuit 32.
The outputs of signal generator circuit 32 are applied to buffer system 34. Outputs from buffer system 34 are applied to the memory interface unit 20.
The central processor unit 16 performs calculations using data provided through the input buffer system 34 and instructions stored .n read-only memory 22. Read-only memory 22 serves as a program store for the routines and subroutines required within meter unit 10. Random access memory 18 provides a working memory for the central processor uni-t ]6.
The random access memory 18 is a volatile device; i.e., data stored in the memory is lost upon loss of power to the meter.
To preserve critical accounting datas such as the contents cf the ascending and descending registers, the non-volatile random access memory 24 has been provided. Non-volatile ` memory 24 is powered with a battery back-up unit to permit the contents of the memory 24 to be saved in the event of a loss of power in meter unit 10.
Further details as to the organization of the meter unit 10 appear in the description relating to ~IGURE 3. The operati(>l~s ~f central processor unit 16 arc timcd by a clock circuit 36 which supplies two trains of non-overlapping clock pulses ~1 and ~2 an~3 a reset signal. Thesc signals are applied to tlle central processor unit 16, to mcmory interface ~nit 2~ and to a number of random access mcmory units 3~, ~0, 42, which collectively comprise random acccss memory 18.
Outputs frorQ an output port 37 associated with random access memory unit 38 arc applied to a pair of c~il select circuits 44, 46, which are used in settinc3 one type of postage printing device. The coil select circuits 44 and 46 are connected to a motor select circuit ~ which, under the control of outpllts from an output port 39 associated with random acccss memory unit 4G, determines which of the two motors will be energized. Details of the coil select circuits 44 and 46 and the motor select circuit 48 are provided in a following section o~ this specification. Another output from output port 39 controls a test switch 50, which is part of the signal generator circuit 32.
The signal generator circuit 32 includes a power level sensing circuit 52, a meter locked detector 54 and a print de tector S6. The power level sensing circuit 52 monitors the outpu of the power supply for the postal meter and generat2s an inter-rupt sigllal whenever the onset of a power failure is detected.
This interrupt signal triggers a computer routine in which the contents of the ascending and descending rcgisters are up-dated in the non-volatile random access memory 24 before the meter shuts down.

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The-print dctec~or circuit 56 ir,cludcs a plloto-~lectric dcvicc for sensing tllC start of a mechanical prill~ing operation ~y the meter. ~his in~ormation is uscd for updatinq the ascendinc7 and descending registers of the mcter by thc amount of postaqe being printed. Tlle meter locked detector Sq includes a photoelectric device which senses whethcr the meter, itse~f a relatively small unit, remaills attached to its oriyinal, relatively large base.
If mechanical latches are opened in anticipation of removing the meter from the base, an output from detector 54 causes a signal to be generated. This si-7nal is ernp]oyed to disable the meter.
The outputs of power level sensing circuit 52, meter locked detector circuit 54 and print detector circuit 56 are app?ied to a 10-7ic buffer 60. Since the respo`nse of the central processor unit 16 will be different for different ones of the event-indicating signals, the signals must be applied as sep-arate internal inputs to the system through the loqic buffer 60.
A signal appearing on the output of buffer 60 is applied to mcmory interface unit 20 which, :.n response to a conlmand from the central processor unit 16, transfers the signal to the processor for decoding.
The memory interface unit 20 provides outputs to a decoder circuit 62. The decoder circuit 62 is used to select whether non-volatile random access memory 24, read-only memo~y unit 22 or one of a numbel of input logic buffers 60, ~4, 76 is to be enabled.

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, , One in~ut t:o bu~er 76 is l~rovided b~ a s~itch 75 which can cause either a binary 1 (-15 volts) or a binary 0 (O volts) to be al7plied to the buffer 76. Another in~ut to buffer 76 i5 provi~ed from the input/output channel 14. Outputs to the input/output ch~.nn~l 11 are provided by output port 39 associated with random access memory 40. Logic buffer 74 receives si~nals from printer setting detector array 30.
There are more detectors in the detector array than lo~ic buffer 74 can accommodate at one time. A shift register input ~nultiplexer 2~, operating under the control o~ signzls provided thro~gh the output port 41, ~nultiplexes the inputs from detector array 30 to logic bu'fer 74. ~lultiplexer 28 may be a 4003 device available from Intel Corporation.
In accord2nce ~tith the present invention, the er.tir2 meter unit ~isclosed ~ n FIGURE 3 is contained ~Jithin a secure housing which cannot be entered other than by an autho ized representative of the U.S. Postal Service. ~he meter un t s.ores and processes only critical accountins data and printeI
setting information. Since other information, suc~. as post2se rates or zip-;~one conversion tables, are not stored within ~,~e meter unit 10 but rather ~tithin the control unit 12, critical ~inancial or printing circuits can be highly secured. A
1 o~er de~ree of security may be accorded to informat~ on whi ch is stored within the control unit 1~ since 2 person ~.ho ~5 tampers ~ti~h information other than zccounting data or print er setting data cannot bring about im,proper c eration of t~le meter printer. ~.orecver, because the information which i5 stored and proccssed within Lhc metcr llnit i5 not changed siinply ~ecause of a changc in goYcrnlnental rcgul~tions or xatcs, the lo~er dcgrcc of security accorded all other information makes it casier for tile manufacturer vr service technician to "update" postal rate tablcs or zip-zone calculations without the inconvenience and problcJns which attcnd entry into the hiyll securi~y sections of a meter.
1~hus, by isolating tlle accounting data and calcu-lati(>ns and the printer setting infonnation in a highly secure unit and by excluding all less-critical data, the meter security and maintainability are enhanced.
The security of the meter unit 10 is enhanced by means of the input~output channel used. This input/output channel is described in detail with reference to FIGURE 4.
15 To simplify the drawing, meter unit 10 is shown as including only output port 39 and input buffer 76. Binary signals to be transmitted to the output section of control unit 12 frorn postal meter 10 are applied in serial fashion to an electrical-to-optical transducer 173. The signals are applied at the base terminal of a transistor 179 having a grounded emitter and a collector connected to the anode of a light-emitting diode 176. The cathode of diode 176 is connected to a -lS
volt source 178 through a current-limiting resistor 180.

The light-emitting diode 176 is adjacent one end of a first light-transmitting fiber 182, the opposite end of which is adjaccnt a phototransistor 184 in a first optical-to-electrical transducer circuit 183.
The emitter of phototransistor 18~ is connected to one input of a comparator amplifier 186, the second input ~o 5;~
whicll is provi.ded Lhrou~;h a vol~acJc divider lB8 connecti.ng agrour,d termir)al to a -15 volt sourcc 192. Thc input to the compar~tor alnp~ifi.er 18G provided tilrou~h thc voltag~ divider lB~ establ.ishcs a thres}lold voltagc which thc output of phototransistor 184 must exceed hefore the transistor output voltage will cause a cS~ange in ~he output of compara~or ~mplificrl~6. q~hresholding reduces the chance that noise voltages gener~ted wi.thin metcr unit 10 or cither of the transduccrs 173 or 183 will be wrongly interpreted as signal voltages.
Binary signa].s representing data or instructions to be input to the meter unit 10 from the input section oL cont.rol unit 12 are applied to a second elec-trical-to optical transducer circuit 198. The signals are applied at the base terminal of a transistor 194 in circuit with a light-emitting diode 196 adjacent one end of a second light transmitting fiber 200. The opposite end of fiber 200 is adjacent a phototransistor 202 in a second optical-to-electrical transducer 204. Transducer 204, which is identical in construction to transducer 183, converts the optical signals to electrical signals which are applied to one input of buffer circuit 76 of meter unit 10.
Since the input-output information transmitted through the channel 14 is transmitted in the form of optical signals and since extraneous electric fields cannot induce noise voltages in such optical fibers, the channel 1~
effectively resists induction of such noise voltages. Of course, light-transmitting fibers 182 and 200 must be coated or otherwise shielded from extraneous light.

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~ ;ol-cov~r, bcc~se ~lc maxirnurn ou~put of the light eJni~tin(J ~io~es is limited, even a norn~ally destruc~ive Yolt~Je ~urgC Gr static elec~rical discll~lrge at the control u~it 12 cannot ~e transmitted a~ destructive levels to t-he me~cr unit 10. Even a direc~ short circuit across one of the electrical-to-optical transducers will not be destructive, since tll~ outpu~ of the optical-to-electrical transducer is also inherently limited regardless of the intensity of the optical input.
_~ Ihe information transmitted in either direction over channel 14 is transrnittc-d one bit at a time. In one embodiment, a binary O is represented by short light pu1se while a binary 1 is representea by a longer ligh L pulse. Suc-cessive pulses are ceparated by periods of time during which the S lisht-emitting diode is de-energized; i.e., produces no lisht.
Data is transmitted to and from the meter over char.nel 14 in 64-bit sequences consisting of 16 4-bit words. ~lhile some messages do not require all 16 words, the fixed message length was preferred over a variable message length beca~se '0 of the greater ease ~ h which messages of fixed length could be handl2~ and stored ~lithin the sys~em.
Critical accounting data, such as the contents of tne ascending and descending registers are updated and stored in ~he non-volatile random access memory 24. ~hen the power su?ply _S voltage ~alls below a predetermined level, th~ signal prov ~ed by power level sensing circuit in signal generator circuit 32 ~
ultimately disable ~he meter while critical accsunting data is preserve~.

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~hilc thc operation of powcr l~vel scnsin(3 circuit 52 i5 normally ad~;uc-~te to prcservc thc critical accountillg data in the typical loss of powcr situation, more complete pro-tection against data loss or damagc due to abnormal variations in the supply voltage is provided in the circuit dcscribed with referencc to FIGUI~ 5. Thc protective circuit to be described operatcs in corn~ination with an AC to DC convcrter 88 which acccpts an altcrnating currcnt input from a line voltage source 90. A fuse 92, a s~itch 9~ and the primary coil 96 of a step-do~n transformcr 98 are connected in series across the terminals of the line voltaye source 90. A secondary coil 102 of transformer 98 provides a stepped down alternating voltage to a full wave rectifier circuit 104 having a filter capacitor 106 connected across its output terminals. The AC
to DC converter 88 is located in the base 11 of the meter and is connected to the protective circuitry within meter unit 10 through conventional, detachable connectors 108, referred to hereafter as power supply terminals~
A circuit interrupter 110, which may be a conven-tional fuse, is connected in series with one of the leads from thc power supply terminals 108. A diode 112, a metal oxide varistor 114 and an overvoltage detector 116 are connected in parallel with one another across the terminals 108; that is, across the output terminals of the full wave rectifier 104 in AC to DC converter 88. Feed-through capacitors 64 and 66 are connected in series with the leads from terminals 108. A pair of inductances 68 and 70 are connected in series with the feed-through capacitors 64 and ~6, respectively. A set 72 of filtcr capacitors is conrlected across the inductances 68 and 70.
A conventional voltage rcgulator circuit 78 on the output side oE inductanccs 68 and 70 acts on the gencrated logic lcvcl voltage to establish a requircd, second logic . ~ -20-l~:vel Yol~:a~3e. l or e almL)le~ ~)e inpuL t~o volta~c regu1at:oL-78 m~y be -24 ~-~lts while its output may be -15 volt ~;. Sucl~ volta~3~; are commonly required t:o opc:rate ne~ative lo~3i c circui ts .
rhe conlponents t~escribed above act to block or suppress abnor~nal variations in the voltac3e providcd at terminc:ls 108 Sucll aL)normal variations may resul~: from variations in t:he line voltat3e, from failure of one or rnore components in the ~C ~o DC converter 88, or from an attempt to operate the iO postal meter ~lith ~n unauthorized power source connected across terminals 10~ The latter situation might occur where a ~ ell-meaning user attempts to bypass a temporarily malfunctioning AC to DC converter 88 by attaching his own DC po~er supply at terminals 10~. Potentially, the same situation may be caused by an illegal user who, having stolen a meter from its base, is trying to convert the remaining postage in tne mete~
to hls own use The diode 112 has no effect on the operation of the m.eter s~ long as the DC voltage appl- ed acrGss terminal~i iO3 Q is of the correct polarity. However, if the pola~ity o~ the voltage applied across terminals 108 is reversed for an ~r reason, the diode 112 short circuits the protective circuitrJ/
causing a current to be applied through fuse 110 ~ar in excess of the interrupt current required to blow the fuse. ~hen fuse ~i5 110 is blown~ the meter unit is disabled while the contents of the ~nemory 24 are saved. The fuse 110 can be replaced relatively easily by a trained serviceman. However, replaceirient o.~ the fuse rec~uires that a meter unit seal be broken. Theref~re s even successful attempts by unauthorized personnel will be readily detected by the postal authorities.

~J~al o.~icl~ aris~or 119 i~ a con~cT~tional circuiL
componetl~ havillcJ a voltage-dcpendent, nonlin~ar impedallce charac~eri~tic ~hich tends to suppress voltage spikes.
Overvoltaye detector llG is ~lso a conventiGnal circuit compol-,cnt which has a normally hiyh impedance ~hen tlle voltage ap~lied across it is less than a predeLermined value~ If the applied voltage exceeds the predetermined v~lue, however, a br~akdo~n effect occurs,causing a hish current to be applied through device 116 and interru~ter 1~0.
Thus, interrupter 110 ~lill be ~lo~m ~henever normal voltage of the wron~ polarity or e~cessive voltage of ~he right polarity is applied across terminals 108.
The feed-through capacitors 64 and 66, inductances 6B and 70 and filter capacitor 72 provide quick suppression of rapidly occurring voltage spi~es and thus prevent meter d~mage ~hich might oLherwise occur before the ~aristor 114 and detector 116can function.
Filter capacitors 72 also p~ovide temporary ~ower storage which gives the meter additional Lime to shu' ~G~n in an orderly fashion in the event of a po~Jer loss. Feed-through capacitors 64 and 66 and inductors 68 and 70 also filter any high-frequency noise voltages which might be induced in the DC power lines.
The meter unit described above controls z poctage printer, one embodiment o~ which is described with reference to FIGURES 6, 7 and 8. The printer is a modified Model 53QQ
postage meter manufactured by Pitney Bowes, Inc., Stam~ord, .: .
~, - 2~.-Conn~cticut. Th~ ~5iC ~odel 5300 post~e me~er is a sT~ech~nic~l deJice with mechanical re(~isters and actuator as~mblies. The rnodified meter contains only a print drum ~0 and a s~t ~2 of print wheel driving rac)cs. Since the modi~ied meter is intended to be used in an electronic systcm the rr~chanical registers and actuator assemblies have been removed.
The print wheels (not shown) within drum 80 are set by a mechanism driven by a first stepping ~otor 84 and a second stepping motor ~6. Signals for controlling the operat on of the stepping motors 84 and 86 are provided by the meter unit described above. The stepping motor 84 drives the upper and lower set 82 of postage wheel driving racks (con-sis~ing of racks 82a, 82b, 82c, 82d) through a gearing ~ssembly including upper and lower nested shafts ll~a, ll~b, 118c and 118d, respectivel~. The angular posi~ions of the upper s~afts 118a, 118b ~d the lower shafts llGc, 118d are controlled by a master gear 120 whi.ch may be driven in .~ither a clockv~ise or a counterclockwise direction by the stepping motor 8q.
The print drum 80 has four independently--pcsitisre~
print wheels (not shown) which pro~i~e a post2ge impression to the ~aximu.~ sum of $99.99. Each print wheel p.o~ es a separat~ diyit o~ this sum and can be set ~rom 0 ro g ~
The print wheels are cequentially set by the ~neter settiny mechanism by means of the four driving racks 82a 82D; 82c 82d. The driving racks are slidable within print drum sha . -23-122 in L~)e dil~ctions ir~dicate~ ~y the double-headed arrows 12~.
The settings of the upper racks, 82a and 82b ~re controlled by pinion gears 12~a and 126b, respectively.
The settings of the lower racks 82c and 82d are controlled by a similar set of pinion gears not shown in the dra~ings. T}-~e pinion gear 126a is attached to the inner shaft 118a ~1hile the pinion gear 126b is attached to the concentric outer sha~t 118bo The pinion years which control the settings of dri~ing racks 82c, 82d are similarly attached to nested shafts 118c and 118d, shown only in FIGURE 8,. The angular positions or the nested shafts .?~18a~ 118b, 118c, 118d are controlled by shaft-mounted spur gears 128a, 128b~ 128c, 12Bd. The master ge~r 12~ can be shifted laterally along an axis pzrallel to ~.he lS axis of the spur gears 128a, 128b, 128c, 128d to intermesh ~3i~_n a single gear at a time. The mas~er gear 120 is rotata~ly mounte~ ~Jirhin a slot 13~ in a yoke 132 which slides alon~ a splined shaf~ 134. The yoke 132 is ~eld away ~rGm rotatzble engagement with splined shaft 134 by an interposed slee~fe bushin~ 136. The master gear 120 engages the gears 123a, 128b, 128c, 128d in the sequential order: 128b, 128a 128d, 128c. In this order, gear 128b controls the setting or the "tens of dollars" print wheel, gear 128a controls the "do'lars" print wheel, gear 128d controls the "tens of cents"
print wheel and gear 128c controls the "units cents" print wheel.
The yoke 132 includes a pair of upper and lowcr tooth trollcJil waIls 138 and 138' loca~cd on thc upper and Iower surfaccs of the yoke 132. As ~hc yoke 132 and master gcar 120 sli.~le la~erally along thc splined sllaft 132, tilC ui~pcr and lowcr laterally-cxtendin(3 walls 138 and 138' slide along either side of one of the tee~h in each of the spur gears. The tooth troughs preven~ rotational movement of any of the spur gears other than a spur gear meshed with master gear 120.
The lateral position of yoke 132 and the mas~er gear 120 is controlled by stepping motor 86, the output shaft of which carri.es a splined gear 1~0. The splined gear 140 meshes with a rack 192 attached to yoke 132 at an L-shaped, lower extension 1~4. The clockwise or counter-clockwise rotation of splined gear 190 upon energization of stepping motor 86 is translhted into lateral movement of yoke 132 through the rack and pinion arrangernent. The splined gear 1~0 prevents counter-clockwise rotation of yoke 132 about the axis of shaft 146 due to any friction between rotating sleeve bushing 136 and the yoke 132. A roller 148 mounted beneath the L-shaped extension 144 prevents any clockwise movement of the yoke 132 about the axis of shaft 146.
When the print wheels within print drum 80 have been set to the correct postage value position, drum 80 is rotated by shaft 122 in a direction indicated by arrow 150 to i.mprint the postage. The drum 80 is then returned to a home or rest position sensed by a slotted disk 152 mounted on shaft 122.
When a slot 154 in disk 152 is interposed between the arms of an optical detector 156, the sllaft 122 is at its home position.

- ~, i~ll opti.cal dctectoxs in ~le scttin~ charlisln al~ ~asically U~sll~l)ed structurcs having ~ liyht emittiny dicde located in one ~rm and a p}~ototransistor locatecl in the other arm. Li~ht elnanatin~ from ~he light emitting dio~'~e is transmitted to the pho~otransistor onl~ ~hen a slot in a interposed disc is aligned with the arms of the detector.
The home or "0" positions of nested shafts 118a and 118b are similarly sensed by slotted discs and, re-spectively, in combination ~ith optical detectors 16Qa and 160b. The home or "0" positions of the lo~Jer pair of nested sha~ts are sensed by similar slotted discs and optical de-tectoxs, none of which are shown in the drawing.
The shafts and gears are returned to tne ho~e position u~on startup of the meter systern. Subse~uent settino is accomplished by stepping the motor ~4 through a calcul~ted number of steps using previously-established settings as a reference.
The angular movement of the stepping moto_ shzC~.
146 ~and consequently splined sha~t 134 and master gear 2~) is monitored thro`ugh an assembly including gears 16~ and 164, sloited monitoring wheel 166 and optical detector 16~ 2n the stepping motor sh~ft 146 turns, gear 162, which is mounted on shaft 146, must also turn through the same angle.
Gear 162 intermeshes with gear 164 carried by the slotte,-.
monitoring wheel 166,causing the ~Jheel ~o rotate in corr.^-s-pondence wit~, rotation o, shaft 146. Every fif~h slot 1JO
on monitoring wheel 166 is extra long to provide a c~ec~; on ." ~ _, , .. . . .
~ 26 -'~. L' ~' , /

tlle n~onitoring whcel opcration~ lach slot on ~heel 166 correspollds to a chaJ)~!c of onc unit of postage value.
Optical detec~:or lG8 has two photoscnsors. One of the photosensors is ~ounted near the bight of thc U-sllaped dc-5 tector structure; that is, near the periphery o monitorin~
wheel 166. This photosensor monitors every step of the steppir~g wheel 166. The othcr sensor is located near the ends of the arms of detector 168. This photosensor receives li.ght from an associated li~ht source on the opposite side of tile Jnonitoring wheel lG6 only whcn the extra long slot 170 is aligned with the detector arms. Thus, tl-is scnsor monitors every fifth step of the monitoring wheel 166. The number of slots on wllecl 166 which pass through detector 168 durin~7 ro-tation of motor 84 are counted in the electronic section of the meter unit. If the counter does not contain a count of five when the output.from the second photosensor in detector 168 is .sensed (indicating long slot 170 is aligned in thc detecto~), an error condition exists.
The lateral position of yoke 132 and master gear 120 is monitored by a position indicator including a pair of spaced plates 206, 208 attached directly to yoke 132. Plates 206 and 208 include slot patterns which are binary-encoded representations of the position of the yoke relative to optical detectors 210, 212, 214,all of which are attached to an L-shapcd bracket 216 on stepping motor 86. Each different slot pa:tern identifies a particular position of yoke 132.

Tl~ slot~ p(~t:L~xns mc~y be cieen Jnorc: clearl~ with rcfercnce ~:O ~ ,~ 9, which i.s a plan YieW of plate 2G~.
Slot:s ~pp~: aring in ~I at~e 208, whi ch is Y~rtically ali~ncjd with pla~e 20~ and ~hc~rerore substa~-ltially hidden, are sho~Jn in do~ed outline ~orln.
In a preferred embodi~,ent of the invention, plates 206 and 208 have six different binary slot patterns identiyin, six lateral positions for yoke 132. Each o~ the slot patt~rn consists of a unique triplet in ~7hich the presence o~ a slot in either plate 2G6 or plate 208 is interpreted as a bin~ry one while the absence of a slot in any position where ~ ~lot misht appear is interpreted as a binary zero. The binary indicia for the two outside positions in each triplet are included on plate 206. The binary indicia for tne center position in each triplet is included on plate 208. The binar~y ~ndicia are distributed between two vertically aligned p',a~es ~nly because optical detectors 210, 212, 214 are too ~,ul'~y t~
permit ~hree detectors to be placed.side by side on ~ sin~le plate of reasonable size. From a logic standp~int there is no signific2nce to the fact the indicia are distributed be~ween two plates. The indicia are read znd interpreted as ii ,h2y were contained on a si~gle plate.
Position 218, identified by the binary slot pattern "101", is the detec~ed slot pattern ~hen master gear 120 is meshed with ~he spur gear for the "tens of dollars" bank of the postage meter. Position 220, identi~ied by binarY slot pa~tern "110", is detected when mzster gear 120 meshe~ witll the spur gear for ~he "dollars" print~ng wheel. Positi~n 222, identified by binary pattern "011"~ is detected when mast -. r ~ 28 ~

gc~ar l20 ~n~c~s. ;~lth ~he spur ~;ear which sets the "tens of cents" printl~iheel on ~he pos~ac3e meter. The "cents" print W}l~ i5 set ~ naster gear 120 in position 224, iden-tified ~y t~e ~inary ~attern "100".
~ositions 226 and 2~.8, identified by binary patt~rns "111" and "~10", respectively, serve security pur-poses After each of the print ~heels has been set by the master geal- 120, yoke 132 is shifted to an "enabled" positio 228 ~hich is ~he only position in which shaft 122 can rotate to imprint the set postage A conventional mechanical inter-loc~ bet~7een the yoke 132 and a shutter bar (not shown~ is re-leased only in this position to assure that printing cannot occur if the meter is not ready due to any reason or ir an error has occurred or if insufficient funds are availa~le in 1~ the meter register.
Position 226, referred to as a disabled position, is ~ position ~herein each o~ Lhe spur gears 128a, 123b, 128c, 128d is mechanically locked by the projecting ~roughs 13S ard 138'. In the "disabled" position, which i5 the pociticn to ~hich the yoke 132 is driven upon loss of power, the ~rinte~
is mechanically locked and cannot be reset even ~y external force applied directly to the print wheels in prir.t drum 80.
The electrical interconnections of the s'epping motors 84 and 36 with the outpu~ ports 37 and 39 are ~escri~eci ~5 with reference to FIGURE 10. The four parallel output leGds ~om output port 37 are connected to the coil select circuits 4~ and 46 for the stepping motors 84 and 86, respecti-ve -~ - 29 -. .

r~n~

~acl) of t~)e s~eppiny motors is a convcntional cight-phase stepping mo~or, which is rotatc,d in prcdctermined angl~lar incrcmcnts by enercJizing differcnt combinations of four coils containcd within the motor.
S The coils for stepping motor 84, includcd witl~in a coil system 230, are identified as coils 230a, 230b, 230c and 230d. Similarly, thc, coil system 232 for motor 86 in-cludcs coils 232a, 232b, 232c, 232d. Each of the individual coils in eacll motor is connccted in series with a ~arlington amplifier. For example, coil 230a is connected in series with Darlington amplifier 234a in which the base terminal of a first transistor 236 is connected to a -15 volt source 238 through series resistors 240 and 242. A second transistor 244 has a grounded emitter, a base terminal connection to the emitter of transistor 236 and a collector connected to the collector of transistor 236. Darlington amplifier 234a is off or nonconducting when the associated output 246 from output port 37 is at a binary 0 or ground potential. In this state, the Darlington amplifier prevents current flow from an associated ground terminal 248 through the second transistor 2~4 and thus through coil 230a. h'hen the output 246 drops to a more ncgative or hinary 1 level, the Dariington amplifier 234a is s~itched to an on or conducting state.
Darlington al~plifiers 234b, 234c and 234d are identical to amplifier 234a except for the connections to diEferent output leads and different motor coils.

_ 3~ _ The coils in coi.l sys-cln 232 a~c si.milarly connccl:ed in series with Darlington amplifiers 24~a, 298b, 2~Bc, 24ad, C~rrespondiny coils in each of the coil systen~s 230 and 232 are conncct:ed to the same output terminal of ouLput port 37. For example~ coils 230b and 232b are connected through respective Darl.ington arnplifiers 234b and 24ab ~o o~tput 2~0. A binary 1 signal on output 250 switches botll Darling~on amplifiers ?34b and 248b into their on or conducting sta~e. Ilowever, coi.l current will be established in only the motor se].ected by operation of motor select circuit 48.
Motor select circuit 48 is connected to outputs from output port 39 and comprises switchirlg circuits 251 and 252 connected in series with coil systems 230 and 232, re-spectively.
Cwitching circuit 251 includes an inyerter amplifier 254 which provides an increased current at its collector.
terminal when the input to the amp~ifier 254 falls to the more-negative binary 1 level. The output of inverter amplifie 254 is applied to a Darlington amplifier 256 which, when con-ducting, provides a current path from a ground for each of the-coils in coil system 230 to a -24 volt source 258.
Switchinq circuit 252 is identical in construction to switching circuit 251 but is energized in an alternative manner. When a binary 1 signal appears at the input to switch.ing circuit 251, a binary 0 siqnal is applied to switching circuit 252 and vice versa. Thus, depending upon , the inpu~s ~o ti~e switching circui~s 251 an~ 252, ei~her coil sys~em 230 or coil system 232 will be connected in a closed circuit loop, The other coil system will be open circuited. Sinc~.the coil sys~em for only one of the two drive motors is complete at any one time, the output port

3~ can }~e uscd to control the operation of both motors using the co~on output connections.
Referring to FLGURE 11~ the states of the optical d~tec~ors ~thich monitor the printer setting mechanism are in-puttedto the system throu~h printer setting detector arrzy 30 ~hich includes a novel failure detect s~stem. The inputs frol~ the printer setting detector array 30 are applied to logic buffer 74 which may be a conventional 4-bit parallel nput buffer circui~O Each of the inputs to buffer 74 is fed lS by one of fo~r comparator amplifiers 260, 262, 264, 256.
Each of these comparator amplifiers has one input connec.ed through a voltage divider to a -15 volt reference source~
For example, comparator amplifier 266 has an input 26& to which a predetermined negative voltage may be applied by means of a voltage divider 270 and a -15 volt sourcP-272.
A second input to each of the comparator amp]ifiers is connected to a bus from the output side of one or more of the optical detectors. ~ore particularly, input 274 to com-parator amplifier 260 is connected to the output side cf detectors 276, 278 and 280. Input 282 to comparator Gmplifier 262 is connected to ~he output si2es of detectors 2B4, 286, 288. Input 290 to comparator amplifier 26~ is connecte2 tG

~ t~,c output ~i~e of a pair of detect:ors 292 and 23~ while input 29~ to conlparat:or ~mplificr 266 is connccted to the out~ut 5ide of a single detector 298, Each of the oL~tical dc~ectors is identical to detector2g8 which includes a light emitting diode 3~0 ~nd a phototransistor 302, wllich conducts oniy when its base area is illuminatcd by optical radiation from the light emitting diode 30~. It ~ill be recalled fron~ the description of PlGU)~S 6-a that a slotted disc is interposed between the light elnitting diode and the phototransistor or light detector.
The slotted disc rotates with one,of the shafts of the printer setting mechanism. When the slot in the disc rotates into alignment with the light source and the'light'detector, the phototransistor is gated into conduction to provide a current path between a ground terminal, such as terminal 304 and the amplifier input.
The detectors are connect,ed in what might be described as a column and row matrix with the rows corsisting of buses 274, 282, 290 and 296. Each column consists of a single series circuit including a transistor having it,s base terminal connected to the shift register input multiplexer 28, a -15 volt source and two or more serially-connected light emitting diodes. For example, column 306 consists of transistor 308, -15 volt source 310 and three serially-connected light emitting diodes 312, 314, 316, which are components of optical detector circuits 276, 284 and .'92, respectively. Colwnn 318 consists of transistor'320 and ~t . ., : ' .'. . ~: . .
r~ , scrially connccted li~ht eJnittin~j diodcs in detector circuits 278~ 2~G, 294 and 29B, Column 322 consists oL an idcntical tr~nsistor 324 and ~he light: cmitting diodes in thc detector circuits 280 and 288 The base terminals of the transistors 308, 320 and 324 are connected to the second, third and fourth stages, resr,ectively, of the shift regi-tcr 28. The first stage of shift rcgister 28 is conncctcd to an error detect eircuit to be described in more detail later. Inputs to shift register 28 include a data input and a clock input. In operation, the optical detectors to be monitored are selected by loadinc3 a binary 1 into shift register 28. The binary 1 is then shifted UpOII successive clock pulses to the shi f t register staqe connected to the column containing the detectors tc be read. For example, if the detectors 276, 284 and 292 are to be read, the binary 1 is shifted to the second stage of shift register 28 to drive transistor 308 into a conductive state.
When transistor 308 conducts, a current path is formed, per-mitting current to flow from ground terminal 326 through light emitting diodes 312, 314 and 316 to the -15 volt source 310.
Under these conditions, output signals from comparator am-plifiers 260, 262 and 264 are interpreted by the electronics control unit as outputs from optical detectors 276, 284 and 292.
Similarly, if the binary 1 had been shifted to the third stage of shift register 28, transistor 320 would have been energized to establish a current path through the light - 34 - ~ -e~itting diodes for the de~ec~ors in colwnn 318. Ch~n~s in thc inpu~s to the compar~or amplifiers would have been in-terpret~d as chan~es in the states of the detectors in colun~
31B.
It is euident that shift register 28 and the array of detector connections provide a multiplexing function by which different sets of up to four detectors can be connected to the four parallel inputs to buff~r circuit 7~ at one time. Thus, while only nine detectors have been shown in columns 306, 318 and 322, up to 12 detectors could have been acco~modated if necessary or desirable.
The error checking or failure detect feature re-ferred to above simultaneously drives the inputs ito all four comparator ampli~iers from a binaxy 1 (-15 volt~ level to a binary 0 (0 volts) level each-time the Printer setting de-tector arrzy is called i~o operation. The failure detect circuit Includes a transistor 330 having its base terminal connecfe~ t~ the first stage of shi~t register 28, its emitter terminal connected to a ground terminal and its collector connected throush a resistor 332 to a common junction 334 of diodes 336, 33~, 340 and 342. The.opposite terminals of each of these diodes is connected through a resistor to a ~lS volt source, For example, diode 342 is connecte~ to -15 yolt source 272 through resistor 344.
~5 Before 2 binary 1 is loaded into the first stage of shift register 28, transistor 330 is non-conducting which means th~t the inputs 274, 282, 290 and 296 to the co~p2ra~0r amp7ifiers 260, 262, 264 and 266, respectively, should be at ~r ~

r-~ ~

the billaly 1 level. When the first stagc o~ the shift register 2B gocs ncgative (i.e., receives a binary 1 sigllal) trans-istor 330 is triggered into cond~lction to provide a current pat~ rom gro~ld thro~lgh each of th~ diodcs 33G, 33B, 3~0 and 5 342 to the inpu~s of the respectivc compara~or amplifiers.
Thus, tl-e second input to each of the amplifiers will change stat:c i.~nedi~tely, causing the outputs of the ~mpliliers to simultaneously change state. Under the control of a routine descri~ed in more ~etail later, the electronics control unit of thc meter unit will monitor the outputs of the comparator amplifiers to see wheth~r all outputs have changed states si~ultaneously. If the outputs fail ~o change states as expected, an error signal is generated to infonn a user of the system of a probable failure in one of the comparator am-plifiers or associated clrcuit components. Thus, the opera-bility of the comparator amplifiers is verified at the be-ginning of each printer settiny detector operation.
.There are a number of conditions under which the opera-tion of the meter unit 10 must be responsive to the occurrence of physical events, in order to preserve critical accounting data, disable the Ineter from further operation or optimi~e the meter o~eration. The necessary signals for triggering this re-sponse are pro~ided by signal generator circuit 32 which will now be described in detail with reference to FIGURE 12.
. ~s was mentioned briefly with reference to FIGU~E
3, signal generator circuit 32 includes a test switch 50, .
a power sense circuit 52, a meter locked detector 5q and a print detcctor 56. The power sense circuit ~2 is driven by t]~e systc~n -~1 volt so-~rce. This source is connected to a conventional voltc~g~ re~ulator circuit 3~.~, employed as a volta~3e lev~l detector circuit. The outp~..t of inverter amplifier 396 is applled both to non-volatile random access S ~,cmory 24 and to the input of a serially-connec~ed inverter ampli~ier 34~. The output of v~lt~ge regulator 344 is applied to an inverter amplifier 350 ~hich, together with inverter amLlifier 343, provides an input to input buffer 60.
The po~er sense circuit 52 does not affect the o?era-tion of the meter uni L as long as the voltage remains at suit-~ble levels. However, if the vol.~age begins to decrease, indi-cating an impending power failure, circuit 52 generates a sign~l ~lhich when detected by the cen~ral processor 16, causes the processor to enter a routine ~hich cannot be exited other thzn by a complete shutdown and re-start of the meter.
Meter-locked detector ci,cuit 54 includes a light emitting diode 356 adjacent a phototr~nsistor 358. Com~onents 356 and 358 are physically located adjacent the-base of the meter unit and are normally optically linked. Thus, under normal conditions, pho~otransistor 358 conducts. If the meter unit is unlocked from the base, however, the op~ical li~} is broken, drivin~ the lo:~er input to a comparator amplifier 360 to a -15 volt or binary 1 level. ~hen this occurs, the GUtpU'~
cf comp2rator 2mplifier 360 changes state. Compara~or ampli-fier 360 provi~es an input to buffer circuit 60.

, Th~ prirl~ det~c~or c rcuit 56 de~ermines when a rint operation has bcgun; t:hat is, ~hcn thc print drum 80 ~ctually starts to rot~e away from its home position to a - printin~ position. ~rint detector 56 includes a light S emitting diode 3G4 locat~d on the opposite side of a slotted dis~ (not shown~ on the print drum shaft 122 from a phototran-sistor 366. When the printer leaves the home position during a print operation, the slot moves out of align~ent between diode 364 and phototransistor 366. Phototransistor 366 then turns orl, causing the lower input of a comparator ~mplifier 368 to be driven to a binary 1 level. The output of comparator ampli-fi~r 368 is connected to buffer circuit 60.
In order to test the operation of the print detector 56 or the meter locked detector 54, a test interrupt s~Jitch 50 consistin~ of a transistor 372 is included in se~ies with the light emitting diodes 356 and 364. The base terminal of transistor 372 is connected to output port 39, which can be seen in FIGURE 3. Normally, the voltage on the base ter~ina of transistor 372 is kept at a binary 1 leYel to provide a 20 current path from a ground terminal through the light emitt~nq diodes 356 and 364 to a -15 volt source. To simulate an event, the base voltage on transistor 372 is tempor2rily driven to a binary 0 level to open the current path throush the light emitting diodes 356 and 364. The interruption ~5 in current to the light emitting diodes has the same ef~ec~
u?on co~parator amplifiers 360 and 36& as an event-indicating ccnài,ion. The test condition is ~eadily identified by the central processor since t~o inputs to buffer circuit 60 ~ill have simultaneously changed state.

Li(~ht enlittin~ diode or LED displ~y 13 i5 included to provide a user wi~ll a visual displ~y of certain error conditions. Referring to Figure 13, the LE~ display includes a nu~ber of light ~itting diodes, such as LED 374 having a con~T~on anodic connection to a ground terminal 376. Each of the li~ht emittin~ diodes has a cathode connection ~o a different out~ut line fro~ shift resister output multiplexer 11. For example, the cathode of ~ight emitting diode 374 is connected to output line 386, and each of the other output lines is connected to -15 volt source 390 through identical pull-down resistors~ such as resistor 388.

Depending upon the error conditions to be displayed, binary l's or O's are entered one bit at a time into shift register 11 through a data input terminal and axe shifted through the register 11 by a series of clock pulses. Both ~he data and the clock pulses are provided through output port 41. When a binary zero appears at a particular stage of the shift register r both the anode and the cathode of the light emitting diode connected to tl1at sta~e tlill be at ~he sa~e potential; t'nat is, round. The light emitting diode produces no optical radiation under these conditions. However, when the shift register stage contains a binary 1 (-15 volts) the 15 volt potential across the light emitting diode connected to that stage causes the diode to emit light.
~5 The particular error condition or status reprecented by each of the light emit,ing diodes is described in more . - 39 ~

.'.1. ` ~

d~ail with rcfcrcnce ~o a suhsequent figuJ.e.
Spcci.fic types of data are assigl~ed ~o specific locations within the nonvolatile, random access memory 24 and the volatile ranclom access mernories 38, 40, 42. Figure 14 illustrates the assignrllent of memory locations wi~hin nonvolatile random access memory 24.
~ IemGry 24 is a 256-bit memory divided into four 64-bit regis~ers. Each register contains 16 our-bit words. The memory locations and the data handled within the system are expressed in hexadecimal format. That is, the lowest numbered word in a particular register would be ~ord O while the highest numbered word would be word /F, which is actually the 16th word o~ the register. Any particular word can ~e identified by two digits. The first digit represents ~he register conLain ing the word while the second digit represents a particular level of word in the memory. For example, memory location 00 in nonvolatile memory 24 would ~e the four-bit word located in the extreme upper left-hand corner of Figure 14 while me~ory location 3F would be the word appezring in the lower rig~l'L-2Q han2 corner of Figure 14.
The ~irst two words of each of the nonvolatile me~oryregisters are used to store the high and lo~J o~der characters, respectively, o~ checksums which are used to check for read/~rite errors ~hich might arise during the transfer of d~ta~ The chec.
2~ sums are generated by subroutines which are described in more detail l~ter. Basic211y, however, these checksums are simply th2 s~ation o~ all binary dig.ts of data stored in t~.e re-maining wo~ds of the register, Noilyolatile me~lory locations O~ - OF are assi~ned to an asce~ding re~ister which contains a running total o~ all post~ge prin~ed by the meter over its elltire life cycle. Memory locations 18 ~ lF contain the descending regis~er, representing the tot~l a~nount of postage availa~le for metering opera~ions before the meter must be re-funded, ~lemory locations 28 ~ 2F
conta;ns ~ control sum obtained by adding the contents o~ the ascending register and the desc~nding register. Since the ascending register should be incremented during each printing operation by the same amount by which the descending register is decremented, the control sum should remain a constant until the m~ter is re-furlded. When more postage is added to the ~.eter, thc con~rol sum (and the descendiny register) ~ill be incremented by the amount of the added postage. The control sum will remain constant at the new higher level until a subsequent re-funding operatio~ occurs.
Memory locations12 - 17 are reserved for a piece count '.otal which represents tne total nu~ber of metering oper~ionC performed by the meter over its lifetime. This ~ information is significant in plannlng maintenance schedules.
Locatiors22 - 26 of the nonvolatile memory are used to store four-bit error indicators representing specific types of exrors, Location 22 stores indications of error which occur durin~ a ~ S ox remote meter resetting routine which may be employed '5 to re-lund the metex from z remote location, The ~RS will be descri~ed in general terms later~ Location 23 is a storage ar~a for error codcs associated with the initialization of the met~r. During initializa~ion th~ met~r is reset to 0. Errors occurrin~ during the resetting are represent~d by l's in the speci~ied nlemory locations. Location 24 and 25 store error codes associated with ~he setting of the meter. Memory location 26 stores error codes relating to the operation of the memory units and the photocells of the meter. ~Iost of register 3 of the nonvolatile memory 24 is ~sed to store an RMRS seed nur~er.
Referring to Figure 15, random access memory 38 is also preferably a 256-bit memory register. Memory location 0~ is used to store a message op code ~or a data message stored in location 03 - OF. kIemory locations 1~ -lF store the information used to control the LED display ~.~hile the remainder of registers 1 through 3 of random access memory 38 is given over to ~orking memory in which inter-mediate results, etc. are stored.
Each of the registers of rr.emory 38 includes four g-bit status characters, la~eled SC0 through SC3.
These locations, while physically similar to the dzta storage locations of the mernory, are accessed differently and are used to store status indications rather than data.
Status ch~racters SC0 - SC3 of register 0 are used to store ~tatus indicatDrs associated ~ith the digit select stepping ~5 motor of the printer. Status character 0 indicates ~Jhe-ther .~ , ~ .,.

q ~

thc ~notor i~ cncl.gi~.c~ to s~cp up (/F) or step down (1~.
Status cilaracter SCl indicates whcthcx the master gear of the printer is on a full step (0) or a haLf stcp (F).
Status character 2 indicatcs an error condition occurring 5 on a half step (bit 2=l) a full step (bit 1=13 or a fif~h step (bit 0=1) wllile status character 3 indicates the contents of the Lif th step counter. SC3 equals 0 indicates the 5th step countcr is a multiple of five at the right time.
The status chaxacters associated with register 1 provides status indications for the operation of the bank select stepping motor. SC0 indicates whether the motor is energi~ed to step up (F) or step down (1). Status character 1 indicates whether the meter is in its disabled position (0) or an enabled position ~ 0). Bit 0 of status ; 15 character 2 equals 1 when the motor has failed to take one eomplete step on the specified direction and a bit 1=1 when not all 0 s are observed during the stepping process. Status eharacter 3 indic:ates the last position of the motor as read by the encoder.
Status characters SC0 and SCl of register 2 contain infoxmation relating to the ~VM and interrupt test routines. The individual bits of each of these status characters are described in more detail with reference to Figure 19. Status character 0 contains one NVM test bit for each of the registers. The value of each bit indicates whether a nonvolatile memory test described in more detail in a description of a TNVM subroutine indicates proper m~mory cpcration. T~le individu~l bits associated with status character 1 indica~e the results of open circuit and short circuit ~ests of the meter locked detec~or ' 54 and thf~ print detcctor 56. The mealling of these bits is discussed in more detail in a description of a TINT
su~routin~.
The assignment of individual bi~s in words lD - lF of memory 38 are shown in ~igure 16. The first two bits o~ word lV are used to provide an ~IRS time out error indication and an initialization time out error indication. A user is given a certain nu~ber of oppoxtunities to carry out the t~sks needed to perform remote resetting or to initialize the printer, If, for any reason, these .
tas~s are not complete within a given number o~ attempts, the ~eter i~ disabled and these bits are set to 1.
With reference to word lE, bit 3 is set to 1 wl~en the contents of the ascending and descending resisfer do not equal the control sum, bit 2 is set to 1 ~7hen a check sum error is indicated, bit 1 is set to 1 whe ~fO ân crror associated with the reading o~ photocells is detected, Referring to ~ord lF, bit 3 is set to 1 ~hen the amount of postage remaining in the descending register is less than the amount of pos~age to which the meter has been set.
~5 Bit 2 is dr,iven to 1 whenever the ~mount of postage indicjated by the descending register falls below 44 -' ~ 3~

$l00. This in~ormation is use~ul to a user since it providcs notice th~t the rneter will have to b~ re-funded in the not too dis1-ant future. Bit l of ~ord lF is always on while bit 0 is al~ays off. These two bits simply provide an indication that the met~r is on but t~at no short circuits have occurred which would cause the LEDS to become erroneously energized.
~ith reference to Figure 17, random access Jnemory 40 contains the sarne seed number ~rthe ~RS
routine as is also ~tored in register 3 of the non-volatile memory. ~?ords 50 - 5F and 60 - 6F of random access memoxy 40 are used to store constants used in thc R!~S routin~ while ~ords 70 - 7F are reserved for intermediate calcul,~tions, temporary storage, etc.
Referring to Fiqure 18, locations 94-97 of random access memory 42 store the current setting of the meter in a meter setting register (MSR). The next postage amount to be set llto the meter is store~ in an ~S register comprising ~ords 9C - 9F of the memory unit.
Status characters are stored at SC0 and SCl of register 8. Status character SC0 contains the data currently being read at a specified input port, whilc~ st~tus charac~er SCl is used to store an error code associa~ed ~ith the test of t:he printer setting d~l:ectors. The generation of t~ese error codes and others are described in somewhat more detail in the discussion of the individual subroutines during which they are generated.
In the f low charts of the main program and the subroutines, references are often Irade eit~.er expressly Ol- by implication to a postage meter prograln printout incorporated in1:o the specification as an Appendiu~n A.
The programming language of the printout is an assembly level language developed specifically for the ~ICS - 40 components manufactured by Intel Corporation.
~hile a comprehensive e~:planation Gf each of the instructions in this language may be found in the Intel 4 004 and 04 0 Assembly Language Programming ~anual, copyright 1974, by Intel Corporation, 3065 Bowers Avenue, Santa Clzra, California 95051, all of the instructions used in the program are listed in AppendilLm ~3 along ~ith a brief explanation of each of the instructions.
In describing the flo~,l chartsq the following number convention shall be used. Thcse operations or decision blocks that are identified in a particular routine will be identified b~ a four digit number The first two digits identify the figure in which the par,icular block appears. The las' two digits ~re uliique to a part:icular block within that figure. For ~xample, -- ~6 ~

the firs~ operation in ~isure 20 is i~entified as operation 2002. That ~igure is a great~y simplified flow chart of -~he overall operation of the ~.etcr. After the meter is powered up, the first st~p 2002 is to initialize output ports to the motors of the meter, the photocells in the printer se~ing detector array, the LED display and the event-indicating photocells, 1~he printer is then set to ~ero (block 2004 and any error flags s~ored from the prPvious cycle of o~eration are written (block 2006~ into the LED display.
A r~ady-to-recelve message or an error message is trans-mitted (block 2008~ to the control unit for the meter.
Error checks are made after the transmission routine and error messa~es are generated (block 2010). The error messages are written into the non~olatile memory and out to the LE~ display. A check is then made as to whethe~-a p~int co~nand is belng received from the control unit ~block 2~12), If it ls, a print routine is executed (b1GCk 7~14~ after which control is returned to block 2008. If a print co~mand is not being received, a check ~ is ~ade as to whether a power loss has been detected (blcck ~016) If a po~er loss has been detected, a jump is made to a trap routine (2018) from which contrcl cannot be retrieved without completely shutting down and restarting the meter.
If no print co~and has been received, and if a power loss is not sensed, a cneck is then ma~e (block 2020) as to whether a message is pending ~rom tne control uni~.

I f~ no me~;a~c is pcndil~g ~ cont:rol is returr-~ed to ~ .S~;~
~lock 2C12. If a message is pendinc3, the input is decoded and a check is made (block 2022) for errors wit~n the message. If errors have occurred, program execution continues at block 2008 S which sends a responsive message to the control unit.
Error messaqes are generated and written out to the LED
displ~y and into the nonvolatile memory. If the message was error free, the required routine is performed (block 2024) before th~ program control returns to block 200~
As was mentioned earlier, the messayes which are transmitted to and from the control unit 12 are organized into sixteen four-bit words ~or reasons of simplicity even though most messages do not require the fu~l 16 words. Preferred formats for the various messages are set out in Appendium D. The first t~o words of any message, whether transmitted to or from the control u~it, is a checksum obtained by adding the rem~ining words of the message. The third word of an~ message is an ?

code identifyin~ the pzrticular type of operation to be performec or which has been performed in response to the message. Words identified by a D are data words. Words identified by an E are error ~ords while ~,ords iden,i~ied by an S arespecifier words. Words identified by R

indicate the address of a xegister to be ~ritten into or re~d. A word identified by a B is a four-~it status worc!.

Figures 21 - 26, taken collectively, illustrate the main program for the posta~e meter. Interconnectior.s between various ~locks of the rlow chart are show~ ei'her as direct arrow connections wherein the arro~Jhead indicates the direction of the proqram flow or as indirec~ cor.nections linked through encircled alphabe~ characters. An e~;ample

4 8 vf an indirect connection is shoZ,~n in Figure 21 where an Lncircled A appcars both ~t the ~ottom of the left-hand column of blocks and at the top of the right-hand column.
Th~ two poirits indicated by an encircled character are treated as being directly connected.
The particular CPU chip employed in one embodiment o~ this inver.tion includes an interrupt input terminal Z~hich is disabled lblock 2102) as the first step in the main program. Each of the output leads from the output por~s 37 and 41 are loaded with O's to disable the two stepping motors which drive the printer, to initialize the shift registers which control the photocells in the printer ~etting detector array and the LED display. A binary 4 is loaded into output po^t 39 to disable the motor select outputs ~hile en~r-gizing the event-indicating photocelis. Tne completion of these steps is followed by writinq a predet,ermined code ~block ~104) into random access memory. The code is ~ater transmitted to the control unit.
Control o~ the ~Zeter then jumps ~block 2106) 2~ to an INITS subrcutine which sets the printer to 0. This subroutine and all other subroutines calle~ by the main program are described in more detail with reference to 12ter figures~ A~ter the INITS subroutine is perfDrmed, a check is mad~ for any errors ~oted during execution of that sub-routine. Error codes are written into nonvolacile memor~~block 210~), after which a check is made (block 2110) for crrors ~hich oc~red during previous intialization attempts.
The ir.itialization subroutine is described as an unconditi~nai routi~e; that is~ reg2rdless of noted errors, it ~ill con.inue to attempt to reset the meter to zero when called.

` `~ ï

until a chccl; ~bloclc 2112) indicates ~::ha~ the number of unsuccescful initiali~a~ion atternpts ~as excced~d a pre-de~ermined number. If initialization is successfully completed before the predetermined n~mber is reached, an ini-~ialization error flag is cleared (block ~114) ~rom nonvola-tile memory. Error flags which were generated during previous attempts to set the meter to a specified postage are cleared (block 2116) from non-volatile memory be~ore control jumps '.o a ~NV~ subroutine (2118) which tests NVM memory, generates error flags and writes those flags into a specified index register in the central processor.
But if an error had occurred during execution of the INITS suhroutine, these intermediate steps would have been skipped with control branching from block 2108 directly to block 2118. Checksum errors and control sum errors are retrieved fr~m no~volatile memory and written out to the LED display (block 2120) before 'rI~T subroutine (block 2122) `
is called to test the interrupt input photocells. TINT
error codes are ~ritten out to ~he LED ~ splay.
A checksum seneration routine is performed as part of the main program. The first step in this routine is to initialize the registers (bloc~ 220~) to ~e used.
One of the last fourteen words from a previously generated l~. word ~lessage (which excludes the checks~m words of the 2~ messase) is retrieved from memory and s~med with previous3 retrieved words in the same message. After the addresses are incremented ~block 2204), a check (block 2206) is made as to wheth~r the last word in the message register has been read out of memory. ~f it has not, the cy~le ls repeated.

, ~ --50--If it has, the generatcd checks~n is written into memory and the TR~N or transmission routine begins.
Registers to be used are initiali~ed (bloc~ 220~), the input/output ports for the communication with the con'~rol unit 12 are selected (block 2210) and a start bit is ~ritten to the output port dedicated to communication with the control unit. After the start bit is written, a check (bloo~ 2212) is made whether an acknowledgement is received. The pro~ram continues to recycle through the checking step 2212 until an ac~nowledgement is received. Once a one is receiv~d, a 0 is written out to the control unit and a programmatical delay 211 occurs to establish an intercharacter gap. A ~our-count loop is set up (bloc~ 22163 before a memory location is selected and read (block 2218~. The first bit of the retrieved word is read in operation 2219. A binary one is written to the output port which communicates with the contxol unit and a decision is made as to whether the data bit retrieved fro~ memory was a 0. I~ the bit was nct a 0, (i.e., ~as a 1) control branches to 2 first delay routine 2220 which is followed in sequence by a second delay routine ~block 2222). If however, the check shows ~hat the bit re' rieved from memory was a zero, delay routine 2222 is accessed directly. ~fter delay routine 2222 is ~inish ed, a zero is ~ri~ten ~block 2223) ~o the output.
Thus, where the bit being transmitted is a binarv one, the output is maintained at a 1 level (lisht beiny generated by the LED) fGr a lon~er period of time than ~here the transmitted bit i5 a 0. After a delay for an .,~

intercharac~er ~ap, a check is made as to whether the loop count is less than four; that is, whethcr all ~its in the selected word have been read~ If it i5, the loop count is incremented to select the next bit of the word be~ore control returns to ~lock 22190 If the 1OGP count equals four, a check is made (~lock 2224) as to whether the end of the message register has been reached. If not, cor,trol is returned to block 2216 at which a four-count loop is aga~n set up to read the next word from the message register.
~nen the last word of the message register is ~ransmitted, the main progr~m continues at block 2302 which is a jump to a TPST subroutine which compares the contents of the meter setting register to the contents o~ the descending register and to the absolute zmount o~ $1G0.00.
After the TPST subroutine is e~ecuted, the T',~M subroutine is called (block 2304) to look for e~rors bits. Any error bit is stored in the speci~ied register and a jump is made (block ~306) to a READS subroutine which tests the photccells monitoring the printer setting. Error codes generated as - a result of the test are stored in the~same register ~s the nonvol~tile memory error codes and the jump is made ~block 2308~ to the TINT subroutine which tests the hard-w~re associated with the interrupt circuitry. Any resulting S e-ror code is stored in the same register as error codes Droc~ce~
by the preceding steps. The contents of this register are ~ri~.e bo~h into a specijed random access mcmory (}~lock 2310j and in~o nonvolatile mcmory (bloc~ 2312).
A C~IKSM subroutine is thcn called (block 2314) to gcnerate ncw c~ecksurns fo~ thc altered contcnts of the nonvol~tile mcmory. ~n ERRI~ subro~tine is called to retrieve the error flags from nonvolatile memory and to rcad them into a specificd ir~dex register in the CPU. Initialization error flacJs and RMRS time o~t error flags are read and combined and written into a display area with a DISP subroutinc which is called (block 23]~) to display the results on LED display 13.
A determination (block 2320) is made as to whether a print signal is present. As was mentioned earlier, this signal is generated only when the print drum of the printer has actually begun to move from its home position toward a postage imprinting position.
If no print signal is sensed, a check 2322 is made as to whetller a shut-down condition is present. A shut-down condition as defined is an underpower condition. If such a condition is sensed, a jump is made to a TRAP loop 2324 which cannot be exited until the meter is completely shut down and powcred up again.
If a print signal is detected at block 2320, the main proyram enteri a POST routine which updates the ascending and descendin~ registers, the piece counter and the checksums for the nonvolatile memory registers. The contcnts of the ascending register are modified by'adding the contents of- the meter setting register and the CH~SM routine is called (block 2404) to update the checksums associated with those registers.
The piece counter is incremented by one and the descending -53~

t ! ~ - c.
..
G

r ~ r -s--- ~

rcgistcr is dccre!Ilented by sI~tl-acting the contcnts of LhC nIe~er s~ttin~ rc~istcr. The C}IKSM su~routinc is again call~d ~block 2~0~) to updatc the checksums associated with those registe~s.
A jump is madc- to the TPST subroutine (block 2406) to con~pre tl)c contents of the rneter setting register both with ~100.00 and with the contents of the descendin~ reqister~
Fla~3s indicating whether the meterr:setting register exceeds either or bo~h of these levels are writtcn into the message area. If the contents o~ the descending register are less than tIIe contents of the meter setting register, indicatiny there is insufficient postage to per~Orm the print operation, a jump is made to a DSBL~ routine (block 2408) to disable the meter. A disabled bit is then written (block 2~10) into memory. If, however, the amount of postage in the descending register is sufficient, the step 2408 is bypassed and an enabled bit is written in the memory. The print op code is written into random access memory (block 2412) and the meter setting register contents are transferred to an output register (block 2416). An inquiry 2418 is made as to whether the print signal has terminated. Until the print - signal does terminate, program control remains at this inquiry.
When the print signal has terminated, control is returned to block 2202.
Where no print signal had been sensed at block 2320 and no shut-doh~n condition was sense~l at block 2322, program control is transferred dixectly from blo!~k 2322 to a block 2~20 at which a check is made as to whether the control unit is ready to send a message. The first step in th~ message receiving routine (bloc~ 2-~2) is the selection of the input ~ort ~hich re-ceives signals frorn the control unit 12 and of the random access memory registers into which data mcssages are written.
The processor then waits (2424~ until an input bit is received to write out an acknowled~ment bit 12426)o A check is made ~2502) as to ~hether the inpu~ bit has terminated. If it has not, a timer is incremented (block 2504) and a check is made ~block 2506~ as to whether a predetermined period of time hzs expired. This timing loop is repeated until the input bit is terminated or until the predetermined time has elapsed. In the latter instance, an error code 1 is loaded in the accumulator to indica~e that too much time ~as required to remove the acknow-ledgment bit. If the time out period has not expired, progr~.
control c~ntinues at a block 2508 in ~hich a four-count loop is set up.
~ bit space timer1 which checXs the interval between incomins bits, is reset in oper~tion 2510 before .he input port from the co~munications channel is read in ~loc'~ 2512. A check is then made as to whether the input bit 2~ is on. If it is, the input is agzin read in block 2514. I
it is not, the bit spacing timer is incremented (block 2516) and a check is made (block 2518~ as to whether ihe maximum allo~Jed space between bits has been exceeded. If the time interval between bits is too great, an error code 2 is writ.cn ~5 (bloc~ 2520) into the acc~mulator. If the in?ut bit is on ;r~

at thc time of operation 2514~ a secorld decision is ~de as ~o ~]lether the input bit has xeturned t:o zer~. If the input bit has not returned to a zero level! a bit duration ~imcr is incre~ented tblock 2522) and a determination 2524 is ~ade ~s to whether a ~aYimum bit duration has been exceeded. If the maxim~rn bit duration is exceeded,an error code "3" îs loaded into the accumulator~ If the maximum bit duration hâs not been exceeded, the input read cycle is repeated until it is deter~ined that the input has returned to a zero level, Since the only differenc~ bet~een a binary 1 and a hinary 0 in a message being received is the length of time during which the LE~ remains energized, it is necessary to decode the length or duration Of LED ener~iz~tion (block 252G~ to determine whether a 1 or a 0 is being received, The result is stored and a determination (block 2528) is made as to whether the loop count is less than or equal to follr.
If it is, program control is looped back to block 2510, I~
the loop count equals four, progra~ control continues with tne four-bit word being written ~block 2602) into random ac_ess ~ memory, If the last ~ord in the message has not ~et been received (block 2604), program control returns to block 2508 to read the next four-bit word in the message. lf the la_t word has been received, an error code 0 is loaded in~o the accumulator in ~lock 2606. The contents o the accumulator, whether they are a zero from block 2606 or a nonzero error code from one of blocks 2507, 2520, or 2530,are loaded into

- 5~ -~'' ~ '1~; '.i ' L~

a temporary register ~block 260~) before thc acknowl~dg-men~ bit is endcd. Thc contents of thc temporary register are t}len reloaded into the accumlllator (block 2610) and a determillation is madc as to whether the accumulator content eguals ~ero (block 2612). A zero accumulator indicates that no errors have occurred during receipt of tlle message from thc control unit. A nonzero accumulator indicates that an error has occurred. Under the latter conditions, a jump 2614 is made to ST5, to write an error op code. If, however, there were no errors, a chccksum is ~enerated for the received message and is compared with the message transmitted checksum. A determination is then made ~block 2fil6) as to whether the ~wo checksums are equal.
~ny inequality indic~tes that a discrepancy exists between the message as transmitted by the control unit and as re-ceivcd by the meter. An error message indicatir,g a discrepancy is loaded (block 2618) into the accumulator and the error op code is written (block 2614).
If the two check sums are equal, the op code (which is the third word of the message) is read and a jump is made (block 2620) to the routine called by the message. There- -after, program control returns to block 2202 for another complete cycle of the post-initialization portion of the main program.
The main program and the subroutines use a number of multi-count loops and fixed time delays for reading words, for writing words, for establishing delays for stepping motor operation, and for similar purposes. The programma~ical technique for establishing the multi-count loops and fixed time delays is shown in FIGU~E 27.

S ~ --s, O ..

specificd four bit register is lo~dcd with a ~no-~n v~lue l~ss than thc m~Y~ilnul, capaci~y of thc register.
Wher~ t}le tcch~iq~e is being u~ed to es~ablish a multi-coun-t loop, the routine into which the loop is incorporated is per~ormed once be~ore the four ~it register is incremented.
A chec~ is then ~ade as to whether the register contents are equ~l to 0 (maximum re~ister capacity plus 1). If the register does not equal 0, the routine is again performed and the register is again incremented. This loop repeats itself until the check reveals that the register contents equal 0.
At this point, the loop is exited and the next operation in the sequence performed.
- The only difference ~etween the use of this technique to est2blish multi-count loops and its US2 to establish a fixed time delay is that no routine is per~ormed within the time delay loop ; i.e., the 'perform routine block shown in dotted outlines is completely omitted where only a fixed ~i~e ~elay during program execution is desired.
In the instructiorl set used wi.h the ntel 404~

central processorr a single ISZ .nstruction performs both the incrementing step and the ze~:o equality check.
FIGURES 28 and 2~, ta~en collectively, descri~e an initiali~ation subroutine INITS ~hich is used in setting the meter to zero as part of the initializations~rout~e. me m._ter setting register or MSR in memory 42 is set to zero ~block 28~2). The output ports for controlling the digit select motor are selected The rest posit7On is written out (block 280~) and the delay 1P is e~tered to give the motor time to reach that positioll. The di~it select mo~or is then decnergized and a jump is m~de to READS subrou~ine , 3~ L~
~lock ~Q6~ to rcad the currcnt sctting of the photocell which senscs whetllcr monitorin~ whcel 166 is on a half or a full st~p. If the monitoring wheel is on the half step, a jump is made to the STEPD subroutine (block 28G8) to drive the wheel to a full step. If the monitoring w}leel is already on a full step, ~he output ports for the bank select motor are selected, the rest position for that motor is written out and a fi~.ed delay occurs to permit rnotor to reach that settinq.
A jump has been made to the RE~B subroutine (block ~810) to determine whether the ~rinter yo~e is a~
the most significant digit. If it is not, the yoke is stepped towards the most slgnificant digit (block 2812j position with a checX being made after each step as to lS whether or not more than five steps have occurred. If less than five steps have occurred and ~he yoke has no~
yet arrlved at the most signi~icant digit position, this loop is reiterated. If more than five steps have occurred, an error condition exists since a maximum of five steps should ~ave been required to move the yoke from one extreme to the other. Under these conditions,control is returned to the main program (block 2814) and an error code 1 is loaded into t~.e accumul~tor. If the yoke reaches the mGst signifitant position without exceeding the maximum number o~ permissible steps, the digit select an2 bank select motor directions are set (block 2816), after ~Jhich the zero di~it pOSition photocell ~or the selecte2 bank is read. The first bank to be read is, of course, the most significant digil bank. If the selected bank is not at zero, a jum~

is ~n~de (bloc~ 2902) ~o t ~ s~rL~D su~rou~ine to ~rïve thc E)rint wh~el to~rds ~ero. If an error occurs durins thc execution o~ the S~ D su~routin~, an error code is stored (block 2904) in a predetermined index re~ister, control is returned to the main program and an error code 7 ~block 2906) is loaded into the 2ccumulator. If no error occurs during the execution of the STEPD subroutine but more t.~2n nîne steps are required to zero the selected print wheel, the identification OL the bank being reset to zero is loaded into the index register before control is returned (block 2908) to the main program with an error code 2 being loaded into the accumulator~
In the absence of errors, the loop including b?oc~s 2910, 2912, 2902, 2~1~ and 2916 is repeated as the w~e~

is stepped digit by digit toward the zero position. Once ~he reading of the pnotocell indicates that the selected ~_n~ is at zero, the print ~theel is stepped from zer~ ~lock -2~18~ a~d a reading is made to determine wheiher the phato-cell output reflects this. If the photocell output does r~o~ change ~,hen the print wheel is stepped past zero~
,here is clearly a ~alfunction in the system. The }~enti-~cation of the bank being set is loaded into th~ se~ec~d irdex ~egister (block 2920) before control is returne~ .o the ~ain progrzm. Under these conditons, an error code 5 is 'o~ded into t~e ~cc~ulator.
Ir the ~hotscell output does chans~ ~-hen the p~ t ~heel is stepped from zero, the print ~heel ~s ~S~e~
bac~; to zerG (blGck 2~22) znd a second chec'r; is m~de ~D.~ CC~
~92-!~ as to ~hether the photocell 2g2i n shc~;s -the ~:}-eel ~t i is zero ?osition~ If the photccell dGes ~ot co ~e~ ot~r the wheel at thc zero posi~iont thc ba~k idcntification is loaded into the speciied index register (block 2926).
Control is returned to the main pLogram ~block 2928) and an error code ~ is loaded into the accumulator.
If the pho~ocells are opera~ing properly during this step-past, step-bac`r~ error check, a jump (block 293G~
is made to the STEPS su~ outine to select the next lower bank. Any errors occurring during execution of the STEPS
subroutine are identified and the proper error code is loaded into the specified index register (block 2932).
Control is returned to the main program ~block 2934) with an error code 4 being 102ded into the accumulator. If no errors occu~red during the execution of the ST~PS subroutine, a check (block 2936) is made as to whether the last ~nk has been set to zero. If it has not program operation continues at bl~ck 2910 which repeats the same bank settir steps and error checking steps for each of the ~anks.
When the last bank has been set to zero, the fi~th step photocell adjacent the monitoring wheel 166 is read and a check is made as to ~hether there is a match between the conLents of ~he fif~h step counter and the location of the extra long slot on the monitoring wheel. If a match is aetected the fi~th step counter is reset ~block 2938), after w}lich colltrol branches back to the main program ~5 (block 2940). If the check does not indicate a match bet~een the position of the monitoring ~heel and th~ contents of the rifth step counter, a jump (block 2942) is mzde to a STEPD su~routine to step the monitoring wheel down on~
step. l~ check (block 2944) is mzde as to whether o not s~
four such S te?s have occurred. If t~ey have no-t, control is returned to the block in ~J~ich the fi~tll step photocell is read.
In su~ary~ the INITS.subroutine resets the print wheel associated with each bank from its last setting to a ~ero setting while simultaneously checking to make sure the photocell associated with that bank is providing proper zero position reading. The I~TTS subroutine also zeros the fifth step counter ~lhen the extra long slot on the monitoring 1~ wheel is lined up with the photocell which detects the slot.
Figure 30 is a flo~J chart of a TNVM subroutine which checks for correspondence between chec~sums and data stored in the nonvolatile memory. The subroutine also checks whe~her the sum o~ the contents of the ascending and descending registers equals the control sum.
The first step (block 3002) of the subroutine is ~o initialize registers to select the first register in the nonvolatile memory, to select a status charactcr locatio;~ into which an error code can be written and ~o set up a lour-co~n~
~0 loop. Data stored in the selected register of the non-vola~i'e memo y, excluding s~ored chec~sum words, is s~mmed to generate a checks~m for the register contents in an operatior. 300~. Th~
checksum already stored in the re~ister is retrieved and the generated check sum is subtracted therefrom (block 3006). If the difference bet~leen the stored checXsum and the generated ch~cksum are not equal to zero, indicating that errors have occurred ei~her in writing data into or reading data ~rom the nonvolatile memory, an error message is generated (block 3~08) for that particular register~ Ir ~he stored checksum does equal the generated checksum, a determination (blocli 3010) .r~ L~
is m~le as to ~ ther ~le l~st no~lvolatile mcmory reqis~er has bcen testcd. If the last rec~ister has yet to be tested, the ne~:t regis~er is selected (bloc.~ 3012) and control is looped back to ~lock 3004, to repeat the checksum gen~ration and compdrison process. When the last nonvola~ile register has bcen tested, any resul~ing error bits are written (biock 3014) into statu~ character 0(0SCO) oÇ register two in random access memory 38.
Referring again briefly to Figure 19, a status character is a four-bit memory locat~on. A 1 in any bit of that ~Jord indicates a checksum e~ror in the particular register associated with that bit.

The TNV~ subroutine retrieves and adds t~e contents of the ascending register and descending register (bloc.k 3016), after which the sum is subtracted from the retrieved control sum. If a difference other than zero is note~ as it should be during proper operation, the acçumulator carry bit is clearedu The last step in the sub~outine (block 3~1~3 is a branch back to the main program.

Figure 31 is a flow chart of a TINT subroutine called to test the photocells in the event-indicating si~nal generator circuit 32. One photocell indicates whether the meter has been remo~ed from its base. The other photocel indicates t~hether a print operation has begun. The rirs.
step in the subroutine (block 3102) is to select the ouput port which controls the test switch 50 in the signal generator circuit. A zero is written (blcc~ 310~) at tlr.is output port to turn off the light emitting diodes 355, 36~.

Thc inputs ~l-ol~ ~he me~er loc~ed detector 5~ and print de~ector 5~ which includ(~ the r~f~renced LEDs, are read to input ~uf~er 60 (~loc~ 310~) and tclnporarily stored~ ~ binary 1 is thcn written at the selected output port to switch 50 to turn on the LEDs. The detector inputs are again read Iblock 3108) and the two readings comhin~d (block 3110~. If the circuits are operating properly, the accumulator should equal zero. If an error has occurred, the accumulator contents will not be equal to zero. The accumulator are stored in status character 1 of register two of random access 3~ ~block 3112). Control is returned to the main pro~ram (bloc~ 3114).
Figure 32 is a flow chart of a TPST subroutine called to comp~re the contents of the descending register to the contents of the meter setting register and to an ab-solute amount of $1CO.OO. The higher order digits of the descending register are read (block 3202) and a determina~ioi is made ~block 3204) as to whet~ler the contents of the de-scendin~ re~ister are greate~ chan or,equal to ~100.00.
T~ihenever the contents of the descending register fall belo~7 this arbitrarily selected $100.OG limit, an LED displa~
reminds the user that the postal meter l~ill need to ~e re-charged soon. The accumulator carry bit is set to 1 i~ ~he ~oun. stored in the descending reyister is less than ClOO.Ca but is reset to zero where the contents of the descending re~ister exceed or are equal to $100.00. A hexadecim~l representation ~1000) of the number eisht is loaded (blc,ck 3206) into the accumulator and shifted risht. The ~CC~I~U-lator contents are then stored in the te~porary registerO

... . .

The ccntents of thc meter setting register are x~trieved and subtracted ~block 3208) from the contents o~ the descending register. If the descendin~ register contents ar~ greater than the meter setting register con~ents~ the accumulator carry bit is reset to 0. Otherwise it is set to 1. The accumulator contents are then com~ined with the con-tents of the temporary register and the result is written (block 3210) into a display register. A zero is written into the accumulator tblock 3212) upon return to the maln program.
The end result of the TPST su~routine is a ~our bit ord which is s.ored in random access memory location lF which is the last register for the LED display bit. The le~tmost bit of this word is a one if the contents of ~he desce~ding register are less than the contents of the meter setting register. The next less significant bit is a one i~ the contents of the descending register are less than $100.0~.
~he next bit is Gn unconditional "on" bit which gives the user 2n indication that the meter is on. The least significant bit of the four-blt ~ord should always be a zero.
Referring to Figure 3~, the illustrated READS
subroutine is used in controlling the printer set~ing detector array 30.
The subroutine includes preliminary steps (not shown~ for selecting which of the three detector-co?taining columns o~ the printer setting detector array are to be selec~ed.

.... ..
, . ~

After thc prcliminclry s~cps havc becn carried out, thc error indicaLo~ for ~)le array output is clcarcd ~block 3302) ~nd all inpuls from the array are rea~ (block 3304) bcfore any data is shifted into the shifL rcgis~er 2~. ~t this point, the detector array should producc all zeros. If it does not, an error condition is indicated and s~orcd. Then, under the control of the electronic control unit a binary l is shifted (block 330G) to the first stage of the shift register rnultipleY~cr. The signals on the outputs of the comparator amplifiers are again read. At this point, the amplifiers should have binary 1 outputs for the reasons stated in t}le description of Yigure 11. If not, all of the signals are binary l's, an error indication is stored (block 330g) and the shift register 28 is clocked by the single clock pulse.

A check is then made at decision block 3310 as to whether the binary 1 is at the preselected stage of the shift register.
The clock pulses are repeatedly applied to the shift register until the binary 1 is shifted into the desired stage.
When the binary 1 has been shifted into the desired multiplexer stage, the inputs from the associated detectors are read and stored. After the read operation is complete, the shift register 28 is again clocked and a check made at decision block 3312 to see whether the binary 1 has cleared the last stage of the shift reyister. The shifting operation is repeated until the shift register is clear, after which the control is returned to the main meter program.
Figure 34 is a full chart of a CH~SM subroutine which is called to generate new checksums for selected registers in thë nonvolatile memory when the contents of those registers have been changed. The starting address of the NvM register to ~e acccssed lS set in t~lc callin~ routir1e. Once that reyister h~5 becn selected ~ pair o tem~orary r~gisters are initialized (~lock 3102) by loading thcm with zeros. A
four-bi~ word from the selected nonvolatile memory register is then read and added to the contents of one of these registers arbitrarily designated as register Rb. Carry bits are accumula1-ed in an adjacent register ~a. ~uring the first cycl~ of the C~1KS~ subroutine, there is of course no carry bit. The address register which indicates the nonvolatile memory word being read is incremented and a determination (block 3~0~) is made as to whether the last word in the reqister has been read. The decision 3404 is made using ~
coun~ loop of the type previously discussed. The count loop is not expressly illustrated in the C~KSM flow chart.
If the end of the selected NVM register has not been reached, the cycle is repeated with a new four-bit word being read from memory and added to the previously acc~ulated words in register ~ . The carry (if any) wnich results from this step i5 added to the contents of register Ra. When the ~nd o~ the 1QP is reached, the contents of registers Ra and Rb are written into the checksum locations for the s~lectea NV~I register. The hish order or carry is written into ~ord ~ of the register while the low order is written into ~ord '.
Control is returned to the main program.
~5 Figure 35 is a flow char~ of an ERRR subrou.ine called to read error registers in ~he nonvola.ile memory and to set up error indications in an index register of the .

ccntr.ll rrocessor ~ a form which pcrmits deLcrlllination as to whe~hcr cer~ain opcra~ions or subrou~ines should be performcd or aboL-ted. Error indicaLions are storcd in Register 2, words 2 - c'~ of the noJ~volatile memory. The first step in thc ERRR is to set up tile address of the first of ~heseelr~ rLgisters; i.e., tlleerror register containing error codcs for the RMRS subroutines. Any error code stored at this location is read (IJ1OCk 3502) and a check is made (block 3504) as to whether the RMRS error e~ceeds a fixed limit. As was mentioned earlier, the user is givell a certain nw~ber of opportunities to carry out required steps at the beginning of the ~RS subroutine. If he does enter the correct combination within a certain r,umber of attempts, a zero is written to the most significant bit or bit a of a specified index register. If the user fails to enter the correct combination within the allowed number of attempts, a l is written into the same location. The central processor is instructeci (block 3506) to clear the accumulator carry bil as a precaution, since the bit might have been set during the performance of earlier subroutines.
The nonvolatile memory location containing the error flags associated with the initiali~ation process is read and a determination (block 3508) is made as to whether any initialization errors are in~icated. If such errors are indicated, the accumulator carry bit is set to 1. If no errors are indicated, the carry bit remains at the zero level. Thc nonvolatile memory register ContainincJ error ~lags associated with the meter settin~ subroutine is read

6~ .

Q

.. . .

l~nd anot~ler det~rmir~ation (block 3510) i~ made as to whethcr set~irlg ~rrors have been recorded. If so, the carry bit of th~ ac~umula~or is set to 1. The value of the carry bit is stored ~block 3512~ in the second most significant~bit of the specified i~dex register, A binary 1 loaded into this location in the speci-fied index xegister will indicate that an initialization error and/or a s~tting error has occurred but will not specify exac~ly which kind of error has occurred. A binar~ 0 loaded into this loca~ion in the specified index register indic~tes that no errors have been recorded during the ~xecution of ~ither the initialization or meter setting subroutines.
The nonvolatile memory register which stores error codes relate~ to the c~nulative number of sequentially occurring setting errors is read ~block 3514) and a determina-tion is made (block 3516) as to whether the cumulative number ~xceeds a predetermined limit. If it has, a binary 1 is written into the second-least significant ~it of the specified index register. Otherwise, a binary 0 is written into tha~
~0 location in the register. The accumulator carry bit is cleared ~block 3518), assuming it ~as set during the reading of the initi~lization error ~lays and setting error flags~
~he nonvolatile memory register which stores error flags relating to memory or photocell errors is read and a determina-ation made (block 3520) as to whether any err~rs are indicated~I~ errors are indicated, the accwnulator carry bit is set ~o one. The carry bit value, whether a 1 or a Or is stored ~block 35223 in the least significant ~it position of ~he i r~
,1 - 69 index re(3ist~r. J~etcr co~trol br~nches back to the main pro~ram a~ this point.
Th~ error-indicating bits which are loaded into the specifi~d index registcr remain ther~ after the ER~R
subroutine is exited. The contents of this register are accessed during the e~ecution of other subroutinesv Figure 36 is a flow chart of a DISP subroutine used to retrieve LED display indicator bits rom random access memory 38 and to write those indicators to the out-puts of the shift register multiplexer 11, which drives the~ED display 13, A specified index register is loaded with the address of the first word (word lD) of the display area in random access memory 38. The output port connected to the shift register ~ultiplexer 11 is specified (block 3602) ar,d a four-count loop counter is set up, The first four-bit word is read from memory into the accumulator. One bit or this word is written out ~lock 3604~ to shift register multiplexer 11, after which a check (block 3606) is made as to whether the coun~ in the loop counter is less than or equal to f~ur. If it is, the count is incremented by one and another bit from the same word is written out to the shift register multiple~er. When the loop count exceeds four, the program branches to block 3608 which determines whether another word in the display area ,^egisters ~nd random access memory remains to be read. I~
another word is to be read, the menory address is incremented before program control returns to bloc'~ 360~ to repea~ the read/write cycle for the newly addressed word. When zll three words in the display area of the random access m~mory .;.,'~'. ".,!,~'' .

have becn rca~ out, control is returned to the main program.
Piq~le 37 is a flow chart of a DSB~E subroutine which is uscd ~o disablc the printer; i.e., to drive the yoke to a position in which all of the print wheels are meci-dnically locked up by the troughs on thc yoke surface. When control of the meter jumps to the DS~L~ subroutine, a disable 1ag is initially written (block 3702) into SCl of rcqister 1 in random access melnory 38.
The last bank setting of the printer is read from 10 SC3 of the same register and a determination is made (block 370~) whether the printer was already sitting in the disabled position when the DSBLE subroutine was called. If the printer was already disabled, a 0 is loaded into a specified index register and control returns to the main program. But, if the 15 printer is not disabled, a jump is made (block 3706) to the ST~PS subroutine to drive the printer to the disabled posi-tion. ~ny errors which are noted during the execution of the STEPS subroutine are written (block 3708) into nonvola~ile memory before a jump is made to a DESLT subroutine.
The DESLT subroutine is called only when setting problems or photocell reading problems occur. This sub.outine is described in more detail with reference to a later fiqure.
If the DESLT subroutine is called, the contents of the error flag index register are loaded into the index register 25 specified earlier in the DSBLE subroutine (block 3710) be,ore control is returned to the m~in program.
If, however, the STEPS subroutine is called and executed without errors, only a 0 is loaded (block 371~) nto the specified index register before control is returned to the main program.
.

. . c~
c.

Figur~ 38 is a flow chart of a ~E~DI~ subroutine which gives a user unrestrictcd access to certaill registers in the nonvolatile and volatile memories. The register to be read is specified in the data message block in regis~er 0 of memory 38. The first data word (word 03~ in this register is read ~bloc~ 3802) to specify the memory location to be accessed by the user. A check is made (block 3804~ to d~termine whether the user has speci~ied a location ~ithin thc nonvolatile mernory. If a memory location other than the nonvolatile memory is specified, a further check (~lock 3806) is made as to whether the specified register is undefinedi i.e~, whether it is a register other than the meter setting register. If the block 3806 indicates the meter setting register is specified, that register is read and the ~ontents written intc 1~ an output area ~rom which they can be sent to the control unit.
Arter the register is read and ~fritten out, control is returrcd to the main program. But if th~ check 3806 deLermines that ~.~e register sought ~o be accessed is undefine~, control i~ retu~nec i~ediately to the main proyram.

If the earlier check 3~04 shows that a register within nonvolatile memory has been specified, the firs L
location in the specified area is read (block 3808~ be~ore a counter loop is set up. The specified register is read (bloc~ 3810~ and written into a specified output area. The addresses for the registers to ~le read and for the output ~rea into which the data is to ~e ~ritten are incremented an~ a check 3812 is made as to ~Jhether the end of the s~eci-fied register has been reached. If it has not, program control is returned to block 3810. If it has, control is ~e,urned t~c ,~.c.ir. ~rG~jrc,l~l.

Fi~)~rc 39 is a flow chart of a SETZ subroutin~
whicll is used to set the printer to a specificd postage anlount. The first oper~tion in the subroutine (block 35023 is a jurnp to the ~RRR su~routine described previously to permit any error flags stored in nonvolatile memory to be retrieved and loaded into a specified in~ex register. If any flags are detected after the return from the ERRR sub-routine, a "70" error message is generated (block 3904~ and a direct jump is made (block 3906) to an error writing STER

subrou~ine. But if no error flags are detected J a check is made as to whether the BCD representations of the postage to ~e set are ~ithin l~uts; i.e. 0 - ~. If a postage value is found to fall outside the limits, a "60" error message is generated (block 3908~ ànd a direct jump made to the STER suh-lS routine. If the postage values are within limits, the NTBSregister is read (blocX 3910). The SETS subrout~ne, describea in more detail later, is called in operation 3912 to set the printer mechanism to the postage values specified in the - iT~S re~ister If any errors are noted during ~he execu~ion o~ the SETS subroutine, a direct jump is made to the STE~
subroutine. If no errors are noted, a decision ~bloc~ 331~) is made as to ~hether the message has an enable bit. I
the message lac~s an enable bit, a jump is made to zn ERR3 subroutine (block 3916) to reset the cumulative set erro.

indicator and to generate a new NV~5 chec~sum. After ha~, control is returned to the main program.
If, however, the message has the enable bit, a jump is made (block 3918) to an ENBLE subroutine to ~ndble the meter, assuming there is sufficien~ postage remainin-~

in th~ descendin~ rcyister ~o actually print t~le specified ~ostagc. Ar~cr cx~cution of thc ~N~L subroutine, a decision 3920 is m~de as to whc~tl~er the meter was actually enabled.
If it was not, a disabled flag is writt~n (block 3922) into S r~ndom access memory. ~he status of the desc~nding .egister ~hether lcss than $100.0~ and/or less than the meter setting register) is loaded into me~ory (~lock 3924) before a jump is made to bloc~ 3916.
If the decision block 3920 shows the meter ~as actually enahled as requested, a check 3926 is made as to whether any errors occurred in the enabling process. If they did, a "50" error message is generated before control ju~nps to the STER subroutine. If there were no errors ~uring the e~abling, sontrol branches to the block 3916 whicn ~ltimately returns control to the main program.
~ igure 40 is a flow chart of the STER subroutine which can be called at several points during the execution of the mete.r setting or SETZ subroutine. When the STER subroutine is calles, a s~ecif c error message ~as alr~ady been loa~ed into the zcc~,-ulator. The first operation in the STE~ subroutine ~block 'OC2)is to write this error message into a specified word o~ the da.a message register of memory 38. A hexadecimal A is ]oaaed into the accumulator (block 4~04) and tne generated error code s added to the acc~nulator contents. If a decision 4~06 shows tha'~
~5 the carry ~it has been set to 1, this means either that erro, ~ gs were originally read fro~ the nonvolaLile memory at che start of the SETZ subroutinè or that the postage val~es at-e no~
within BCD limits. In the event of either type of er.or, a j~.p (block 9008) is made to the DSLT subroutine .o disable the met~r.

Ther~after, control is ju.~ped ~bloc~ 4010)to ~lto cause anerror . . . .

-7~

5;~,~
inessage to ~e written in the nonvolatile melnory.
If d~cision ~lock 400G s:hows that no error or that an error code Gther than a "60" or "70" error code was generated d~ring the execution of the s' rz subroutine, control is return-ed ir~mediately to the main program.
Figures 41 and 42, taken collectively, are a flow chart of the S~TS subroutine which is called during execution of the SET~ subroutine to actually set the printer to the postage values specified in the NTBS register.
l3 The first operation in the SETS subroutine is a jump to the D52LE subroutine described previously to initially dis-a~le the printer. Any error code associated with the execution of the DSBLE subroutine is loaded into the accumulator and a decision 4lO2 is made as to whether the accumulator contents are equal to zero. A non-zero accumulator indicates that an error has occurred during the execution of the DS3LE subroutine.
~nàer such conditions, control is returned to the main program ~ith a l being loaded into the accumulator. If no errors occur during e~.ecution of the DSBLE subroutine, the addresses of the NTBS register 2nd MSR register are loaded (block 410-~) into a s?ecified index register and a ju~p (block 4106) ~s m~de to a C~P
su~routine, to be described in more detail later. Basically, the C`~P subroutine com?ares the contents of the t~o registers and provides the data ~hich indicates how far and in which direc-tion each of the print wheels of the printe~ must be moved. Ifthe C`!P subroutine sho~s that no setting is required at a par-ticular bank, a determination is made (block 4102) as to whether all ban~s have been checked. The digit-by-digi~ com~arisons o~ the contents of the NTBS register and meter setting register continue throu5h the loop including blocks 9106 and 4lO8 aS long as no s~tting is req~lired, at least until the end o~
the loop is reache~. If the end of the loop is reached ~ithout . ~ , .

any set~ g being recluircd, control is r~turned to the main progr..m (block 4202) with a 0 beinc3 loaded in~o thc acc~ulator.
If the colnparison of the NT~S and MSR registers for particular banks show that setting is re~uired, control jumps to the STEPS subroutine (bloc~ 4110) to drive the main gear into engagemcnt with the spur gear for the particular bank. The STEPS subroutine is described in more detail with reference to a latcr figure. After execution of the STEPS subroutine, a decision (block 4112) is made as to whether any errors have occurred.
If errors haYe occurred, an error code is loaded into a specified inde~ register, control is returned to the main program (block 4114) and a 2 is loaded into the accumulator. If no errors occ~r during the execution of the ST~P subroutine, another decision 4116 is made as to whether the printer yoke has ~een lS driven to the last bank to be set. If it has not, the loop besinning with block 4110 and ending ~lith block 4116 is repeated until the printer reaches the last bank to be set.
At that point, the motor direction indicator for the banks select motor is reversed (block 4118) and control jumps 23 to the STEPD subroutine ~block 4204) to actually set the print ~heels to the desired digit. This subrcutine is described in mGre detail later. Errors, if any, occurring during execution of the STEP subroutine are 102ded into a specified index regis-ter belore control returns (block ~206) to the main progrGm.
W-i~n control is returned to the main program under these con-ditions, a 3 is loaded into the accu~ulator.
Each execution of the STEPD subroutine causes the p;int wheel to be moved from one digit to the adjacent digit.
Therefore, the STEP subroutine must be repeated as many times as is necessary to alter the print wheel position from the original position to the position specified in the NTBS register.

Whcn t11e S'r~rl) subl-o~ltill~ has ~een repcatcd ~J~c necessary nwnber of tImes~ prograln contxol bra~cl~es to the STLP~ subrou-tine (b~ock 420B) whic}l drivcs the printer yoke to the next less si~nifican~ digit position. Errors, if any, occurring duIing thc execution of the STEPS subroutine are loaded (block ~210) into a specified index rc~ister. Program con-trol re~lrns to the main program ~block ~212) with a 4 being loaded into the accumulator.
If no errors occur during the execution of the STEP~ subroutine, a decision 4216 is made as to whether all banks of the printer have been set. If not all banks of the printer have been set, program control jumps ~block 421~) to the CMP subroutine to determine whether the currently selected bank needs setting. If it does, the subroutine is repeated beginning with block 4204. If the currently select-ed bank does not need setting, control is returned to block 420B to select the next lower bank. When the decision block 4216 shows that the last bank has been set or at leas~ has been che~ked to determine whether setting is required, program 2~ control is returned to the main pro~ram with a zero being loaded into the accumulator.
When the SETS subroutine is exited, the contents of the specified index register identify any error which has occuxred.

~, ,. .

FIGU}~ 43 is a flow chart of the ST~l'S subroutine or controlling the bank selcct motor in the printer. The first stcp ~302 in this subroutin~ is energization of the bank select motor, which drives the yoke and main gear be-twecn the enabled position, the disabled position and thevarious banks of print wheels. ~rror indicators are cleared and thc bank bit pattern for an adjacent bank to which the yoke is to be driven is written Ollt in a step 4309. To give the motor time to respond, a delay loop 4306 is incor-porat~d into the routine. A chec)c ~308 is then made todeter~ine whether the yoke is being driven into the enabling position against the force of a spring or other resilient r,lembe~ which normally tends to bias the yoke out of that position. If the bank select motor is acting against the force of the spring, an extra delay 4310 is built into the program.
~ he first of two error checks is then made. In a preferred embodiment of the invcntion, the yoke position encoder consisting of the parallel plates 206 and 208 and associated optical detectors described with reference to ~IGURE 6-8 should read all binary zeros at any intermediate position of the yoke. If a check 4312 indicates otherwise, ~n error message is written,into an errorregister in operation 4814. If the readings are zeros, the program goes directly to an end of loop decision 4316. The loop, which beqins with block 4304 and ends with block 4316, is repeated for as many motor steps as are necessary to drive the yoke from one bank position to the next. When the necessary - 7~ -.

o ,0 r .

nulllbL,r of mO~Qr st~pping operationr. have bccn conlp]eted, thL, yoke position de~ectors are again read in an opcration 431~ to obtain an upddte~ bank réading 4320 which is compared wi~h the anticipated reading for Lhe selected bank in an operation 4322. Any mismatch between the anticipated bank reading and the detecled bank r~ading causes an error mc,ssag~
to be written in an operation 4324. At this point, a check 4326 is r.~ade as to whether the motor has driven the yoke into the enabled position in which it must be maintajn~d against the force of-a biasing spring. If the yoke has been driven into the enabled position, the motor remains energized. If the yoke has been driven to any other position, the bank select motor is turned off in step 4328. Control is then retu-^ned to the main program.
The STEPS routine is executed each time the yoke is driven from one bank position to an adjacent bank position.
The routine which contrcls the print wheel setting motors is the STEPD routine referred in several places above and described no~ in detail with reference to FIGURE 44.
The print wheel or digit select mGtor ~4 is energized in the initial step 4402 and the errGr indicators are cleared.
A count loop (block 4404) is initialized. This count loop provides an indication of the nwnber of diffexent motor coil energization patterns required in order to drive the pxint wheel through a half step or halfway to the adjacent digit position. After the count ]oop is initialized, the signals required to energize the motor coils e~ploying each pattern in sequence are generated in an operation 4406.
programmatic delay 440iB permits the motor ti~ne to respond.

, . ~ i I _ 79 _ ~

~ L~r the moLor coil pa~tern h~s b~en changed, a cl~eck ~410 i~ In~de as to whet~er thc ne(essary nulllbcr of counts have occurred in thc cOullt loop. If less than the antic i~a~ed number have occurred, the hit pattern for the next coil enerqization pattern in the sequence is written in ~n iterated operation 4406 and the motor is ariven through another al~gular increment. The process involving operations 4406, 440~ and 4410 is repeated until the end of the loop count is sensed. An indicator is updated in an operation 4412 to in-1~ dicate that the print wheel has advanced from a full step ordigit position through a half step or midway position. The optical detectors ~ssociated with the print wheel setting ~ears are read (block 441~) and an error chec~ is made to dPtermine whether a gear slot or a gear tooth can be seen.

Ir, the half step or midway position, a gear tooth should always be interposed between the light source and the photo-~r~nsistor of an optical detector. Therefore, the presence of a gear s~ot in what is believed to be a half step position ~i l cause ~ half/full step error message to be w=itten (~lock 23 44163 into ~andom access memory. A chec~ 4A18 is made as to whether the motor ~s on a full step. If not, the program re,urns to block 4404 in ~-hich the count loop needed to move the motor hrough a half step is ag~in initialized. If necessary, the motor is driven to another half step by means of the operations 440~ throush ~418 If cheek 441~ reveals that the motor has been driven to a full step position, the fifth step counter re~erred to in the description of FIG~RES 6 - B is updated by one digit. A chec~ is then made as to whether the extra de~p slot on the monitoring wheel 166 is detected when tl~e . , .

count in th~ fifth ste~ counter is othcr than a multlplC of 5. If the extra long slot is aligned with -thc optical detector 16~ while the fifth step counter is other than a multiple of 5, an error condition exists. Co~versely, if the e~tra long slot is not aligned with the Gptical detector when the fifth step counter does contain a multiple of 5, an error condition also exists. Under either of these conditions, a "fifth ste2 error" bit is written into an errQr indicator in the operation 4420. The print wheel mctor is turned off in an operation 4422 and control is returned to the main program. The main program responds to the error indications genel-ated when the STEPD routine has been calle~.
The CMP subroutir.e, which is used to cetermine the number of steps through which a print wheel must be driven rom its prev,ous setting to a new setting, is now descri~ed in more detail with reference to FIGURE 45. The first step (bl~c~ 4502~ is to read the ~SR or ~leter Settins Register digit which is the cuLrent setting or the print wheel. The NTBS of Next To Be Set digit is subtracted and the accumulator ~o carry is set or cleared to indlcate a positive or negative ~ifference. The difference must then be adjusted (block 4504) to indicate the number of actual motor energization changes.
The energization pattern for the coils of the stepping motor which drives the print wheels must be changed more than once in order to span one digit difference. For example, to provide a one digit change in the position of the print wheel might require 16 changes in the motor energiza-tion patte~-n. If the number of pattern ch2nses per digit is 16, and the difference between the previous wheel setting and the desired setting is two digits, the adjustment re-ferred to in bloc~. would be 16 x 2 or 32 sequential pattern changes. ~ppendium C may be consulted ror more details.

., . ~;~
_ 81 -~ ft~r the num~er of rc~uire~ p~tt~rn changes is calculL~ed, ~he ~c~er scttil~c~ register must ~e u~dated (block 450~) to reflect t~ new sctting of the print whcel ~fore control is returned to the main progr~m.
Fi~ure 46 i5 a flow chart for an ENABL L~ubroutine which provides an entr~ into and an exit from ~he subroutine which drives ~he printer yoke to the enabled position. The first operation of the X-~A~L subroutine (block 4~2) is a jump to the ER~R subroutine w}lich retrieves any error flags s~ored in nonvolatile memory and writes those flags into in-dex register 6. Tlle accumulator carry bit is set to 1 i~
operation 4604 before the contents of register R6 are read.
If R6 equals zero, indicating there are no error flags s~ored in nonvolatile memory, the accumulated carry bit is reset or cleared to zero in operation 4608. If R6 is not equal to zero, indicating that errox flags do exist, operation 4608 is bypassed. In either event, the next operation in the sequence ~block 4610) is to load an 8 into the accumulator, followed by a chec~ 4612 as to whether the carry bit equals zero. If it does equal zero, indicating no error flags, a j~p is made (block 4614) to an E~BLE subroutine actuall-J
employed to drive the prin~er to its enabled position.
~ Ihether or not check 4612 shows that the carry equals 7.ero, a further check 4616 is made as to wnether any 2~ errors have arisen either during the execution of the E:~LE
subroutine or otherwise. If no errors have occurred, the cor.-tents o~ the error code-containirg index register R6 are loaded into the accumulator. If errors ha~e occurred,the acc~ulator trill alreaay be set to 8 because of operatlon 4610. 'I'he accu~nulator conLents are writtcn into-an error snessage location in the data mcs,icJgc block of register zero in random access memory 3B. Control is returned to the main program after the write op~ration.
~igure 47 is a flow chart of th~ EN~LE subroutine called by the previously described EN~BL subroutine to act-ually drive the printer into its enabled position. The TPST
subroutine is called (block 9702) to deter~ine whether the descending register is less than $100 or less than the me~er setting register. Step down and enabled flags are then written into SC0 and SCl respectively of register one in ran-dom access memory 38. The third status character in that register is read to determine whether the printer is sitting in the enabled position. If it is, index register 6 is loaded with a zero and control is returned (block 4706) to the main program. If the printer is not sitting in the enabled posi-tion at the time of check 470g, another decision 4708 is made as to whether the contents of th~ descending register are greater than or equal to the meter setting register. If tne meter setting register shows the greater amount, indicating that tllere is insufficient postage to print the requested - ~mount, a zero is loaded into index register 6 in operation 4710. Then, control is returned to the main program with a hexadecimal F being loaded (block 9712) into the accumulator.
If decision block 470B indicates that the descend ing register contains sufficient postage, the STEPS subroutine is c~lled ~block 4714) to drive the printer into its enabled position. If any erxors occur during the execution of the STEPS subroutine, the ERR1 subr~utine is called (block4716 ~3 .~ .
.. .

Lt~
to ~/ri~e error codcs in~o nonvola~ ~cmor~. ~ D~SLT sub-routinc, to be ~escribed in more detail later, is called Ibloc~ 4718) to disable the printer. Control is then re-turned to the main program. If no errors are d~tected during S the el~ahlin~ step, con~rol is returned i~mediately.
The ERRl subroutine flo~charted in Figure 48 is used to write error messages into nGn~olatile memory. The SETZ error word, or NVM location 24 for the memory assignment . (shown in Figure 14) is first selected in an operation 4802.
A l is ~ritten into that location. The cumulative SET~ error word, or ~VM location 25, is selected and read into central processor. The value is increme~ed by-l in operation 480g - and the result written back into nonvolatile memory. A jump 4806 is made to the C~ S~subroutine to generate a ne~ check ~5 sum for nonvolatile memory regist~r No. 2. Control is then returned to the main program.
A ~ISAB subroutine, whicil is the calling routine for the DS~LE subroutine, is shown in flo--Y7 chart for~ in Figure 49. Nonvolatile memory error flass are first re?d into index register 6 by jumping to the ERR~ subroutine in operation 4~02. A predetermined error code or value is loaded into a specified index register, after ~Jhich a check ~.90~
is made as to wnether index register 6 is equal to ~ meaning ~here ar~ no error flags stored in nonvolatile memory, t~.e ~5 pre~eter~ined error code stored in inde~ register 2 is written (block ~9~ into the data message block of random access memory 38. But if the contents of index register 6 are not equal to 0, indicating that error flags were stored in the non~ola,ile me~lory, a jump is first mace (block 4908) to the j - 84 -, j .

DSBLE subroutine to disable the printer. After the predetermined error code has been loaded into memory, control is returned to the main prosram.
A special subroutine DESLT is called to disable the meter when problems occur during setting or reading of photocells. This subroutine is flowcharted in Figure 50. When the DSLT subroutine is called, register 0 of random access memory 38 is selected (block 5002) and a predetermined error code (hexadecimal/F) is written into SCO of that register. A
jump is then made to the STEPS subroutine (block 5004~ to step the printer away from the enabled position and control is returned to the main program.
Since meter security requires that the user be kept unaware of the R~SRS seed number stored in nonvolatile memory, it is necessary to provide restricted access to that register~
The switch 75 at one input to input buffer 76 can be connected by the manufacturer or an authorized service-man to a -15 v~lt source. When the swit.ch is set this ~ay, the non-~olatile memory registers can be read ou~ or written into usin~
a LOAD/SEND subroutine described in flow chart form in FIGURE 51.
If the LOAD (or write) subroutine is called, the accumulator carry bit is set (block 5102) to 1. If the S~ND
~or read~ suhroutine is called, the accumulator carry bit is cleared (block 510~) to 0. The input port connected to switch 7~ iS read and a decision (block 5106) is made whether the switch is at binary l; i~e., connected to the -15 volt source. If the switch is not at binary 1 when either the LOAD
or SEND subroutine ls called, an error code/F is loaded ~,`

~ t ~block 5108) into ~-ord 5 of register 0 and random access memory 38. In consequent operation 5110, zeros are loaded into the remainina ;ords of the register, after which control is returned to the main program.
If decision block 5106 shows that switch 75 was set to a binary 1 level, the data message register in random access memory 38 is read (block 5112) to determine which NVM
locations are to be accessed. An eight-count loop is set up and a decision 5114 is made as to whether the LOAD subroutine or the SEND subroutine was called. If the LO~D subroutine was called, the data characters to be loaded into the specified nonvolatile memory location are read from the data message register in operaticn 5116 and then written into the specified NVM location. The addresses between which data is being transferred and the loop count are incremented in operation 5118 and a check 5120 is made as to whether the end of the count loop has been reached. If it has not, program control returns to block 5114.
When bloc~ 5114 indicates that the SEND subroutine, rather than the LOAD subroutine was called, the specified nonvolatile memory registers are read in operation 5122 and then written into the data message register of random access memory 38. The addresses and loop counter are incremented in operation 5118 ~hether the LOAD subroutine or the SEND sub-routine was called.
When decision block 5120 shows that the end of the count loop has been reached, control branches back to the main program.

cr~ '`

'~he sys~em described ~ove was developed spccifi-cally to control a mechanical postage printer since such a print~r ~lre~dy h~s receivcd the necessar~ Governrnental approvals to permit commercial use. A considerable amount o~ h~rdware and software is r~quired to service this mechanical printer. For example, the printer setting elements 26 and the print~r settiny detector array ~0 are needed in the hardware primarily to service the mechanical printer. Similarly, subroutines such as INITS, DSBLE, SETZ, SETS, STEPS, STEPD) and others are dedica~ed almost exclusively to servicing the mechanical aspects of the printer operation. It is certainly considered to be within the scope of the present invention - to use the hardware and software to control nonmechanical printers such as ink jet printers, dot-matrix printers and other such printers.
Although the R~RS~su~routine has been referred to in a number of places throughout the specification and dra~ings, the details of the subroutine and supporting ~;ub-routines have not been included here~;ith as these are auxiliary ~o to the present invention. Moreover, the security of postal meters manufactured by the assignee of the present invention would be unnecessarily jeopardized by providing detailed flow charts and descriptions of the ~lRS subroutine In general terms, a ~ ~S subroutine permits a user to re-fund the meter himself while his account at a funding center is debited by ~he proper amount. U.S. patent3,792,446 to McFigg~s et al desc~ibe~ one such system. In accordance with that paten~t a user establishes communications with a funding center con!puter and identifies himself and the meter to be funded. After the funding cen~er verifies the identity of the user, a stored seed number is operated on in accordance with a predetermined algorithm to generate a paeudo~random number. The pseudo-random n~mber is furnished to the user,preferably via a voice answer-back unit.
When the user receives the generated pseudo-random number, he enters it into the meter, which has already operated on a stored seed number in accordance with the same algorithm employed by the funding center computer to generate what should be the same pseudo-random number. If the meter-generated number matches the number entered by the user, indicating the user has properly accessed the funding center computer, the descending register and control sum register of the meter are incremented by a fixed amount. The user's account at the fundinc~ center computer will have already been debited by the flxed amount.
The seed numbers which are stored in the meter and in the funding center computer are altered in the same manner during each funding operation to provide new, pseudo-random seed numbers for the next funding operation.
In the TNVM subroutine of FIGURE 30, ~ direct comparison was made between the stored checksum and data stored in the non-volatile memory. In the event that all data have been lost during a shut-down perlod, then this checking operation would proceed normally. In order to avoid this, in accordance with a modiEication of the invention, the complement of the checksum may be stored in rows zero and one of the NV~ register. This modification is illustrated in the subroutine of FIGURE 52, wherein the generator checksum derived from the register contents is complemented and subtracted from the complemented stored checksum in rows zero and one of the register. If the data in the register has ~een lost during the shut-down period, . this comparison Qf the complements of the checksum will reveal the error.

The routine in accordance with F~GURE 52 therefore overcomes an additional source of possible error in the system.
In order to implement the routine of FIGURE 52, ~t is, of course, necessary to complement the stored checksum. This S may be effected by the routine illustrated in FIGURE 53, which shows the necessary modification of the routine of FIGURE 34.
Thus, before writing Ra and Rb in the ~M checksum location, these values must be complemented. While FIGURES 52 and 53 illustrate this modification as being software modification, it is, of course, apparent that they may also constitute a part of the hardware of the system in accordance with the invention.
The modification of the routine illustrated in FIGURES
52 and 53 may also be indicated in the attached program printout by the insertion of CMA instructions between program steps 1512 and 1513; 151A and 151~i; 15E2 and 15E3; and 15E7 and 15E8.
This modification, in accordance with the invention, assures that logic ones and zeros are in each register, so that in the event of total loss of stored data wherein all locations would appear as either zeros or ones, the complemented checksum ~0 routine will ensure recognition of the error.
While there has been described what is considered to be a preferred embodiment of the present invention, variations and modifications therein will occur to those skilled in the art once they become acquainted with the basic ~S concepts of the invention. Therefore, it is intended that the appended claims shall be construed to include the disclosed embodiment and all such variations and modifications as fall within '.he true spirit and scope of the invention.

- 88a -., CO~N'I`,~; ON I~I~O~ M PI~IN'I`O~T

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' -142~ ~-Al~'LNl)IUM 13 lns~ruction Set ,, .
Most of the instructions e~ployed are single word ins~ructions which are expressed on a sin~Jle line of the printout. Such instructions can include a mnemonic L~BEL
which serves as an instruction address, a rnnemonic CODE whicn identifies the particular machine operation to be performed and an OPERAND which is USed in con]unction with the CODE
to define precisely the operation to be performed by the in-struction.
The OPERAND can represcnt a single four bit index register, a pair of such registers, data, a twelve bit ~em~
ory address or a condition code. Which of these is represent-ed depends entirely upon the CODE with which the OPER~ND ap-pears.
Some instructions are double word instructions.
These are the EIM, ISZ and ~CN instructions. ~hese instruc-tions o~cup~ two lines in the program printout with the CODE
and part of the OPERAND appearing on the first line. The re-mainder of the OPERAND, either data or an address depending on the ~ODE, appears on the second line.

~ 3-, .;., i~, L~13EL COD1' OP~R~ND EXI'L~TION
ADD reg. Adds register contents to accumu-lator. 'Set carry bit if necess~ry, ~DM Adds last specified data ~AM char-acter, plus carry bit, to accumu-lator. Carry bit is set if carry results but is othel~ise reset.
A~6 The contents of index register 6 are logically ANDed with the accu-mulator on a bit~by-bit basis;carry ' bit is not affected.
AN7 The contents of index register 7 are lo~ically ANDED with the accu-- ' mulator on a bit-by-bit basis.
Carry bit is not affected.
B~L data Used following JMS to resume execu-- tion at last address saved. ~our bits of data are loaded into the accumulator.
CLB Clear accumulator and reset carry bit to O.
CLC ' Reset carry bit to zero.
CMA Complement each bit of the accumu-.
: lator. Carry bit is not affected.
CMC C,omplement the accumulator carry bit.
DAA Decimal adjust of accumulator. If accumulator contents~ 9 or if carry bit = l, increment accumulator by 6.
, .

. ~ .

, . ~' .
..
~Y G ' ,~ .-Jl~lll'l, Cl~ i OP~ ND EXPL~NI~TIO~

0~ (cont:irlucd3 Set carry bit ollly if incrementing produces carry out of high order positio~.
DAC Decrement accumulator by 1. Set carry bit if ~hcre is no borrow out of high order bit positioni reset otherwise.
XXXX EQU expression XXXX is assigned the value set in the expression.
PIM ~ req. The data is loaded into the speci-data pair - fied pair of four bit registers.
FIN ~ xeg. The contents of register pair O form palr the lower 8 bits of an address in the page of memory in which this instruction is located. Data at the address is loaded into the register pa;r spe-ified in this instruction.
IAC Increment accumulator by 1. Set carry bit if there is a carry out of the high order bit; reset other-wise.
INC reg. Increment specified rcgister by 1.
Carry bit not affected.
ISZ-~ reg. Increment specified register by 1.
address If result ~ O, jump to specified address. If result =0, continue - with next instruction in sequence.
- JCN~ cond. If cond. is true, jump to address.
address ~If cond; is not true, ~o to ne~t 4 ~;

- L~LILL 01>1~ ol~L~r~l\ND XPJJ~N~TI ON
JCNI- eond. ~eon~inucd) adcl~eSs ins~rucLion in sequence.
cond. may be:
CN - earry bit ~O
C2 - earry bit =0 AN - aeeumulator ~Z - aeeumulator =0 JIN reg. The eontents of the specified reg-pair ister pair are transferred to the - pro~ram counter. The earry bit is not affeeted.
JMS address Jump to the subroutine which begins at the specified address. Instrue-tion address whieh follows JMS is saved for return.
JUN address Jump uneonditionally to the speei-fied address.
LD reg. Load register eontents into aec~u-lator;earxy ~it is not affected.
LDM data Load data into aeeumulator. Carry bit is not affeeted.
NOP No operation. Program counter in-eremented by one.
ORC address Assembly instruetion. Sets location eounter to specified address. As-sembly eontinues from that loeation.
OR4 Contents of index register 4 are - OR'd with aecumulator on a bit by bit basis. Carry bit is not affeet-ed.

~P

IA]3i~. CODE OPl~ A~rJ X}'LANA'l'ION

ons Contents of index register 5 are ORId with accumulator on a bit by bit basis. Carry bit is not af~ect-ed.
RAL Shift accumulator left throu~h carry. Carry bit qoes to LSB of accumula~or.
R~R Shift accumulator right. Carry bit goes to MSB position. LSB goes to carry position.
nDM Read data bus. Character from last RAM specified by S~C in~truction is lsaded into accumulator.
RDn n=0,1,2,3. Read into accumulator status character n of last RAM
specified by SRC instruction.
RDR Read data bus into accumulator.
Last input port specified oy SRC in-struction is accessed.
~PM Reads ~/2 byte~4 bits) of program ~emory into accumulator. Need two RPM instructions in sequence.
SBM Subtract contents of data bus from accumulator. I~ the result gener-ates no borrow, the carry bit is set;
otherwise, the carry bit is set.
SRC r~g. Accesses the RAM, ROM, input port or pair output port having the address spec-- ified in the register pair.
, .
. i `'"''J ~ f7~

1~3HJ, CODi: opEr~A~lD EXPL~N~l`ION
STC . Sct carry bit cq~al to 1.
SV~ reg. Subtract contents of specified regîster from accumulator. Set carry bit to 1 if therc is no bor-row out of high order bit position;
otherwise, reset carry bit to zero.
TCS If carry bit =0, accumulator set to 9. If carry bit -1, accumulator set to 10. Carry bit then reset in either case.
WMP Writes contents of accumulator to last output port specified by an SRC instruction.
WPM Write contents of accumulator in program RAM specified by last SRC
instruction. Need t~.~o WPM instruc-tions to transfer 1 byte.
WRM Writes accumulator contents into last DATA RAM specified by an SRC
instruction.
~Rn ` n=0,1,2.3. Contents of accumula-tor are written into status char-acter n of the last DATA RAM reg-ister specified by an SRC instruc-tion.
XCH reg. The COntQntS of the accumulator are exchancJed with the contents of the specified register. The carry bit is not affected.

8-~ PPENDI~M C
escription of Stcppin~ Motor ~ijeration The steppi~g mGtors 84 an~ 86 which select the dig-its on the print wheels and the bank to be set each have four driving coils, a maximum of t~o of which are energized at a time. In a preferred embodiment, each motor shaft rotates through a predetermined angular increment (called a half step) when the patterns of energization for the coils changes a cer~ain number of times. The patterns of energization mus$
occur in a predetermined sequence in order to establish smooth rotation in the correct direction. ,~ preferred sequence for the energization patterns is shown belo~ where a "l" indicates a coil is energized while a "O" indicates the coil is de-ener-gized;

PATTE~N COIL
NUMBER l 2 3 4 l l J. O O
2 0 l O ~O
3 0 1 l O
O ~ 1 0 7 l 0 0 .

~1 ~9--~a .

Durillg cxecution of the STl.~S subroutinc, pat~crn numbers 1,2,3 j ~, 5, 6, 1,0 are employed in sequcnce to cause stepping motor 86 to drive the main gcar 120 to the next morr~
~ignificant bank. Conversoly, pattern nurnbers 7,6,5,4~3,2,1, 0 are ernployed sequentially to dri~e the rnain gear from one bank to the next less significant bank.
During execution of the STEPD subroutine, the entire sequence of pattern numbers must be used twice to move from one digit on the print wheel to the next. Specifically, stepping from one digit to the next greater digit requires the following sequence of patterns:
1,2,3,~,5,6,7,0,1,2,3,~,5,6,7,0.
Conversely, stepping from a digit to the next lower digit requires the reverse sequence or:
7,6,5,4,3,2,1,0,7,6,5,4,3,2,1,0.

, , ,- :
~, ' -150-.. ...................... .. .

l~1:N~

~ormat of Messa~3es Scnt Lo arld Froln Control unit 12 _ M~SSAGE - SET POSTAGE
From Control Unit: Cocl0DoDlD2D3s To Control Unit C~cl0DoDlD~D3sB~lE2o--o C0 Cl: Chcc~sum (as transmi.tted or received) 0: Operation Code Do-D3: ~mount of Postage to be sent S; =l if printer disabled ~: =8 if descending regis~er less than Postage ~4 if descending register less than $100 - /C~f both Æl~: =lX for error during disabling =2X for error in stepping to high order bank =3X ~or error in setting digits to zero =4X for error in stepping toward disabled =5X for error iD enabling stepa =60 for improper ~CD values in data -70 where setting is inhibi~ed by previous error MESSAGE - READ REGISTERS
From Control Unit: CocIlso---~ o To Control Unit: C CllSD -----D7 ~----oCl Cl-eck 1: Op Code S: Specific register to be read ~0 Eor ascending register 31 for descendinq regist~r =2 or control sum ~3 for piece count . ~ , i O ~151-, M~ GE - r~E~D ~ GIs~r~ns (Continued) I ~4 for maclline status register :' ~
`i ' =5 for meter setting - ` MESSAC~: - PI~INT POSTAGE
From Control Unit: None To Control Unit; CoC14~o-D3SBO^O
CO 1 Ch cks

9: Op Code DoD3: ~mount o postage to be printed.
5: Indicates whether printer was enabled , IS=O) or disabled tS=l).
I B: Indicates descending register status.
=4 if descending register will be less than $100, -8 if descending register wil 1 be less than the setting.
= /C if both conditions.
MESSAGE - SET PRINTER TO ZERO
Fro~ Control Unit: CoC160~ 0 To Control Unit: CoC16ElE2---COC1: Checksum 6: Op Code ~-~ , El Type of error which occurs during setting, O for no error.
1 where too many steps are required to reach the most significant digit ¦ ~2 where ~oo many steps are required to reach ~ "~ .
=3 where the fifth step photocell is not seen for a stepping error in going to a lower bank =5 for a zero photocell that doesn't ~urn off upon step p~st zero =6 for a zero photocell tha~ doesnlt turn on upon step hack to zero i52-~ Z~ o ~ F,;~

Mr~SSAGE - SET P~IN'I`~I~ q~o ZERO (contin~ed~
=7 ror error during ST~D s~routine E2 : Data as~ociated with error message.

MESSAGE - LOAD NVM MEMOI~Y (RES'rl~ICTEO ACCESS ) From Control Unit: C~Cl~RoRlDo-Dj 000 To Control Unit: COCl Ro 1 o 7 C~Cl: Checksum 7: Op Code RoRl: ~ddress of NVM register into which data is to be written.
Do~D~: Data to be loaded:
MESSAOE - READ NVM MEMORY (RESTRICTED ACCESS~
From Control Unit: COCl O 1 To Control Unit: Cocl8Ro~lDo----D7 C oC 1: Checksum 8: Op Code RoRl: Address of register to be read.
~ o~D7 Data in register being read.
I~ESSAGE - ENABLE PRINTER
From Control Unit: C ~ 19~ -0 To Control Unit: Cd~19EO--__ _~o C & 1 Checksum 9: Op Code ~: Error during enabling.
=O if no error =8 if enabling inhibited -F if printer not enabled due to insufficient postage any other value for error occurring durin~

set$ing .

. ~5~ .

M1,.SSA(;~ - DI S~131,E 1~ l'rl,R
I; rom Con tro l Un i t: COCl~O= ~ -O
TQ Control Uni1:: Cocl~Eo------o COC1: C11CCkSUn3 - ~; Op Code E: Error dl~ring disabliny.
-O for no error i'o for error 21ESS~GE - ERP~OR IN MESSAGE
To Control Unit: C Cl3EO-----O
. COCl: Checlcsum 3: Op Code E: Error in Message ~s for error .

, .
1~4-MESS~GE ~ DIS~13l,E P~IIl'rER
rrom Control Unit; COCl~O~ -O
Tv Control Unit: C C ~E----~-O
COCl: ~h A: Op Code E: Error during disabling.
-O for no error ~0 for error MESSAGE - ERROR IN MESSAGE
To Control Unit: CoC13EO-----O
C Cl: Checks~n 3: Op Code E: E~rDr in Message ~ for error MESSAGE - P~EC~IARGE METER
From Contr~l Unit CoC12Do- D12 TO Control Unit Cocl2Do-D3Ex ~--00 COCl: Checksum . , 2: OP Code Do-D3 : Dollar Amount to be entered D4-D12: Remote Meter Resetting Comhination E: Error Message = /F Tncorrect Combination . - /E Non BCD Data in ~esssge = JDX Error in Disabling Meter - - JC Inhibited - jA Postage amount not accepted beca~se if would result in ove Elow of descending register .

, -154a-

Claims (9)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. In an electronic postal meter having an electronic accounting system connected to control a postage printing device, said accounting system comprising a computer having a plurality of routines for controlling the operation of said meter, and wherein said meter further comprises means for applying data and control signals to said electronic accounting system; the improvement wherein said meter comprises means for determining the occurrence of errors of first and second different types, said computer having a first routine responsive to error conditions of said first type for reinitialization of said meter to clear said errors of said first type to connect other operation of said meter, said computer further having a second routine responsive to errors of said second type for inhibiting further operation of said meter independently of any reinitialization procedures.

2. The postal meter of claim 1 wherein a low voltage supply to said postal meter consitutes an error of said second type.

3. The postal meter of claim 1 wherein said postage printing device comprises means for sending a print signal to said electronic accounting system responsive to commencement of a printing cycle, the absence of said print signal constituting an error of said second type.

a, The postal meter of claim 1 wherein said means for applying accounting data and control signals to the electronic accounting system comprises a key board, and wherein errors in messages from said board constitute errors of said first type.

5. The postal meter of claim 1 wherein errors in said first routine for reinitializing said meter constitute errors of said first type.

6. The postal meter of claim 1 further comprising sensing means for sensing the positions of mechanical elements in said meter, errors in positions sensed by said sensing means and errors in the reading of said sensing means constituting errors of said second type.

7. The postal meter of claim l wherein said electronic accounting system has a register for storing amounts of postage which said meter is authorized to print, and wherein a command to . .
print a greater amount of postage than stored in said register comprises an error of said second type.

8. The postal meter of claim 1 comprising means for sensing the driving of printing device, and wherein errors detected in said driving of said printing device constitute errors of said second type.

9. The postal meter of claim 1 further comprising means for detecting the positions of said printing device, errors detected in said positions of said printing device comprising errors of said second type.