CA1181482A - Polyphase induction generator network with power factor control - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE
This invention relates to a power grid network com-prising two or more induction generator systems, each system including a switched capacitor controlled induction generator adapted to provide power at a regulated voltage and frequency.
Each induction generator system includes an n-phase induction machine having a rotatable input shaft and at least n output lines. The input shaft is driven at a controlled frequency by a prime mover. An N-stage, switched capacitor array provides a controlled reactive current to the output lines of the induction machine. Each stage of the array includes a capacitor network associated with each of the permutations of pairs of the n output lines. The capacitor networks for each stage are characterized by substantially the same capacitance. Each stage further includes an associated switch network associated with each capacitor network for selectively coupling the capacitor network across its associated pair of output lines. A feedback network is coupled between the output lines and the capacitor array to adaptively control the switching of the various N-stages in and out of operation. In grid-connected operation, the feedback network includes a power factor detector for producing a signal representative of the power factor at the output lines of the induction machine. The feedback network uses this power factor signal to control the switched capacitor array to adaptively vary that net capacitance across the output lines of the induction generator so that the generator maintains a predetermined voltage at loads coupled to the output terminals.

Description

1 This applica-tion is a divisional applica-tion o~
Canadian patent application serial number 374,277 filed on March 31, 1981.

BACKGROVND 0~ THE INVENTION
__. __ This invention is in the field of electric power ~neration, and more particularly, relates to induction generator systems.

Virtually all electric power generators in current use are ~ynchronous machines. Such generators are typically connected together to forrn an electric power grid, In other cases synchronous generators are operated as autonomous electric power yenerators. While such synchronous mac~ines do effectively perform in the requ:ired electrical power generating applications, those machines are relatively high cost compared with other known genera~ors, such as induction machi~es adapted for o~erati~n in a power generation mo~e.

However, in sp;te of the relatively low C05t of induction rnachines, the prior art autonomous induc-tion generator ~ystems have been relatively costly due to the nècessary electronics or magnetics required to establish a regulated voltage and frequency. UnliXe a ~ynchronou~ generator, an in~uction generator operatec~
at fixed voltc~ge and fre~uency does not allow its recll current and reactive current~ to independently vary. ~t ~ixed voltage and frequency, the real current from an induction ~enerator can vary from ~ero to maximum with th~ variation o the slip frequency (i.e. diference between the electrical frequency and mechanical frequen-cy). 'rhe reactive current required at fixed voltage and frequency remains ~agginy and of significant magnitude throughout the generator power range~ becoming maximum at the maximum output power~ Consequently, an external ~ource of leading rea~tive current is req~ired to e~tablish an ou~put voltage in an autonomous induction generator. ~his reactive source must be controllable or variable if the output voltage is to be xegulated below ~aturation of the generator.
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8~2 1The principle disadvantage of the prior art autonomous induction generators has been the high cost of the power electronics and associated mag~etics which are required to perform the necessary regulation. In addition, the quality of the output waveform of prior art autonomou~ induction genera~or systems has req~ired rel~tively expensive power filters to meet desired spectral requirements.

The prior art grid-connected induction genera-10tors have been infrequently used because of low power factor and current surges during start up. Where an induction generator is to be connected to a power grid, the power grid fixes the induction generator voltage and requency and acts as a sink for real power and as a source for reactive power, During generator operation, the induction generator shaft is rotated slightly faster than synchronous speed by a mec~.~anical engine, or other prime rnover. The resulting negative slip of t~e induc-tion machine imposes a torque load on the mechanical

2~engine and causes real electrical power to be generated and delivered to the grid. In such induction genera-tors, the reactive current required to maintain the ~lux of the induction generator is suppl ed by the grid, esulting in ~ less than optimum power factor.

~ ,S. Patent No. 3,$29,75~ (Studtmann) illu~trates one ~orm of induction generator which uses a vc-ltage mode inverter ~or excitiny an induction genera-to~. A second known form i8 disclosed by Abbondanti andBrennen in "~tatic Exciters ~or Induction Generators", `IEEE IAS Transactions, Vol. L~-13, No. 5, September/October 19770 In both of the~e prior art approaches, a large fixed capaci~or is utilized across the output power lines to provide leading reactive current. According to the Studtmann patent, in this . . .. . .. .

1 form, forced commuted SCR switches reconnect the capaci-tor from phase to phase such that a nominally constant DoC~ voltage appears across the capacitor. In con~rast, the Abbondanti and Brennen papex teaches the control of the reactive current by using fixed capacitors on each phase in combination with large controllable or non-linear inductors which "bleed" or "steal ~way" ~he excessive leading reactive current which is not required by the induction machine or load. A switched inductor network is used in conjunction with a network for modu-lating the 10ngth of times which the various inductors are in the circuit. This approac~ minimi~es the number o~ switches, but the cost o~ reactances is relatively high.

In alternative prior art configurations, U.S.
Patent Nos. 3,043,1lS (Harter) 2,871,439 (Shaw) and ~,881,3-16 (Shaw) disclose a switched capacitor control for induction machinesO However, those systems do not perform voltage regulation but rather permit the induc-tion machine to saturate. There is no voltage regula-tion which was independent of ~he machine speed.

It is also known in the prior art to ~se either a binary capacitor array or an arithmetic capaci-tor array or controlling the reactive current in an inductlon generator. Binary capacitor arrays use a s~itchable seqUence oE capacitors having binary weighted ~alues (e~g. lC, 2C, 4C, BC. . ~) and arithmetic array uses switchable capacitors having ~he same values (e~g D
lC, lC, lC. . .). With either of these two systems, any inteyer value of capacitance may be attained by ~elect~
ively switching in the appropriate ones of the capaci-tor~ to reach the desired value. However, for the arithmetic array, a relatively larga number of capaci-tox~ i8 required to attain a wide ran~e of capacitance 1 values. In the binary array, a smaller number of capa-cit~rs is required, but the exponential nature of the required values or the capacitors requires relatively large capacitances to be used, contributing to system error due to the tolerance values asscciated wit~l known forms of power capacitors~

Accordingly, it is an object of this invention to provide an improved induction generating system with a controlled reactance networX.

~ Another object is to provide an improved induction generating system that is selectively adapt-able for grid-connected or autonomous operation.

Yet another object is to provide an improved induction generating ~ystem that is selectively adap-table for grid-connected operation while providing a ~ubstantially uity power factor under unbalanced line-to-line or line~to-neutral loads.

Still another object is to provide a power network including two or more parallel connected induc-tion generators.

Another object i5 to provide an improv~d power ~actor correction ~ystem with a controlled reactance n~twork.

$UMMAR~ OF THE INVFNTION
Brie1y, the present invention is an electri-cal power generation eystem comprising an induction machine. In one form of the invention, the induction machine is configured in a genexator mode and may be ~electively adapted for autonomous operation with controlled reactive excitation provided by an electron-.

1 ically switchea capacitor array, or for grid-connected operation with power fac~or correc~ion using ~he same switched capacitor array. In the autonomous mode, ~he ~ystem delivers real and reactive power at a regula~ed voltage and frequency to variable loads, or in the grid-connected mode, delivers real and reactive power to the power grid with a unity power factor at the nominal voltage and frequency of the grid.

The induction generator ~yste~ in accordance with the present invention includes an n-phase induction machine having a rotatable input shaft and at least n output lines, where n is an integer, e.g. as one or three~ In various configurations, the machine may have n differently phased output lines and, in addition, a neutral output line. The input shaft iæ driven at a controlled ~requency by a prime mover~ In practice, t'he prirne mover may be, for example, an internal combustion engine in a torque loop, so that the output torque from the engine ~as applied to the input ~haft of the induc-tion machine) is controlled in response to the detected electrical frequency of the machine.

An N~stage, switched capacitor array provides a controlled reactive current to the output lines o~ the ~nduction'~achine. Each fitage of the array includes a capacitor network associated with each o~ the per-m~t~ations of pairs of the n output lines~ The capacitor n~twor~s for each stage are characteri~ed by substan-tially the same capacitance. Eac'h stage further inclu-des an associated switch network associated with eac'h capacitor network for 6electively coupling the capacitor network across its associated pair of outpu lines.

A feedback network is coupled betwe~n ~le out-put lines and the capacitor array to adaptively control .

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1 the switching of the various N-stages in and ~ut of operation.

In embodiments of the invention adapted for grid-connected operation, the feedback ~etwo~k includes a power fae~or detector for producing a signal represen-tative of the power factor at the output lines of the induction machine. The feedback network uses this power factor si.gnal to control the switched capacitor array to adaptively vary that net capacitance across the outp~t lines of the induct.ion generator BO that the generator presents a unity power factor to the grid, in spite of unbalanced line--to-line or line-to-neutral local l~ads coupled to the generator. In one form, the power factor detector generates a power factor signa]. which corresponds to detected reactive power, and the feedback network is adapted to minimize the reac,ive power so that the power factor optimized at or near unity. In other forms of the invention, sensed current and voltage signals may be combined to form a power factor signal, ~0 which may be optimized to unity. For the purposes of the invention, all of these forms are considered to pro-vide signals repre6entative of the power factor at t~le output lines. In all of these configurations, the power factor detector may be connected in an "open loop" con-~igllration (which minimizes reactive current drawn by lc~cal loads coupled to the induction generator), or in a "closed loop" con~iguration (which minimizes reactive current ~r~wn by the grid).

In embodiments of the invention adapted for autonomous operation, the feedback network is adapted to contr~l ~or regulate) both ~he voltage and frequency at the o~tput lines of the anduc~ion machine. In this case, the feedback network includes a detector w~ich produces one or more signal~ repre~entativP of the ( 8'~

1 amplitude of the voltage at the output lines of the induction machine. This feedback network uses the amplitude signals to control the switched capacitor array to ~daptively vary net capacitance across the out-put lines of the induction yenerator. With this con-figuration, if more capacitance is a~ded than is required to balance the la~ging reactive power of the autonomous generator and its loads, the generator voltage increases in a ramp fashion. Voltage similarly decreases if less than the required capacitance is switched across the output lines. In steady state operation at the desired operating voltage, the average capacitance added provides leading reactive power to exactly balance the net lagging reactive power of the autonomous system.

In the autonomous mode, frequency is regulated b~ a feedback loop which compares the output electrical frequency to a reference and uses the xesultant error signal to adjust the prime mover (e~g. the throttle of a mechanical engine).

Generally, in the autonomous mode, khe feed-back network compares the voltage on the output lines of the induction machine ac3ainst a reference and the samples and holds the resultant error signal.
Therea~ter, a capacitance proportional to the error is ~witched across -the output lines during the next cycle.
~or three-phase systems, improved bandwidth and voltage regulation can be achieved by adding the required capa-citance once each cycle per phase, resulting in an effective rate of three times per cycle.

In an N-~tage switched capacitor array, where at least X of the stages have binary weighted capaci-tance values from ~tage to ~tage, at least 2x different 1 values of capacitance are available for switching across the output lines per phase. Where X of the stages have binary weighted capacitances and the remainin~ N-X
stages have identical capacitances corresponding to the maximum binary value, the number of different capaci-tance valeus which rnay be switched across the output lines per phase is (N-(X-1)2X-l ~ 2X-1 -13. With such configurations, each cycle or two, the amoun~ of capaci-tance across the output lines may be dithered between adjacent values with the appropriate duty cycle, such that on the average, the exact amount of capacitAnce required is on line. Step size of the reactive current quantization is proportional to the smallest capacitor ln the array. The small cycle-to-cycle variation in the capacitor array reactive current caused by the finite number of capacitance steps does not 6ignificantly a~fect the output line voltage since the air gap flux, and thus, the voltage, ~f the in~uction machine responds relatively slowly to variations in reactive current ~0 excitation. The time constant o~ the voltage response to a reactive current step is approximately equal to the rotor time constant, which typically is~ hundreds of milliseconds, or tens o cycles. Thus, the induction machine inherently filters out most of the ef~ect o~
small dithering excita~ion current steps caused by the lnite capac:itor quantization.

In one form of the invention, X of the N-stages of the capacitor array are characteri~ed by binary weighted capacitance values from stage to s~age (e.g. lC, 2C, 4C, ~C,. . ,, where C is a reference capa-citance value), and the capacitors of N-X of the N-stages are characteri~ed by zubstantially equal capacitance values ~rom stage to stage (e.g. lC', lC', lC';. ~ ., where C' i~ a reference capacitance value and typicaily C'=2XC~ Wi~h this hybrid binary/arithmetic -1 weighted capacitor configuration, relatively fine grada-tions of capacitance may be adaptively switched in and out of the network (using the binary weighted portion of the array), while the arithmetic portion of the array contributes relatively large units, when necessary.
Thus, the present invention combines the best of the attributes of the binary and arithmetic array con-figurations in that relatively small quantization errors may be achieve~, while no capacitances are required to be so large that tolerance values are a problem.
Moreover, a modular expandable system may be provided by just adding another large value capacitor 6tage, rather than having to re-scale the entire capacitor array as in a straight binary weighted array systemO

In another form of the invention, the feedback network includes both a power factor detector and an amplitude detector for the volta~es on the output lines of the induction machineO In this form, the feedback network includes a two state controller, ~r switch, whi~h is switchable to select between these two detec-tors, in conjunction with a switch which 6electively couples the output lines of the induction machine either in or out of an external power grid. When the feedback network is in one state, the induction generator sy6tem is coupled to the external power grid, while providing unit~ power actor at the output lines. In the second 6tate, the generator system is connected for autonomous ope~ation with control of frequency and voltage at the output lines.

` In another ~orm of the invention, two or more induction generator 6ystems may be coupled in p~rallel, where tha feedback network for ~he total system includes a voltage detector coupled between the ~utput lines and the capacitor array so that ~he ~ystem adaptively 1 controls the values of the capacitors swi~ched across the output lines of the combined system.

It is know~ that an att2mpt ~o flux energize an unexcited induction generator from an existing voltage line tends to instantaneously collapse the voltage of that line (e.g. to one half the nominal value where the added generator is identical to the already running generator), causing "blink" or "flicker". In the various forms of the invention adapted for parallel interconnection of induction generators, ei~her in a grid or autonomously, at least one of the induction geTlerators may include a power thermistor network coupled in at least one of its output lines. The ther-mistor networX includes a thermistor device which may be selectively switched in and out of that output line. In opera~ion, the thermistor network acts as a buffer between tlle output line of the generator to be magneti-cally excited and the corresponding output line of the excited generator. When a non-excited, but mechanically ~pinning (near synchronous speed) induction generator is to be coupled in parallel to an already operating induc-tion generator, with the thermistor network coupled in one of the output lines, the thermistor initially provides a relatively high resistance in the output line ~reventing overload of the system. ~is initial current to the unexcited but spinning generator cau6es the b~lild-up of ~lux ~voltag~) across that machine~ The curr~nt i~ maintained ~ubs~antially constant ~by sizing the t~ermistor so that it decreases in resistance as it 3n ~elf heats at a rate tracking ~he voltage build-up)3 Consequently, the time constant associat~d with the voltage build up would be approximately equal to the rotor time constant. In the preferred form of the invention, the current ls approximately equal to ~he ~teady state magnetizing current which, for ~ingle phase 1~8~ 8~

1 excitation of a three phase machine, is approximately three times the "n~ load" magnetization current drawn by a machine driven from a balanced source. When the ini-tially unexcited induction generator is fully excited, the voltage drop across the then relatively high tem~
perature thermistor is negligible and that device is then switched out of the line by a switch that b~passes the thermistor. With this configuration, magnetic energy is built up in the initially non-excited genera-tor in a controlled manner so that the generator is brought on line without a significant current fiurge (i.e. in a "blinX" free manner). In alternate embodi-ments, separate thermis~ors are used for each phase, requiring one nth the current necessary for exciting the ~enerator.

In yet another form of the invention, the feedback network may include a voltage profiling network for controlling the output voltage at times of relative high loading. For example, when an AC electric motor ~0 load is started on line, it creates a substantial real load on the prime mover, causing a reduction in the fre-quency of rotation of the input 6haft of the induction generator ~particularly if the prime mover is torque limited). l~e voltage profiling ne~work detects when such ~requ~ncy changes occur, and provides an offsetting ~ignal to cause the induction machine to provide a rela-tivQly low output line vQltage (e~g. .707 times the nominal voltage) for a range of frequencies just below the nominal ope~ating frequency. As a result, at times of high load, the output line voltage is reduced, pro-viding less load to the prime mover. As a consequence, the ~rime mover may continue to operate at its hi~h power level close to the nominal system frequency. The electrical frequency in the feedback loop of the ~witchea capacitors remains relatively high 60 that ~he 1 capacitor array can provide the required reactive current (which is also high in a transient range) with a minimwn of capacitors~ A second ~enefit of this con-figuration is that the prime mover can operate at a higher ~peed than would otherwise ~e possible and 50 provide higher power into -the in~uction machine.

In yet another form of the invention, addi-tional leadin~ reactive current can be provided during times of relative high reactive ~oaaing (for example, line starting an induction motor) by insertion into part of the capacitor array, A.C. electrolytic capacitors.
Normally most of the capacitors in the array are desiyned for continuous A.C. operation. However, an economical ~pproach to providing addi~ional reactive current for use during intermittent overloads is to include in the array A.C. electrolytic capacitors (sometimes called "motor start capacitors") which are designed for intermittent duty.

In all of the above embodiments, the feedback network may include a switch control for the vario~ls capacitor stages of the capacitor array. This switch control network monitors the line-to-line voltages o~
th~se ]ines. Such vol~ages may include transients (such as produced by rectifier loads) which cross zero. In one ~orm of the invention, the switch control network incorporates a first zero crossiny detector coupled to the output lines. This first zero crossing detector is coupled in turn to an integrator which in turn is coupled to a second zero crossing detector. The output from the second zero crossing detector provides a switch control ~ignal w~ich is optimally adapted to switch the capacitors in the array at such times when the capaci-tors are fully charged to the line voltage, thereby eli-minating one source of transient error6 on the line.
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- 12a -I To this end, in one of its aspects/ the invention provides a power yrid network comprising two or more induction generator systems, each induction generator system comprising:

A. an n-phase induction machine having an input shaft and at least n output lines, where n is an integer, wherein each output line is coupled to an associated output terminal, B. means for generating a frequency control signal representative of the difference be-tween the fre~uency of the voltage of at least 1~ one of said output terminals and a reference value, C. torque generating means responsive to sai.d frequency control signal for applying a torque to said input shaft, said applied torque being related to said frequency control signal, D. an N-s-tage switched capacitor array, where N
is an integer, each stage including n capaci-tor networks, each network being associated with a pair o:E said output lines, wherein the capacitor networks within each stage are each characterized by a predeterm:inecl capacita.nce or that stage, and wherein each of said capa-citor networks includes an associated capaci-tor switch means, each switch means being responsive to a trigger signal for selectively coupling said capacitor network across its associated pair of output lines, E. feedback means coupled to said output lines and including trigger means for generating said trigger signals, . .. . ~ .

- 12 b -1 wherein the output terminals of said induction generator systen~s are coupled to each other, and wherein said feedback means for each system includes a voltage detection means Eor generati.ng an amplitude signal represen-tative o:E the difference between the amplitude of the voltage of said output terminals and a reference value, and for coupli.ng said amplitude signal to said trigger means, whereby said induction machine maintains a predetermined voltage to loads coupled to said output terminals.

1 _RIEF DESCRIPTION OF THE DRAWINGS
The foregoing and o~her objects of t~is inven-tio~, the various features thereof, as well ~s the invention itself, may be more fully understood from the following description, when read together with the accompanying drawings in which:

Fig~ 1 shows in block diagram forrn, an induc-tion generator system in accordance with the present invention ~ Fig. 2 shows in schematic form, an embodiment of the switched capacitor array of the system of ~ig. l;

Fig. 3 shows in schematic form, a capacitor network and associated switch network of the array of Fig. 2;

Fig. 4 shows exemplary waveforms illustrating the operation of the array of Fig. 2;

Fig. 5 shows in block diagram form, the feed-back sensor of the system of Fig. l;

Fig. 6 shows in block di~gram form, the ~0 trigger signal generator oE the ~ystem of Fig. l;

Fig. 7 shows in block diagram form, the filter and zero cross detector of the trigger signal generator o~ Fig. ~:

Fig. 8 ~hows in block diagram form the fre-q~ency controller of ~he system of Fig. l;

~ ig~ 9 shows in ~loek diagram form, an exemplary voltage profiling n~twork for ~ wi~h the system of Fig. 1;

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Fig. 10 shows in bloc~ dia~ra~ form, an exemplary thermistor network or use wi~h the system of ~ig. 1:

Fig. 11 shows an overload capacitance array network for the system of Fiq. l;

Fig. 12 shows in schematic form, a branch net-work for the network of Fig. 11; and Figs. 13-18 show embodiments of the system of Fig~ 1 adapated for correction of power factor ~or un-balanced lo~ds.

F.ig. 18 appears on the same page as ~igur~s 13 and 14.
., DESCRIPTION OF THE PREFERRED EMBODIMENT
Fig. 1 shows an induction generator system 10 which i~cludes a three phase induction machine 12 having three output lines coupled to an associated set of three output terminals ~indicated collectively by reference designation 14). In alternate embodiments, a fourth (or neutral) line may be provided in addition to the three output lin~s 14. In tha pre~ent embodiment, t~e output terminals 14 rnay be selectively controlled by a switch 16 so that the kerminals 14 may be coupled to an ex-ternal power grid or supplying and receiving real ~ncl xeactive power from such a grid, or alternatively may be de-coupled rom that grid for autonomous opera~ion. A
local load is indicated by`block 18 coupled to the out~
put lines of the induc~ion machine 12. In other forms of the invention, different phase induction machines (e~g~ ~ingle phase) may be similarly configured.

~ controlled-torque prime mover, or driver, 20 is adapted to drive the input sha~t of induction machine 12 at a frequency.relate~ to a frequency control ~ignal ~pplied by way of a line ~2. In the present embodiment, .~ . .

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4&~i~

1 the prime mover 20 is an internal combustion engine 2~.
The speed of the engine 24 is controlled by a throttle 21 driven by the signal on line 22. Throttle 21 controls the fuel flow from a fuel supply 26, In alter-native embodiments, the prime mover may be a windmill, for example, with its output torque (speed) controlle~
by varying the pitch of the blades, In yet other forms, the prim~ mover may be a d.c. motor with its output speed controlled by a conventional motor speed c~ntrol signal.

The frequency control signal on line 22 is provided by a frequency controller 28 which is coupled back to the output lines from machine 120 A switched capac tor array 30 is adapted to provide a controlled reac~ive current to the various output lines of the induction machine 1~. Array 30 includes N stages, each including a capacitor network associated with the various permutations of the pairs of the output lines of machine 12, In the present embodi-ment where machine 12 is three phase, each stage of array 30 includes three identical capacitor networks, Each capacitor network includes one or more capacitors providing a characteristic capacitance value ~or that stac~e and has an associateA switch networkO l'he capaci-tance values within each stage are characterizecl by ~ubstant.iall~ the same net capacitance, The swi.~ch net-work is responsive to an applied trigger signal for 6electively coupling the capacitor networks o~ that stage across the as~ociated pair of output lines of machine 12.

qhus, in ~h2 prPferred embodiment, the switched capacitor array ~0 includes N ~tages, where each stage i5 in the "delta" configuration mode ~i~e~

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1 each stage includes a capacitor selectively coupled be-tween an associa*ed pair of output lines of machine 12)D ' In an alternate, but equivalent configuration~ the array 30 may include N stages, where each stage is in the "wye" configuration (i.e. each stage include~ a capaci-tor selectively coupled between an associated output line of machine 12 and a common potential on a neutral line. The illustrated delta configurati~n generally -permits the use o capacitors with higher voltage ratings, and less capacitance ~and correspondingly less expenqe), than its dual wye confiyuration.

In the present three-p~ase embodiment, there are 3N triyger signals (on 3N trigger signal lines 34a) applied to the N-stage array 30 for selectively switching the various capacitors in and out of opera-tion. The trigger signals are provided by trigger signal generator 34, which in turn is driven by a feed-back sensor 36~ In the presently described embodiment, the feedback sensor 35 is coupled to the output lines from ;nduction machine 12 by way of three voltage sense lines 35a providing signals representa~ive of the voltage on those output lines, and by way of three current sense lines 35b providing signals representative o the current through those output lines. Thus, the system 10 is "closed loop". In alternate forms, the system 10 may be "open loop" and current sense lines 35b may sense current in line6 18a passing to the local load 1~. In the configuration o Fig. 1, when the switch 16 couples terminal 14 to an external power gridt the 6ensor 36 functions in a first sta~e to determine the reactive current at terminals 14. When switch 16 de-co-lples system 10 from ~he external grid, i.e. for autonomous operation, ~ensor 36 unction in a second state to determine the amplitude of the voltage on the output lines from machine 12.

1 Fig. 2 shows the first and Nt~ ~tages of the capacitor array 30, and the manner in which ~hose s~ages are coupled to the output lines from induction machine 12. In Fig. 2 the three output lines from ~achine 12 are denoted A B and C. The first and Nth stages o~
array 30 are shown schematically to include a capacitor (denoted C ~ith subscripts) and a switch (denoted S with subscripts) coupled between the various pairs of output lines A B and C. The subscripts for the respective capacitors and switches in Fig. 2 are indicative of the two output lines associated with those elements. In the pr~sent embodiment, the first X of the stages of array 30 include capacitors which have binary weighted branch capacitances from ~tage to stage. The remaining N-X
stages have equal value capacitances in the various branches from stage to stage, as indicated in the following Table. Fig. 2 ~hows 3N trigger signals each being associated with one of the switch networks in the stages.

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BINARY WElGHT ARITHMETIc WEIG~T
CAB(l) -1 cAB(x+~
CBC(l) ~ C CBC~X+l) 2xc CCA(l) J CCA(X+l) CAB(2) CBC(2) 3 2C
CCA(2) CAB(N) :L0 ' CBC~N~ ~ 2 C
. CCA(N) J

CAB(X) CBC(X) J 2~-1C
~CA(X) In one form of the invention, shown in Figs. 1 and 2, the capacitors in arxay 30 are in the "delta"
configuration, where the 3N trigger signals for network array 30 permit independent control ~f the switching of each delta capacitor in the various stages. In that embodiment, a combination binary-linear weighted capaci-tor array is utili~ed which switches ~tages in or out at one time per cycle at only the posltive peaks of t~e line volta~e. In general, switching off-line of the capacitors of the various stages can occur at either positive or negative ~zero current) voltage peaXs, iOe~
within 180 degrees of a desired time with correspondillg turn-on ~a~ K x 360 degree6) from this turn-off point.

- Fig. 3 shows an exemplary form for the irst stage line-to-line capacitor and associated ~witch net--work for the array 30 between lines A and B on ~he induction machine 12. In this form, the output lines .

,.. , . . .. . . . - - - -~19-1 and B each provide ~igh current buses fc~ the ou~put current of the various stages. The buses are indicated in Fig. 3 by reference designations 40 and ~2. It will be understood that the buses are particularly adapted to provide highly efficient convective heat transfer so that these buses act ~s heat sinks for the respective components coupled thereto.

The capacitor network is coupled between the bus elements 42 and 40 by semiconductor swi~ches SCR 46 and TRIAC 48, respectively. The capacitor network includes a capacitor (denoted C) in series with an air-core inductor (denoted L). The current through that 6eries capacitor-inductor combination is denoted by IAB.
In the present embodiment, the capacitors are A.C. capa-cito,r~ type 520P or metallized polypropylene A.C. capa-citors type 325P, manufactured by Sprayue~

The capacitor is coupled to the cathode of SCR
46 and the anode of an anti-parallel diode Dl. In the present embodiment, SCR 46 has a T0-220AB package having ~0 its anocle connected in direct thermal and electrical contact with bus elmeent 42. The diode Dl ;s a stud mounted diode coupled having its cat'hode in direct ther-mal and electrical contact with bus element 4~ The trigger sign~l from generator 34 (as defined more fully below) is applied by way of line 34a across the gat.e c~thode terminals of SCR 46. In Fig. 3, the trigger siynal line for the illustrated switch networX includes our wires ~denoted collectively 34a)0 The wire 35a running ~o the gate of SCR 46 has an associated return 30 wire 35b running.from the cathode of SC~ 46 back to generator 34.

~he inductor L is connected dir~ctly to ~he MTl terminal of TRIAC 48. In the present embodiment, .

. . , . . ,,,, ., . ,, . .. .... . . ,, ,, .. ... , . , . , , , , , , , , _ _ _ _ -1 TRIAC 48 has a TO-220AB packase having its MT2 terminal connected in direct therm~l and electrical contast wi~h the bus element 40. A signal diode 50 has its cathode connected to the gate of TRIAC 48. The an~de of diode 50 is connected to the bus 40. The trigger signal from generator 34 for TRIAC 48 is applied by way of line 34a across the gate-MT2 terminals of TRIAC 48. As with SCR
46, a first wire 35c provides the trigger signal ~o the gate terminal of TRIAC 48, with a return wire 35d running back to generator 34.

With this configuration, the various capacitor net~orks may be selectively switchecl three times per machine cycle in a manner so that the "off" or discon-nected capacitors remain charged to the peak line-to-line voltage. Current surges are avoiaed in normal operation by triggering the semiconductor switches (SCR
~6 and TRIAC 48) of each phase at the peak line-to-line voltage which occurs at the mid-point between the line-to-line voltage zero crossings. Consequently, there is nominally zero voltage across the semi-conductor 6witches, and no current surge when those switches are triggered on.

Fig, ~ indicates the representative waveforms of operation for the configuration of Fig, 3 for a ~ingle trigger ~ignal on line 34a. As shown, the nomi-nal capacitor currQnt ramps from ~ero and has a sinu-~oicdal shape. rrhe inductor L is an air-core induc~or coupled in ~eries with t.he capacitor to accommodate slight timing erroxs or error~ due to waveform distor-tionsO The inductor limit6 the rate of change of current with time. The inductors further serve to pro-tect the switches during line faults by keeping the peak current within the switch surge current ra~ingr .

, .. . ~ . _ .. _ ..... . . . . . . . .. .. . . . . . . ... . . .. . . . .

- ~ ( 1 In operation, the capacitors are switched off the line by removing the trigger signals. The switches have self (uncontrolled) gating in one polarity, ~o that on the following half cycle, the switches naturally com-mutate off at a current zero crossing. I~e switched-off capacitor is left holding a charge proportional to the line-to-line peak voltage. The self gating of the switches in one polarity insures that the "off" capaci-tors remain fully charged.

Since a capacitor held off the line is charged to the peak sy~tem voltage, double the system line-to-line voltage i5 seen by the 6emiconduc~0r ~witch or switches in ~eries wiLh it. For example, the switches must tolerate 1250 volts in a 440 volt, 60 Hertz system, or 1080 volts in a 380 vol~ 50 Hertz system.
Accordingly, the embodiment of Fig. 3 is particularly ~dvantageous since two relatively low voltage (and low cost) moderate current switches may be used in series with each capacitor section.

The capacitor current is nomin~lly a ~ine wave, but because the capacitor current is proportional -to the derivative of voltage, in practice this ~ignal can depart significan~ly from ~he ~ine wave. For this rea~on, the trigger signals are provided (as described more fully below) are relatively wide. In the preferred form, the trigger command is provided whenever a switch is desired to be on.

The particular configuration o~ Fig. 3 providès a relatively compact arrangement wherein the TRIAC, SCR and anti-parallel diode all may ~e connected ~o the bus element~ forming the output line~, which in turn function a~ electrically hot heat ~ink~, thereby avoiding the need for individual electrical isolation ~f the power semi~conductor~D

.. . ., . , . .. . . . . , . . . . . . . ~ . . .

1 Fig. 5 shows the fe~dback sensor 36 for the present embodimen~ Sensor 36 includes a po~er ~actor detector network 60 coupled to the voltage sense lines 35a and the current sense lines 35b from the o~tput lines of machine 12. Detector 60 provides output signals on lines 66 which are representative of the reactive power at terminals 14, which in turn are relate~ to the p~wer factors at terminasl 14. In alter-nate embodiments, detector 60 may provide ~ignals directly representa~ive of the power factor~ at ter-minals 14.

Sensor 36 also include~ a rectifier network 68 coupled to the voltage sense lines 35a. Rectiier 68 provides signals on lines 70 representative of the amplitudes of the voltages at the ~erminals 14~ A surn-mation network 72 provides signals on lines 7~ represen-tative Of the di fference in amplitude of the voltages at terminals 14 and a reference signal. A switch 76 is arranged to be selsctively operated in a manner coupling the signals from lines 66 or lines 74 to output ]ines 78 of the ~ensor 36. The ~witch 76 may be operated in con-junction with the switch 16, so tha~ during grid-connected operation, the signals from power factor detector 60 are coupled to lines 78 when switch 16 i 6 in its closed position (coupling the system 10 to the power grid). When the SWitc-l 16 is in its open position, i.e.
for autonomous operation, the switch 76 couples the signals from lines 74 to lines 78.

Fig. 6 ~hows the trigger signal generator 34 in detailed form. Generator 34 includes an error amplifier 82 coupled to ~ignal lines 78 and to timing signal line~ 91. In ~ome embodimen~s, amplifier 82 may include an input multiplexer and an output demultiplexer~ The output ~rom amplifier 82 may have 1 its signal time modulated such that sampling in the following latch 86 provides somewhat different capacitor corrections to the individual phases of ~he system. In this form, balanced voltages can be maintained in the presence of unbalanced loads.

In the present embodiment, the output from amplifier 82 is coupled to a binary A-to-D convertor 84, which in turn is coupled to latch 86. A ~ilter and zero cross network 90 is coupled to terminals 14 to provide a sampling 9i gnal to the latch 86 at the system operatiny frec~uency. l`he sampled signal from latch 86 is applied to a triy~er networX 92. The filter and zero cross net-work ~0 also provides appropriate timing signals to generate t~e signals for switching the ~tages of array 30 in and out of operation. Switching "in" occurs at such times when the fully charges capacitors in array 30 are co~3pled to the peak voltages at the lines o~ machine 12. Switching "out" occurs prior to a peak voltage with actual turn off at naturally occurring æero capaci~or current (which is normally at the voltage peak).

The trigger networX 92 is responsive to the sampled values in latch 86 to select and activate the appropriate ones of the 3N trigger signal lines for the appropriate stages to adaptively modify the value of the capacitances coupled across the outpu~ lines oE machine 12. In various forms of the invention, the trigger net-work 92 may include a prograrnmed microprocessor, or some otller sultable orm of computational network.

With the control of individual branches of the various stages of array 30, both line-to-line and line~
to-neutral unbalanced loads may be accommodated, pro-vided that the net loads (before correction) are ind~ctive (since only capacitor~ are used for control).

.

-2~
1 In the preferred for~ o~ the invention, the filter and zero cross de~ector network 90 has the form shown in Fig. 7 wherein a first zero crossing detector network 94 is coupled to an integrator 96, which in turn is coupled to a second zero cross detector network 98.
This form of filter and zero crossing detector 90 is particularly advantageous where the line-to-line voltage at terminals 14 includes transients (such as due to rec-tifier loads) which may cross zero. In this con-figuration, the network ~4 provides a binary signal which has a state change for each zero crossing of the input. The integrator 96 integrates this resultan-~
signal to provide a nominally triangle~waveform which has zero crossing points nominally at the desired switching times. The second zero cross detector 98 pro-vides a trigger timing signal for controlling the switching of the stages for the various line-to-line pairs.

Fig. 8 shows the frequency controller for the preferred embodiment. In this embodiment, the controller 28 includes a filter and zero crossing detec-tor network 100 coupled to terminals 14. The output of network 100 is coupled to a ~umming network 102 which in turn is coupled to an error ~nplifier 104 for driviny line 22. In practice, the networX 100 may be the æame as corresponding network 90 in generator 34. In such cases, the output fxom generator 90 may be used directly in controller 28 in place of that provided by network 100. ~he summing network 102 provides a Ereq~ency error si~nal representative o the di~erence in frequency of the voltage at terminals 14 and a reEerence re~uency.
This frequency error ~ignal is applied by way 3f error ampliier 104 and line 22 to the variable speed prime mover.

-~5-1 In one form of the invention, the output from the 6umming network 102 may be coupled by way of a voltage profile network to an input of the summing net-worX 72 of the feedback sensor 36. With this con-figuration, the voltage profile network 106 modi~ies the commanded system voltage on line 78 as a function oE the system frequency error. In normal operation, the system 10 frequency error is small, and there is no significant output from the voltage profile network 106. However, in momentary overload situations, e.g. when the system 10 is called upon to start relatively large motor loads, the resultant slow down at the prime mover 20 can be dir~ctly sensed by detecting the reduced frequency on output lines of machine 12. NetworX 106 detects times when the requency at terminals 14 falls below a prede-termined threshold, and or a range of frequencies below that threshold, provides an appropriate signal to net-~orX 72 to establish a relatively low output voltage from machine 12, for example, by reducing the voltage to .707 of the nominal voltage when a few percent slow-down is detected. As a consequence of this operation, the ~ffective load seen by the prime mover 20 is substan-~ially reduced and that element may continue to operate near the normal system frequency where it can provide more power and thus maintain the highest possible output voltaye. This feature is particularly advantageous ln preventing inadvertent cut outs when relays are used in th~e system. This con~iguration may be utili~ed in the situation where a single induction generat.or system 10 is operating, or where a ~lurality of such induction generator systems are coupled in parallel at terminals 1~ .

It is well ~no~n ~hat during induction genera-tor start-up, an initial remnant flux must either exist in the machine or be placed in the machine 12~ In khe ,, . . , , . , . , ... , . . , . , . ,, , ., .. . ~, .. . . . .. .. .. . . . . .. . ... . .. . . .

( 1 prior art, this remnant flux may be placed in the machine at ~ero mechanical speed with a D.C. bias current in one winding of the generator, or alter-natively a suficient remnant flux naturally exists in the machine from the last time it was operated. For a sinyle autonomous induction generator system, the switched capacitor array may be used to creat~ voltage build-up in the generator automatically when the machine speed reaches some minimum value. The load is normally disconnected during such flux initialization, and until proper output voltage and frequency are established.
However, when a spinning but unexcited induction machine is connected to an external grid, or another induction generator, a very large current transient occurs until the ~lux builds up in this machine~ For example, ~uch a transient might well cause an instantaneous voltage drop on the order of 50% if two identical machines are paralleled in this manner. If the machine to be added to the grid is initially excited by using a separate capacitor bank, the transient would very likely be even worse unless the frequencies are phase locked using con-ventional synchronous machine line connection tech-niques.

In accordance with the present invention, a thermistor network, as shown in Fig. 10, may be used to bxing an unexcited, but near synchronously turning induction machine on-line wi~h a minimal transient. The network of Fig. 10 includes a two terminal ~108a and lO~b) network having a three phase switch 110 coupled between those terminals 108a and 108b, and a series con-nected single phase switch 112 and thermistor 11 coupled in parallel with one phase of the switch 110 The thermistor 114 has a temperature dependent - resistance characteri~tic, providing a relatively high r~sistance at low temperature~ and a relatiYely low 1 resistance at high temperatures~ An associated controller 116 controls the operation of the switches 110 and 112. The network 108 is coupled between one of the terminals 14 of la~ ~perating or grid-connected induction machine and the corresponding output terminals of the induction m~chine to be brought on line. By way of example, to bring system 10 of Fig. 1 on line to the external grid, network 108 mayb be coupled into one of the output lines between terminals 14 and switch 16. In other multiple systems, a single network 108 may be used repetitively (after cooling down) to sequentially bring the multiple systems on line. In alternative systems, scparate thermistor branches similar to the branch including 6witch 112 and thermistor 114 may be similarly coupled in each of the output lines from the induction machineO

In operation, witli the ~ystem 10 including network 108 which is to be coupled to an external grid (e.g. by switch 16) or another induction generator~ the switches 11~ and 11~ are initially ~on~rolled by controller 116 to be in their open positions. ~hen, the un~xcited induction machine 12 is brought up to a speed close to the desir~d line frequency. Frequency or phase locking is not required. The switch 112 is then closed by controller 116, bringing the thermistor 114 into one of the output lines which connects the two generators in parallel. With this configuration, the power dissipated in the thermistor 114 causes its temperature to increase, thereby lowering its resistatlce. By appropriate thermistor device selection, it will be under6tood that the thermistor ~or plurality of series connected thermistors) is ~elected so that its resistance-temperature characteristic is matched to t~e rate of voltage build-up. Consequently, ~he current in the thermistor increases and it6 resistance decreases 1 until the temperature and resistance reach such values so that the current through there is essentially equiva-lent to the steady state final value which is required for the no-load magnetizing current. At this point, controller 116 opens switch 112 while closing the three phase switch 110. The system 10 is then fully on-line without a transient. In practice, controller 116 changes the state of switches 110 and 112 by detecting when the thermistor voltage falls below a predetermined threshold, or alternatively may just provide a predeter-mined time delay. The same thermistor 114 may be used after cooling to provide nearly transient free excita-tion for additional ~ystems as they are brouyht on-line.

The prior art induction generator systems have a relativ~ly limited ability to start A.C. motor loads.
Typically, w~en an A.C. motor load is star~ed, that load requires much more reactive current than during normal (steady state) run operation. If insufficient capaci-tance is available in the induction generator capacitive array 30, the voltage provided by system 10 rapidly collapses toward zero when a relatively large A.C. motor is switched onto the output line 14. Motor starting ability o~ the system is enhanced by switching in an overload capacitance array network across the output terminal 14 during overload conditions, sucll as durin~
start-up of a large A.C. motor.

Fig~ 11 shows an exemplary overload capaci~
tance array network 118, including three similar branch networks 120, 12~ and 124, for connection in a "wye"
3Q configuxation to lines A, B and C and to a neutral (or ground) line N of the system 10 of Fig. 1. Each of branch netw~rks 120, 122 and 124 includes a capacitor (denoted C with a correspondin~ sub-script~ and a switch (denoted S with a corresponding ~ub-script). By way of . , _ . . _ . .. . . . . . . . . . . . . . . . . . ... ..

1 example, Fig. 12 shows a particularly economical embodi-ment of the branch network 120 which includes a high current density A.C. electrolytic capacitor C120 coupled in series with a semiconductor switch network S120 between the output line A and ground. In the illustrated embodiment, the capacitor C120 may be a "motor start" capacitor, desi~ned for intermittent du~y, such as the Sprague Type 9A, This capaci~or type generally includes a pair of polarized capacitor con-nected back-to-back in series.

The switch network S120 includes a pair oE
oppositely directed SCR's 126 and 128 connected in parallel to form a bidirectional switch. The pair of SCR's is connected in series with an air core inductor 130 between capacitor 120 and a common potential, such as g~ound. l~e output of a trigger network 132 is con-nected to the primary coils of trigger tran~formers Tl and T2. The secondary coils of transformers Tl and T2 are connected across the cathode and gate texminals of SCR's 126 anc~ 128, respectively. A detector 134 pro-vides an inhibit signal ~o the trigger network 132. The trigcJer network input is coupled to A/D converter 84.
In operation, when extra capacitance is required (which may be due to ~C motor start-up), the ~iynal from A~D 84 normally causes a gate 6ignal from network 132 to switch SCR's 126 and 128 to their conductive state. However, i the voltage across SCR's 126 and 128 is above a pre-determined threshold, the inhibit signal from detector 134 prevents turn-on of SCR' 8 ~26 and 128 to their non-

3~ conductive states until a point in the waveform when transients are minimal an arbitrary initial condition on the capacitor voltage. With this configuration, the network 118 i6 optimized to accommodate start-up of an uncharged capacitor or re-~tart up if the relatively poorer thermal and electrical capacitor voltage is anywhere between zero and full voltageO

1 In the preferxed embodiment~ the motor start capacitors are connected in a "wye" configuration to allow use of available lower capacitor voltage ratings.
In lower voltage applications, a "del~a" configuration may more economically be used. In all of these con-figurations, capacitor ~hermal protection in situations of inadvertent capacitor over use may be accommodated by inhibiting the motor start array switches if the series air core inductor exceeds a predetermined temperatureA

Fig. 13 shows, in block diagram form, an alternate p~wer factor correction network 150 which may replace trigger network 92 of Fig. 6. Network 140 includes a computer 142 and associated memory 144 and an interface 146. When switch 76 of Flg. 5 connects line 66 to line 78, then network 140 operates as a closed loop power factor correction ~ystem which provides power factor correciton on a periodic basis for loads which may be balanced ~r unbalanced.

During the first cycle and for all subsequent cycles, the power factor correction network measures the residual three reactive power terms (each quadrature line curre~t times its corresponding line-toneutral volta~e) during one cycle. The resultant residual or error signals are representative of the change in reac~
cive power since that last correction. The sy~tem 140 then uses this error signal to determine the capacitance to be added to or subtracted from the respective phases of the array 30 duriny the next correction cycle. In Fig. 13, the memory 144 provides storage for data repre-sentative of the state of network 30l i.e. data which defines the existing capacitors that are on-~ine~
Between power factor correction cycles, computer 142 mongtor~ the signals ~rom power factor detector 60 to determine the three indep~ndent line-to-line capacitance changes required to correct ~he power factor. Camputer 142 ~ums these incremental values with the previous 1 values as stored in memor 144 to compute the new desired v~luesO At a c~rrection time, computer 142 generates control signals representative of the new values which are to be switched from the network 30. These control signals are the trigger signal which are applied by way of interface 146 to the various stages of array 30.

Thus, the computer 142 measures the residual line-to-neutral reactive power. This value may be posi-tive or neyative. In systems where array 30 is a wye configuration, the complement of this reactive power is the value required to compensate (i.en ~he corresponding value capacitive increment, positive or negative, may be switched into the system from line-to-neutral).

In the pxeferred embodiment, which u~ilizes a three phase delta configuration capacitor array 30~ the computer 142 first determines the required incremental line~to-n~utral reactive power correction value for the output line terminal of each line, and ~hen converts that value to an equivalent reactive power delta correc-tion. The incremental delta capacitor equivalent asso-ci~ted with a determined incremental wye value is formed f~om two equal incremental delta capacitors having one terminal coupled to the associated wye terminal, with each of those incremental delta capacitors h~ving the same sign and one-third the capacitance of the incremen-tal value oE the wye computed value. The third opposing lag incremental delta capacitor has an opposite sign and has t.he same one-third capacitance magnitude.

These above values for the various output terminals are incremental values. ~he net required delta capacitors are determined by the computer 142 by addïng to the most recent c~rrective ~tate, t~e required change, which in the algebraic sum of the three incre-mental capacitance values for each terminal. Thus, ~he ~hree new capacitor~ for the delta network are 5btained 1 by adding appropriately transformed wye incremental values to the previous delta value.

The computer 142 then generates the trigger signals on line 34a which switch the desired total capa-citor value across the various lines at the next cycle during which power factor correction is made.

In cases where a computed delta capacitive value for power factor correction is determined to have a net negative value, the computer 142 modifies the values in the following optimum manner before generating the trigger signals. Computer 142 first subtracts one-third of the magnitude of ~his negative value from each o~ the other non-negative line-to-line capacitors to speciy two new total values to be placed on line. The terminal pair associated with the ~riginal desired nega-tive capacitor compensation is left uncompensated.

Figs. 14-18 show an alternate configuration Eor this power factor correction network for a three phase system 10 having a delta configuration capacitor array 30 and adapted to optimally compensate for unbalanced line-to-line or line-to~neutral loads. In this con~iguration, network 160 (Fig~ 14) replaces block 60, lines 66 and 78 of Fig. 5 and blocks 82 antl 84 of ~ig~ 6. Timing signals or the various sampling opera-tions provided by network 160 are provided by line 91 from network 90. In network 160, a pulse width mod~1la-tor ~PWM) type multiplier is used for the reactive power computation to achieve accuracy and simplicity, although other forms of multipliers would also provide the necessary dataO The pulse width modulation represen-tations of the line-to-neutral voltages are created by comparing the line-to-neutral voltage against a triangle reference. The6e digital representations allow for a 6impler, digital type multiplication implementation with the integrated currents. For fixed voltage7 the reac--33~
1 tive power measurement translates to a capacitor compen-sation value. If the voltage increases, the cornpensation capacitors reactive power also increases.
Thus, for the same reactive power at higher voltage, a smaller cornpensation capacitor is appropriate, indi-cating that the multiplier product (reactive power measurement) should be voltage compensated before using it to specify capacitance. These line vol~age variations can be substantially compensated by appropriately varying the amplitude Vp o~ ~he triangle reerence, VSAw. This form o ~he invention will now be described in detail.

Fig. 14 shows a general hlock diagram of net-work 160, which includes Vp generator 162 (sho~l in detail in Fiy. lS) coupled by way of voltage sense lines 35a to output lines A, B, and C of machine 12. Each o lines 35a provides a sinusoidal signal representative of the line-to-neutral voltage for that line (represented irl Fig. 14 by VANsin wt, VBNsin(wt~l~oo) and VcNsin~wt~40~ for lines A, B, and C, respectively).
Ge.nerator includes a full- lor half-) wave rec~ifier and filter 164~ scallng networks 166 and 167, summing net-work 168 and triangle generator 169~ For this block diagram/ the signal VREF equals ~1 times the nominal ~ull wave output voltage ~or machine 12 and the nomis~al triangle wave amplitude Vp (nom) equals VREF. With this coni~uration, generator 162 provides a compensated triangle output, VSAw on line 162a having a peak value ~, and a frequency fO. Vp thus corresponds to [~2vL/vL(nom))-l~vREF~ where VL is ~le amplitude o the signal on line 166a~ ~his linear first order compen-sation substantially eliminates the scaling error due to compensation capacitor aependence on voltage, which improves the system dynamic response.

.. .. ... . .. . . .... .. .. . . . . .. .. . ... . .. . . . .. . ... .. . . . . . . . . . . .
.

1 Network 160 also include5 three ~imilar wye value networks 174-176, where eac~ of ~hese networks is coupled to line 162a, one of lines 35a, a~d an asso-ciated one of lines 35b (which provide signals iA~ iB
and ic representative of the currents in lines A, B and C, respectively). Network 174 is shown in detailed form in Fig. 16. Network 174 i~cludes scaling network~ 177 and 178, ~lultiplier 180, summing network 1~2, zero cross detector 184 and integrator 186 (which is reset once during each compensation cycle). The networks 175 and 176 are similarly configured. With this configuration, networks 174, 175 and 176 provide output signals on lines 174a, 175a and 176a, respectively, representative oE the incremental wye (line-to-neutral) capacitance values ( ~CA~, ~CBN and ~CN~ respectively) for power factor correction.

Thus, with this configuration, the line-to-neutral power factor signals are generated by simulta-neously integra~ing (after reset), over a 360~ interval, the products of the line-to-neutral voltages for the line pairs, and the integrals of the a.c. component of the correspondinc~ line currents. As a result, the system provides substantial harmonic reduction.
Moreover, the average products of the harmonics are ne~ligible everl when both current and voltage waveform~
contain distortion~. The system al~o provides the 90 phase shift of the quadrature current so that the product OUtpllt contains a d.c. term proportional to reactive power only.

3n Lines 174a~ 175a and 176a are each coupled to a wye/delta conversion network 180 (shown in detail in Fig. 17)~ ~etwork 180 includ~s three scaling networks 179A, 179B and 179C and three sllmming networks 121-183 which provide incremental delta tline-to-line) capaci-.... . . ., .. .. ~ , . . , ., . , ., ~, ... . ... . . . . . . . . . . .. . . . . . .. .

1 tance values ( ~C~B, ~CBc and ~CCA~ reSpectively) lines 181a, 182a and 183a for power factor correction.
The signals on lines 181a, 182a and 183a are coupled to ass~cia~ed ones of summing networks 186-188 where those signals are summed with the respective ones of sommanded capacitance signals CAB(comm), CBc(comm), and CcA(comm~
to provide ~ignals which are sampled and held in sample-and hold (S/H) ne~works 190-192, respectively. The out-puts from S/H networks 190-192 provide desi~ed capacitance signals CAB(des), CBc(des), and CcA(des) on lines 180a, 180b and 180c, respectively. The latter siynals represent the capacitance already across the various terminals of machine 12 ~from the next previous me~surement cycle) plus the incremental value determined during the current measurement cycle.

The lines 180a, 181a, and 182a are coupled to negative capacitance value ~orrection network 196 (shown in detail in Fig. 18). Network 196 includes three summing networks 201~203 having an input coupled to a ~0 respective one of lines 180a, 180b and 180c. Each oE
networks 201-203 has its output coupled to one of three networks 206-~08 having a contin~lous Vin/V~ut transfer function which passes through ~0,0) ancl has a slope of 1 in the irst quadrant and output equal to zero in the third quadrant. The output from each of networks ~06 208 is coupled by way of one of sample-and-hold ~S/H) networks 212-214 to one o~ output lines 196a, 196b and 196c. Each o networks 201~203 also has it~ output coupl~d to one of three networks 218-220 having a VIN/VOUT transfer function which passes through ~0,0) and has a slope equal to ~ in the first quadrank and a 810pe e~ual to 1/3 in the third quadrant- The output rom each of network~ 218-220 is coupled to a summing input of the two networXs 201 ~203 which are not c~upled ~o it6 input. With this conigur~tion, when one of the 1 desired capacitance signals is negative, co~nand capaci-tance signals are generated which correct the command values to provide op~imal power fac~or correction with zero or positive capacitances only.

In summary, the system 10 using network 142 performs simultaneous three-p~lase reactive power sensing during one 360 degree interval of the line ~requenc~ by simultaneously integrating three signals, each being proportional to the product of an integrated (90 degree phase shift of ~undamental) line current and its respective sinusoidal line-to-neutral voltage. The three integrators are reset prior t~ initiation of a new measurement cycle. As a res~lt, by integrating over 360 degrees, the reactive power without additional iltering is determined during one cycle. In this configuration, the integrator 176 provides harmonic reduction, gO
degree phase shift and fre~uency compensation (achieved by integrating line current prior to multiplication by line-to-neutral voltage~. The present system is a ~0 closed loop configuration in that a power fac~or correc-tion value is alxeady present in parallel with the load thus the reactive power error is measured and the correction value is adap~ively modified. The syst~m 10 provides relatively high speed closed loop power fac~or correction and can also accommodate ~mbalanced line-to~
line anA line-to-neutral inductive loads.

In general, the compensation capacitors are not taken on (or off) line duriny the 3~0 degree measurement interval to avoid measurement errors. The new value~ of capacitance, computed after a measurement, are placed on line at the ne~t opportunity consistent w;th the transient-free 6witch-on.

~hi6 reactive power compensation ~pproa~h minimizes the three-phase RMS reactive currents even , .. .,, , . . ,, . .. ... .~, .... . . . . .. .. ...... .. .. .. . . . . . .

1 when full compensation is not possible with delta corrected capacitors only. This similar situation arises, for example, during heavy unbalanced loading such as a single phase line-to-neutral connected motor load is present.

The invention may be embodied in other speci-fic forms without departing from the spiri~ or essential characteristics thereof. The present embodiments are therefore to be considered in all respects as illustra-tive and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (11)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. A power grid network comprising two or more induction generator systems, each induction generator system comprising:
A. an n-phase induction machine having an input shaft and at least n output lines, where n is an integer, wherein each output line is coupled to an associated output terminal, B. means for generating a frequency control signal representative of the difference be-tween the frequency of the voltage of at least one of said output terminals and a reference value, C. torque generating means responsive to said frequency control signal for applying a torque to said input shaft, said applied torque being related to said frequency control signal, D. an N-stage switched capacitor array, where N
is an integer, each stage including n capaci-tor networks, each network being associated with a pair of said output lines, wherein the capacitor networks within each stage are each characterized by a predetermined capacitance for that stage, and wherein each of said capa-citor networks includes an associated capaci-tor switch means, each switch means being responsive to a trigger signal for selectively coupling said capacitor network across its associated pair of output lines,
1. Claim 1 continued E. feedback means coupled to said output lines and including trigger means for generating said trigger signals, wherein the output terminals of said induction generator systems are coupled to each other, and wherein said feedback means for each system includes a voltage detection means for generating an amplitude signal representative of the difference between the amplitude of the voltage at said output terminals and a reference value, and for coupling said amplitude signal to said trigger means, whereby said induction machine maintains a predetermined voltage to loads coupled to said output terminals.
   
   2. A power grid network according to claim 1 wherein at least one of said induction generator systems includes at least one thermistor network coupled between one of said output lines and its associated output terminal, said thermistor network including:
   
   A. a thermistor device and a first switch coupled in series between said output line and output terminal, wherein said thermistor has a characteristic resistance which varies with temperature between a relatively high resistance at a predetermined low temperature and a relatively low resistance at a predetermined high temeprature and wherein said first switch is selectively operable in a first state to establish a first current path between said output line to said output terminal by way of said thermistor device, and selectively operable in a second state to interrupt said first current path,
2. Claim 2 continued B. a second switch means selectively operable in a first state to establish a second current path between said output line and said output terminal by way of said second switch, and selectively operable in a second state to interrupt said second current path, and C. a control means selectively operable in a first (RUN) state for controlling said first switch to be in its first state and said second switch to be in its second state, and selectively operable in a second (START UP) state for controlling said first switch to be in its second state and said second switch to be in its first state, and selectively operable in a third (OFF) state for controlling said first and second switches to be in their second states.
3. 3. The system according to claim 1 wherein the ampli-tude signal coupling means of the feedback means for at least one of said induction generator systems includes means responsive to said frequency signal for modifying said amplitude signal whereby the modified amplitude signal is equal to said amplitude signal when said frequency signal is representative of frequencies outside a predetermined frequency range, and is equal to a predetermined value when said frequency signal is representative of frequencies within said predetermined frequency range, and includes means for coupling said modified amplitude signal to said trigger means in place of said amplitude signal, whereby said induction generator machine delivers real and reactive power to loads coupled to said output terminals at a first predetermined voltage when said frequency is above said predetermined range and at a second predetermined voltage when said frequency is within said predetermined range, where said second predetermined voltage is less than said first predetermined voltage.
4. 4. The system according to claim 1 wherein said trigger means includes for each pair of said output lines:
   
   (1) a first zero crossing detector means coupled to said pair of output lines for generating a first signal having a first value when the line-to-line voltage for said pair is greater than zero and a second value when the line-to-line voltage for said pair is less than zero.
   
   (2) an integrating means for generating a second signal representative of the integral of said first signal, and (3) a second zero crossing detector for generating a third signal, said third signal having a first value when said second signal is greater than zero, and a second value when said second signal is less than zero, wherein said third signals correspond to said trigger signals for the capacitor switch means for the respective pairs of output lines.
   
   5. The system according to claim 1 wherein for each output line pair for each of said N stages, said capacitor network includes an inductor connected in series with a capacitor between two terminals, and said associated capacitor switch means includes:
   
   a first semiconductor switch network coupled between said inductor and one line of said pair of output lines, said first switch network including a TRIAC device having its MT2 terminal coupled to said one output line and its MT1 terminal coupled to one terminal of said capacitor network and a diode having its
5. Claim 5 continued cathode coupled to the gate terminal of said TRIAC device and its anode coupled to said one line, wherein one of said trigger signals is selectively coupled across the gate and MT1 terminals of said TRIAC device, and a second semiconductor switch network coupled between said capacitor and the other line of said pair of output lines, said second switch network including an SCR device having its anode terminal coupled to said other output line and its cathode coupled to the other terminal of said capacitor network and a diode having its cathode terminal coupled to said other output line and its anode terminal coupled to the cathode terminal of said SCR device, wherein one of said trigger signals is selectively coupled across the gate and cathode terminals of said SCR device.
6. 6. The system according to claim 5 wherein said output lines are adapted to provide relatively high convective heat transfer from said lines to the surrounding region, and wherein said SCR devices are coupled to said output lines with a relatively high heat transfer coefficient between the anode terminals of said SCR devices and said output lines, and wherein said TRIAC devices are coupled to said output lines with a relatively high heat transfer coefficient between the MT2 terminals of said triac devices and said output lines.
   
   7. A system according to claim 1, further comprising an overload capacitance network, said overload capacitance net-work including n branch networks, wherein each branch network includes:
7. Claim 7 continued (1) an A.C. electrolytic capacitor coupled in series with a normally-conductive bi-directional switch network, said switch network being responsive to a gate signal to be non-conductive, and (2) means for generating said gate signal only when the voltage across said switch network is lower than a predetermined threshold.
8. 8. The system according to claim 7 wherein said A.C.
   electrolytic capacitor includes a pair of oppositely polarized capacitors connected in series.
9. 9. The system according to claim 7 wherein each of said branch networks is connected between an associated pair of said output lines.
10. 10. The system according to claim 7 wherein each of said branch networks is connected between an associated one of said output lines and a common potential.
11. 11. The system according to claim 7 wherein said switch network includes a pair of oppositely directed SCR's connected in parallel and a pair of trigger transformers, each SCR having the secondary coil of one of said trigger transformers connected between its gate and cathode, and wherein the primary coils of said trigger transformers are adapted to receive said gate signal between said A.C. electrolytic capacitor and said switch network.