CA1181186A - Transformerless hybrid circuits - Google Patents
Transformerless hybrid circuitsInfo
- Publication number
- CA1181186A CA1181186A CA000374518A CA374518A CA1181186A CA 1181186 A CA1181186 A CA 1181186A CA 000374518 A CA000374518 A CA 000374518A CA 374518 A CA374518 A CA 374518A CA 1181186 A CA1181186 A CA 1181186A
- Authority
- CA
- Canada
- Prior art keywords
- wire line
- output
- operational amplifier
- input
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/54—Circuits using the same frequency for two directions of communication
- H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/583—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using a bridge network
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/54—Circuits using the same frequency for two directions of communication
- H04B1/58—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/586—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa using an electronic circuit
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Interface Circuits In Exchanges (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Amplifiers (AREA)
Abstract
ABSTRACT
The two wires of a symmetrical two-wire line are connected via two halves of a terminal line resistor to respective terminals of a relatively low impedance symmetrical input arm of a return path such as a four-wire line, are each connected via a relatively high value resistor to respective inputs of an operational amplifier which leads to the go path, the inputs of the operational amplifier also being connected cross-wise via respective resistors of a value double that of the terminals of the input arm. A thres-hold value element comprising a transistor may monitor the output voltage of the operational amplifier and change a d.c. reference voltage so that the output signals of two operational amplifiers located in the go path are sub-stantially mutually equal. Other circuit components may serve to determine current asymmetry and to monitor loop closure.
The two wires of a symmetrical two-wire line are connected via two halves of a terminal line resistor to respective terminals of a relatively low impedance symmetrical input arm of a return path such as a four-wire line, are each connected via a relatively high value resistor to respective inputs of an operational amplifier which leads to the go path, the inputs of the operational amplifier also being connected cross-wise via respective resistors of a value double that of the terminals of the input arm. A thres-hold value element comprising a transistor may monitor the output voltage of the operational amplifier and change a d.c. reference voltage so that the output signals of two operational amplifiers located in the go path are sub-stantially mutually equal. Other circuit components may serve to determine current asymmetry and to monitor loop closure.
Description
Cb The invention relates to a trans~ormerless construction of the hybrid circuits of the type required to permit communication between two telecommunications stations in a telecon~unicatior.s system, where transmission devices which allow adequately interfer-ence-free signal transmissions in both directions of transmission are needed between the telecommunications stations. For this purpose it is p~ssible to provide for each direction of transmission a separate transmission line, a go path and a return path, which may in the case of multiplex operation be commonly utilised for a 10 plurality of simultaneous established connection paths between two telecommunications stations. Four-wire operation of this kind will preferably be provided in the higher levels of a telecommunications network. In lower 1evels of a telecommunications network, in particular in the region of subscriber connection lines, signal 15 transmission is generally carried out in duplex operation via two-wire lines, in which case the transmission signals of the two directions of transmission are isolated by means of a hybrid cir cuit which terminates the two-wire line and which may, for example, convert the two-wire line into a fourwwire section of a subscriber 20 terminal station (and vice versa), thereby decoupling the go path of the four-wire line which leads away from the hybrid circuit from the return path which leads towards the hybrid circuit. (In order to ensure a high transmission quality of the hybrid circuit, in addition to decoupling between the go and return paths of the four-25 wire line, freedom of reflection between the hybrid circuit and thetwo-wire line is also desirable, which imposes corresponding additional demands on the hybrid circuit).
One known transmission system is described in the German
One known transmission system is described in the German
- 2 -OS ~9 1~ 945, see ~ig. 1, which utilises a tr2nsformerless hybrid circuit for connecting a two-wire line to a four-wire line, where-in the input signal which arrives in the hybrid circuit via the return path of the four-wire line is fed to the two-wire line via an impedance circuit which is adapted to the -two-wire line, and the signal which occurs on the two-wire line is added, in an adder, to this input signal after being multiplied by -1/2, the output of the adder feeding the go path of the four-wire line, which leads away from the hybrid circuit. The two-wire line of this known trans-10 mission system is a two-wire line which is asymmetrical relative to earth; and in practice a symmetrical two-wire line is frequently desirable.
The VS Patent 40 41 25~ describes a transformerless hybrid circuit for connecting a two-wire line to a return path and go 15 path of a four-wire line whilst simultaneously decoupling thP two four wire line signal paths from one another, wherein any input signal which arrives via the return path of the four-wire line, to appear at two input terminals at which the input signal voltages are mutually opposed in phase, is fed to the two-wire line after being attenuated by an impedance c~rcuit which is matched to the two~wire line, and any signal fed in via the two-wire line is fed to the go signal path of the four-wire line following the subtract~
ion of half any input signal, one two-wire line terminal being connected to one return path terminal via a resistor equal in 25 value to half the ohmic component of the two-wire line impedance and the other two-wire line terminal being connected in similar manner to the other return path terminal, and each two~wire line terminal being connected to a respective input of an operational ampl.ifier whose output is connected to the inverting input of a further operational ampliEier, which is likewise connected via a compensation network to one of the two return path terminals of the four-wire line, the output of which operational ampli~ier also being connected to said inver-ting input via a feedback resis-tor, and feeding the go signal path OL the four-wire line.
In this ~nown transformerless hybrid circuit, in which the aforementi.oned cornpensation network is used to effect a sub-traction of any return path input signal component from any siy nal which passes from the two wire line to the go signal path of the four-wire line, this compensation network also considerably disturbs the symmetry of the two-wire line connections of the hybrid-circuit, and thus upsets the symmetry of the entire two-wire line circuit, 50 that the two-wire line cannot be operated as a symmetrical two-wire line with the desired degree of symmetry.
One object of the present invention is to enable conver-sion of a symmetrical two-wire line into a four-wire line (and vice versa), for example, whilst decoupling the go and return paths, by means of a transformerless hybrid circuit.
~ccording to a broad aspect of the invention there is provided a transformerless hybrid circuit for connecting a two-wire line to an input-arm and an output-arm of ~o and return paths of a four-wire line with simultaneous decoupling of -the go path and return path from each other, wherein the return path is sy~-metrically desicJned and is connected -to the two--wire line through an impedance circuit adapted to the two-wire line, and the two wire line is connected to the go path of the four-wire line throu~h '~.
an input-signal sub-trac-tion circuit comprisiny a firs-t adder stage, characterized in -that one wire of the two-wire line, which is connected, through an impedance which is substantially e~ual to half the surge impedance to the symmetrical two--wire line, to one terminal of the return path, which has a low impedance at leas-t in respect of alternatlng current, is connected to a first input-terminal of said adder stage, in tha-t the other wire of the two-wire line, which is connected, -through an impedance substantially e~ual to half the surge impedance of the two-wire line, to the other terminal of -the return path of -the four-wire line, is con-nected to a second input of said first adder stage, said terminals of the return path being connec-ted to third and fourth terminals of said first adder stage, said adder stage having an output connected to said go path of said four-wire line.
The circuit pro~osed in accordan~e with the invention enables a transformerless hybrid circuit to be used to convert a symmetrical two-wire signal channel without impairing -the line syr~metry by an asymmetrical compensation into go and return chan:nels, such as the paths o:E a four-wire line, and vice versa, where the hybrid circuit fundamenkally serves both for decoupllng the go channe:L from the return channel, and also as a substarltially ref-lection-free termination for the two-wire lineO The hybrid c.ircuit can be used, for example, in a telecommunications subscriber s-ta-tion, at the transition between a (four-wire) telecommunications subscriber station and a (two-wire) subscriber terminal line, or also at the transition between a (-two-wire) ;', - 5 -subscriber connection line and the associated (~our~wire) tele-communicatiOnS exchange, particularly in the case of a digital exchange. In the latter case, further development possibilities are then available for indication or monitoring, and which are S simple to realiset such as loop closure indication, the indicatio~
of loop current asymmetry in the event of the operation of an ear~h key in the case o an insulation error, and to indicate the existence of a call, or provide surge current protection of the subscriber connection line.
Fundamentally an adder in the form of a conventional integrated circuit module can be used as the adder device. In one expedient development of the invention, one two-wire line wire is connected, via an impedance element simulating substantially half the surge impedance o~ the symmetrical two-wire line, to one 15 input terminal of the return path, which path is low-ohmic at least in respect of a.c., and is connected via a first resistor af relatively high value to one input terminal of an operational amplifier which feeds the go signal path~ and which is also connected via a second resistor of relatively high resistance value 2~ to the other input terminal, and the other two wire line wire, which is connected via an impedance element simulating substantially half the surge impedance of the two-wire line to this other input terminal, and is connected via a third resistor of relatively high value to the other input terminal of the operat-25 ional amplifier and which is itself connected via a fourth resistor,of relatively high value to the aforementioned first input terminal, the inverting input of the operational amplifier being connected to its output, and the non-invertin~ input of the operational amplifier being connected to a line symmetxical point via respect-ive relatively high value resistors.
With regard to a simple means of assuring the line symmetry of the two-wire line, a particularly clearly laid out dimensioning of the hybrid circuit has proved advantageous, as a result of which, in a further development of the invention, the first input terminal of the operational amplifier which leads to the go signal path, which is connected to the first two-wire line wire via the :Eirst resistor, is connected via a second resistor of double value to 10 the other input terminal, and consequently the other input terminal of the operational amplifier, which is connected to the other two-wire line wire via the thir~ resistor, is connected via a fourth resistor double in value, to the aforementioned first input terminal of the return path, the inverting input of the operational 15 amplifiex being connected to its output and the non-inverting input of the operational amplifier heing connected to a line symmetrical point via a respective resistor of a value v-times greater, where v represents the amplification factor of the operational amplifier.
In order that the re~urn path is low-ohmic it is expedient 20 that the non-inverting inputs of two operational amplifiers located in the return path are each connected to a ref~rence d.c.
voltage, the non inverting input of the first of the two operat ional amplifiers ic connected to the input arm of the four-wire line, and that the output of this operational amplifier is connec-25 ted via a resistor to the one terminal of the two-wire line and via a further resistor to the inverting input of the second operational amplifier, whose output is connected via a resistor to the other terminal of the two-wire line.
A hybrid circuit constructed in accordance with the invention is not limited to use in communications transmission systems with equal signal frequency positioning and techniques, but can be used in a transmission system comprising transmission channels which differ from one another in respect of time slot positioning and/or frequency positioning, for example, and the hybrid circuit may be connected to a return channel for transmitted s.ignal pulses at specific instants of time and/or to give a spectral response with one given centre frequency, and to a go 10 channel for received signal pulses at other instants of time and/or to give another spectral response with another given centre frequency.
A differential amplifier may be used to feed a transistor to monitor a subscriber connection line in respect of loop closure.
In order to limit the curr~nt in a subscriber connection line r where first and second operational amplifiers are used, a threshold value element may be operated by the output signal of the first adder stage, and a transistor provided which operates in the event that a threshold value is exceeded by the output signal 20 of the adder stage, to cause the reference d.c. voltage of an operational ampl.ifier whose output is connected to said other terminal of the subscriber connection line to be changed to such an extent that the output signals of the two operational amplifiers are appxoximately equal in value, which results .in a current limit-25 ation on the subscriber connection line.
For the establishment of asymmetric current flow through thewires of the subscriber connection, such as occurs excluding the feeding in of ringing curxent, if an earth key is operated, or if there is a faulty earth connec~ion on the subscriber connection line, or even as happens in regular operation when caused by the feeding in of rlnging current, a second adder stage may be used, which is supplied with the same input voltage as the first adder stage, a second differential amplifier, with the aid of which the output voltage of the second adder stage is compared with a refer-ence voltage, and an electronic switch which is operated if the aforementioned threshold value is undershot or overshot/ to change its state of conductivity and thereby supply an indication criter-10 ion, The invention will now be described with reference to thedrawings, in which:-Figure 1 schematically illustrates a first exemplary embodi-ment of a hybrid circuit constructed in accordance with the 15 invention;
Figure ~ schematically illustrates a second exemplary embodi-ment of a hybrid circuit constructed in accordance with the invention;
Figure 3 schematically illustrates a more detailed circuit 20 diagram of a further exemplary hybrid circuit, including further advantageous features; and Figure 4 schematically illustrates yet a further exemplary embodiment of a hybrid circuit constructed in accordance with the învention.
The em~odiment shown in Figure 1 illustrates a fundamental circuit for use in connecting a two-wire transmission system to a four-wire transmission system. In the transmission system illust~
rated in the drawing, which may apply to systems for analogue signals (speech, video) or digital signals (e.g. data), a trans-formerless hybrid circui~ G constructed in accordance with the invention is provided for connecting a symmetrical two-wire line ZL
to a four-wire line VL, which comprises a return path VS and a go signal path VE, whilst simultaneously providing mutual decoupling of the two four-wire line paths, VS and VE, from one another.
In this hybrid circuit G, the symmetrical two-wire line ZL
has its two wires connected via terminals a and b to input termin-als, sa and sb o~ the return path VS of the four-wire line Vl via 10 respective elements Z/2 simulating halves of a two-wire line terminal impedance ~/2 + Z/2, which is substantially equal to the surge impedance of the two-wire line ZL. The return path VS is of syl~metrical design, i.e. at its two output terminals, sa and sb, respective input signal voltages Vs mutually opposed in phase 15 relative to a symmetrical point 0 which carries a mean potential.
The internal impedance of the return path VS which is presented between the two terminals, sa and sb, and between each of these terminals and the symmetrical point 0 will be assumed to be at least approximately negligible. When there is an input signal 20 voltage 2.Us between the two terminals sa and sb of the return path VS of the four-wire line VL, this input signal voltage is atten-uated by the two respective halves Z/2 of the two-wire line term~
inal impedance to such an extent that transmitting signal potent-ials each amounting to Us/2, but of mutually opposite sign, are 25 fed to the two texminals, a and b of the two-wire line.
The two-wire line terminals, a and b are also connected via respective resistors R to the inverting and non-inverting inputs respectively of an operational amplifier V, which leads to the go -- 10 ~
signal path V~ of the four-wire line VL. The two resistors ~ will be assumed to possess a resistance value which is high in relation to the two-wire line surge irnpedance, so that their influence upon the termination of the two wire line ZL is effectively negligible, The two inputs of the operatio~al amplifier V are connected to the two terminals sb and sa of the return path VS of the four-wire line VL via respective resistors 2R, each having a value double the resistance value of the resistors R, in a relative assignment which is the reverse to that for the two-wire line terminals, a and 10 b. Finally the inverting input (-) of the operational amplifier V
is connected to its output and the non-inverting input (~) is connected to the symmetrical point 0, each via a respective resistor vR whose resistance value is v times greater than that of the resistors R, where v is the gain of the amplifier V. The output A
15 of the operational amplifier and the symmetrical point 0 form the terminals of the go path VE oF the four-wire line VL. Here, in response to signal potentials ~ Ue/2 received via the two-wire line wires at terminals a and b (from the remote end thereof) and which have superimposed thereon any aEorementioned transmitted 20 signal potentials - Us/2, only one undistorted signal voltage v.Ve occurs, as the transmitted signal components which reach the input terminals of the operational amplifier V effectively compensate one another.
A hybrid circuit constructed in accordance with the 25 invention is not limited to use in communications transmission using line conductors, or equal frequency positions, or even sim-ilar transmission techniques on the respective lines, but may also be used in a transmission system in which the transmission channels are separate from one another in respect of time slot location an~/
or frequency location, for example, in which cas~ the hybrid cir-cuit provides connection to a return path VS for the onward trans-mission of input signal pulses received at specific points in ti~,~
and/or in a frequency spectrum with a specific centre frequency, and to a go signal channel VE or the reception and onward trans-mission of output signal pulses thereto at other points in time and/
or in a frequency spectrum with another centre frequency. The return path VS may contain a cascade arrangement of a speech signal 10 coder, formed for example by a delta modulator, and a digital signal transmitting circuit for the transmission of input signal pulses, for example at specific points of time, and the go signal c~annel VE can contain a cascade arrangement of a corresponding digital signal receiving circuit and a speech signal decoder, 15 possibly formed by a delta demodulator. The aforementioned digital signal transmitting circuit can for example emit pseudo-ternary half-element signal pulses, or so-called half bauded AMI (alternate mark inversion) signal pulses/ for which purpose it can comprise a ROM which stores instantaneous values of the input signal pulses in 20 coded form and is operated in accordance with the digital signals emitted from the speech signal coder and which feeds the corresponding instantaneous values, in their coded form, to a decoder which forms the corresponding input signal pulses on the basis thereof, as described in the German Patent 29 16 576~ '~he 25 digital signal receiving circuit can contain a regenerator ! as is fundamentally known (for example frsm the Siemens publication "PCM - Die PulsGode-l~odulation und ihre Anwendung im Fernmeldewesen"
page 15, Fig. 21) and in which a pulse extractor is used to extract from the output signal pulses a received bit pulse train which serves to define the decision times at which, in the digital signal receiving circuit, an amplitude decision is made concerning the particular status value of the bit in question; furthermore the digital signal receiving circuit can contain a received sign~l converter, which can be constructed for example by a rectifier circuit, and which converts the regenerated signals into corres-ponding delta-modulatecl or pulse-code-modulated signals. As described in the German Patent Specification No. 29 21 019, the 10 transmitted bit pulse train can be derived from the received bit pulse train and displaced in phase by one half bit time interval in comparison therewith. Circuitry details of the return path VS
and the go signal path VE have not been shown in detail in the drawing however, as such details are not necessary for an 15 understanding of the present invention.
The exemplary embodiment oE a hybrid circuit constxucted in accordance with the invention illustrated in Figure 2 contains a pair of operational amplifiers, OP1 and OP2, i.e. two amplifier units each having a differential amplifier two terminal input, a 20 very high input impedance/ a very low output impedance, and a very large no-load amplification.
I'he non-inverting inputs of the two operational amplifiers are each connected by respective circuit paths to a rererence d.c.
voltage which will be assumed to be derived from the feed voltage 25 source of a subscriber connection line which forms a two-wire line connected to terminals a and b. The non-inverting input of the operational ampliier OP2 is also connected to the signal path VE
of the four~wire line. The output of each of the two operational amplifiers has a feedback path via a respective resistor, Rrl and Rr2, to its inverting input. The output of the operational amplifier OP2 is also connected via a resistor RK to the inverting input of the operational amplifier OP1.
The output of the operational amplifier OP1 is connected via a resistor RF to the terminal a ~the two-wire subscriber connection line ~ conductor)~ Similarly, the output of the operational amplifièr OP2 is connected to the terminal (the subscriber conn-ection line b conductor) via a further resistor RF, which is 10 preferably of the same resistance value as the first mentioned resistor RF. The subscriber connection line will be assumed to serve to connect a subscriber station (not shown) to the associated exchange-side subscriber connection l~ne, of which the described hybrid circuit forms a part.
A differential amplifier A1 represents a further component of this embodiment of the hybrid circuit/ and its non-inverting input is connected via a resistor R1 to the output of the afore-mentioned operational amplifier OP1, and also connected via a resistor R3 to the terminal b Similarly, the inverting input of 20 the differential amplifier A1 is connected via a resistor R2 to the output of the operational amplifier OP2, and is connected via ~ ,~
a resistor R4 to the terminal .~ Feedback is provided from the output of the differential amplifier to its inverting input via a further resistor Rr. The output is also connected to the go-signal 25 path VS of the four-wire line.
As will be seen from Figure 3, the circuit arrangement of Figure 2 can be further developed in various ways in order that it may undertake various monitoring ~unctiOns For loop closure a~;
monitoring of the subscriber connection line which comprises an a-wire and b-wire connected to terminals a and b, a second differer,t-ial amplifier A2 is provided, whose inverting input is connected to the output of the first differential amplifier A1, and wh~se non-inv2rting input is connected to a d.c. reEerence voltage. A
transistor Q1 has its control electrode connected to the output of the second differential amplifier A2. The circuit parameters, thus in particular the amplification of the differen~-ial amplifier A1, the reference voltage connected to the non-inverting input of 10 the second differential amplifier A2, and the bias voltage of the aforementioned transistor Q1, are selected to be such that when the subscriber loop is closed via the hook switch of the subscriber station, the current which then flows produces an output signal in the first differential amplifier Al which undershoots the relerence 15 voltage in the second differential amplifier, so ~hat the second differential amplifier A2 emits an output signal which b~ings the transistor Q1 into its conductive state to indicate the existence of loop closure, as will be shown by appropriate analysis of the collector potential OFFH which then prevails. The differential 20 amplifier properties of the amplifier A2 and the amplitude relat-ionship between the alternating currents which occur on the subscriber connection line and the d.c. comparator voltage ensure that these alternating currents do not influence the aforementioned indication of loop closuxe.
To limit the current flowing in the subscriber connection line, then, as is shown in Figure 3, a threshold value element is provided in the form of a diode D1, which is normally biased in the block~ng direction by a voltage divider composed of resistors R5, R6, and R7, and which serves to operate a transistor Q2 whose control circuit contains the diode D1. The threshold value ele-ment is supplied with the output voltage of the first differential amplifier A1 via a filter element composed of a resistor RS and a capacitor C~ If an impermissibly high current flows in the sub-scriber connection line, the output voltage of the first difer-ential amplifier A1 exceeds the threshold value of the threshold value element, and the diode D1 thereby becomes conductive, where-upon the associated change in voltage in the control circuit of the 10 transistor Q2 leads to a change in the conductivity state of said transistor Since the collector of this transistor is also connected to the terminal via which the first operational amplifier OP1 is supplied with a reference voltage, such a change in conduct i~ity also results in a change in the reference ~oltage to such an 15 extent that the output voltages of the opera~ional amplifiers OP1 and OP2 become approximately equal, resulting in a reduction in the ~oltages between the a-wire and b~wire of the subscriber connection line. As desired, this in turn leads to a limitation of the current flow in the two-wire subscriber connection line.
The circuit arrangement illustrated in Figure 3 is further equipped in such manner that, in addition to the aforementioned functions, it is possible to establish,if there is any asymmetry of the current which flows via the wires of the subscriber connection line. Such asymmetry occurs when ringing curxent is 25 fed into the subscriber connection line, or may occur in the absence of such ringing current injection, if an earth key is actuated, or the b-wire is connected to earth by a low value resistance path as -a result of an insulation failure, for example. To detect this condition a third differential amplifier A3 is provided to drive a fourth differential amplifier A4 and so control an electronic s~itch in the form of a transistor Q3. The inputs of the differ-ential amplifier A3 are supplied via a network which is the same as that for the first differential amplifier A1, so that it is subjected to the same input voltages. ~he fourth differential amplifier A4 is used as a comparator, which compares the output voltage of the differential amplifier A3 with a reference voltage.
The output signal of the fourth differential amplifier A4 serves 10 as control signal for the transistor Q3. The circuit paramete~s are selected to be such that whenever there is any asymmetry of the d.c. flow on the subscriber connection line, the output voltage of the differential amplifier A3, which voltage is proportional to said asymmetry, undershoots the predetermined threshold value, so 15 that the output signal emitted from the differential amplifier A4 switches over the transistor Q3 into its conductive state' and the collector potential GK of said transistor can then be evaluated as an indication of the aforesaid asymmetry. In this context a capacitor CR is pro~ided .in a shunt path which bridges the feedback 20 resistor R_4 of the di~ferential amplifier A3, and prevents the presence of any a.c. signals on the subscriber connection line being evaluated as an indication of asymmetry.
In the circuit arrangement illustrated in Figure 3 it is possible to withdraw the application of operating voltage from 25 the subscriber connection line by means of a signal PDWN that is applied to the connection point o~ the voltage divider resistors R5 and R6, for example in the form of a potential change from +5 to earth potential. This causes the transistor Q2 to go non-
The VS Patent 40 41 25~ describes a transformerless hybrid circuit for connecting a two-wire line to a return path and go 15 path of a four-wire line whilst simultaneously decoupling thP two four wire line signal paths from one another, wherein any input signal which arrives via the return path of the four-wire line, to appear at two input terminals at which the input signal voltages are mutually opposed in phase, is fed to the two-wire line after being attenuated by an impedance c~rcuit which is matched to the two~wire line, and any signal fed in via the two-wire line is fed to the go signal path of the four-wire line following the subtract~
ion of half any input signal, one two-wire line terminal being connected to one return path terminal via a resistor equal in 25 value to half the ohmic component of the two-wire line impedance and the other two-wire line terminal being connected in similar manner to the other return path terminal, and each two~wire line terminal being connected to a respective input of an operational ampl.ifier whose output is connected to the inverting input of a further operational ampliEier, which is likewise connected via a compensation network to one of the two return path terminals of the four-wire line, the output of which operational ampli~ier also being connected to said inver-ting input via a feedback resis-tor, and feeding the go signal path OL the four-wire line.
In this ~nown transformerless hybrid circuit, in which the aforementi.oned cornpensation network is used to effect a sub-traction of any return path input signal component from any siy nal which passes from the two wire line to the go signal path of the four-wire line, this compensation network also considerably disturbs the symmetry of the two-wire line connections of the hybrid-circuit, and thus upsets the symmetry of the entire two-wire line circuit, 50 that the two-wire line cannot be operated as a symmetrical two-wire line with the desired degree of symmetry.
One object of the present invention is to enable conver-sion of a symmetrical two-wire line into a four-wire line (and vice versa), for example, whilst decoupling the go and return paths, by means of a transformerless hybrid circuit.
~ccording to a broad aspect of the invention there is provided a transformerless hybrid circuit for connecting a two-wire line to an input-arm and an output-arm of ~o and return paths of a four-wire line with simultaneous decoupling of -the go path and return path from each other, wherein the return path is sy~-metrically desicJned and is connected -to the two--wire line through an impedance circuit adapted to the two-wire line, and the two wire line is connected to the go path of the four-wire line throu~h '~.
an input-signal sub-trac-tion circuit comprisiny a firs-t adder stage, characterized in -that one wire of the two-wire line, which is connected, through an impedance which is substantially e~ual to half the surge impedance to the symmetrical two--wire line, to one terminal of the return path, which has a low impedance at leas-t in respect of alternatlng current, is connected to a first input-terminal of said adder stage, in tha-t the other wire of the two-wire line, which is connected, -through an impedance substantially e~ual to half the surge impedance of the two-wire line, to the other terminal of -the return path of -the four-wire line, is con-nected to a second input of said first adder stage, said terminals of the return path being connec-ted to third and fourth terminals of said first adder stage, said adder stage having an output connected to said go path of said four-wire line.
The circuit pro~osed in accordan~e with the invention enables a transformerless hybrid circuit to be used to convert a symmetrical two-wire signal channel without impairing -the line syr~metry by an asymmetrical compensation into go and return chan:nels, such as the paths o:E a four-wire line, and vice versa, where the hybrid circuit fundamenkally serves both for decoupllng the go channe:L from the return channel, and also as a substarltially ref-lection-free termination for the two-wire lineO The hybrid c.ircuit can be used, for example, in a telecommunications subscriber s-ta-tion, at the transition between a (four-wire) telecommunications subscriber station and a (two-wire) subscriber terminal line, or also at the transition between a (-two-wire) ;', - 5 -subscriber connection line and the associated (~our~wire) tele-communicatiOnS exchange, particularly in the case of a digital exchange. In the latter case, further development possibilities are then available for indication or monitoring, and which are S simple to realiset such as loop closure indication, the indicatio~
of loop current asymmetry in the event of the operation of an ear~h key in the case o an insulation error, and to indicate the existence of a call, or provide surge current protection of the subscriber connection line.
Fundamentally an adder in the form of a conventional integrated circuit module can be used as the adder device. In one expedient development of the invention, one two-wire line wire is connected, via an impedance element simulating substantially half the surge impedance o~ the symmetrical two-wire line, to one 15 input terminal of the return path, which path is low-ohmic at least in respect of a.c., and is connected via a first resistor af relatively high value to one input terminal of an operational amplifier which feeds the go signal path~ and which is also connected via a second resistor of relatively high resistance value 2~ to the other input terminal, and the other two wire line wire, which is connected via an impedance element simulating substantially half the surge impedance of the two-wire line to this other input terminal, and is connected via a third resistor of relatively high value to the other input terminal of the operat-25 ional amplifier and which is itself connected via a fourth resistor,of relatively high value to the aforementioned first input terminal, the inverting input of the operational amplifier being connected to its output, and the non-invertin~ input of the operational amplifier being connected to a line symmetxical point via respect-ive relatively high value resistors.
With regard to a simple means of assuring the line symmetry of the two-wire line, a particularly clearly laid out dimensioning of the hybrid circuit has proved advantageous, as a result of which, in a further development of the invention, the first input terminal of the operational amplifier which leads to the go signal path, which is connected to the first two-wire line wire via the :Eirst resistor, is connected via a second resistor of double value to 10 the other input terminal, and consequently the other input terminal of the operational amplifier, which is connected to the other two-wire line wire via the thir~ resistor, is connected via a fourth resistor double in value, to the aforementioned first input terminal of the return path, the inverting input of the operational 15 amplifiex being connected to its output and the non-inverting input of the operational amplifier heing connected to a line symmetrical point via a respective resistor of a value v-times greater, where v represents the amplification factor of the operational amplifier.
In order that the re~urn path is low-ohmic it is expedient 20 that the non-inverting inputs of two operational amplifiers located in the return path are each connected to a ref~rence d.c.
voltage, the non inverting input of the first of the two operat ional amplifiers ic connected to the input arm of the four-wire line, and that the output of this operational amplifier is connec-25 ted via a resistor to the one terminal of the two-wire line and via a further resistor to the inverting input of the second operational amplifier, whose output is connected via a resistor to the other terminal of the two-wire line.
A hybrid circuit constructed in accordance with the invention is not limited to use in communications transmission systems with equal signal frequency positioning and techniques, but can be used in a transmission system comprising transmission channels which differ from one another in respect of time slot positioning and/or frequency positioning, for example, and the hybrid circuit may be connected to a return channel for transmitted s.ignal pulses at specific instants of time and/or to give a spectral response with one given centre frequency, and to a go 10 channel for received signal pulses at other instants of time and/or to give another spectral response with another given centre frequency.
A differential amplifier may be used to feed a transistor to monitor a subscriber connection line in respect of loop closure.
In order to limit the curr~nt in a subscriber connection line r where first and second operational amplifiers are used, a threshold value element may be operated by the output signal of the first adder stage, and a transistor provided which operates in the event that a threshold value is exceeded by the output signal 20 of the adder stage, to cause the reference d.c. voltage of an operational ampl.ifier whose output is connected to said other terminal of the subscriber connection line to be changed to such an extent that the output signals of the two operational amplifiers are appxoximately equal in value, which results .in a current limit-25 ation on the subscriber connection line.
For the establishment of asymmetric current flow through thewires of the subscriber connection, such as occurs excluding the feeding in of ringing curxent, if an earth key is operated, or if there is a faulty earth connec~ion on the subscriber connection line, or even as happens in regular operation when caused by the feeding in of rlnging current, a second adder stage may be used, which is supplied with the same input voltage as the first adder stage, a second differential amplifier, with the aid of which the output voltage of the second adder stage is compared with a refer-ence voltage, and an electronic switch which is operated if the aforementioned threshold value is undershot or overshot/ to change its state of conductivity and thereby supply an indication criter-10 ion, The invention will now be described with reference to thedrawings, in which:-Figure 1 schematically illustrates a first exemplary embodi-ment of a hybrid circuit constructed in accordance with the 15 invention;
Figure ~ schematically illustrates a second exemplary embodi-ment of a hybrid circuit constructed in accordance with the invention;
Figure 3 schematically illustrates a more detailed circuit 20 diagram of a further exemplary hybrid circuit, including further advantageous features; and Figure 4 schematically illustrates yet a further exemplary embodiment of a hybrid circuit constructed in accordance with the învention.
The em~odiment shown in Figure 1 illustrates a fundamental circuit for use in connecting a two-wire transmission system to a four-wire transmission system. In the transmission system illust~
rated in the drawing, which may apply to systems for analogue signals (speech, video) or digital signals (e.g. data), a trans-formerless hybrid circui~ G constructed in accordance with the invention is provided for connecting a symmetrical two-wire line ZL
to a four-wire line VL, which comprises a return path VS and a go signal path VE, whilst simultaneously providing mutual decoupling of the two four-wire line paths, VS and VE, from one another.
In this hybrid circuit G, the symmetrical two-wire line ZL
has its two wires connected via terminals a and b to input termin-als, sa and sb o~ the return path VS of the four-wire line Vl via 10 respective elements Z/2 simulating halves of a two-wire line terminal impedance ~/2 + Z/2, which is substantially equal to the surge impedance of the two-wire line ZL. The return path VS is of syl~metrical design, i.e. at its two output terminals, sa and sb, respective input signal voltages Vs mutually opposed in phase 15 relative to a symmetrical point 0 which carries a mean potential.
The internal impedance of the return path VS which is presented between the two terminals, sa and sb, and between each of these terminals and the symmetrical point 0 will be assumed to be at least approximately negligible. When there is an input signal 20 voltage 2.Us between the two terminals sa and sb of the return path VS of the four-wire line VL, this input signal voltage is atten-uated by the two respective halves Z/2 of the two-wire line term~
inal impedance to such an extent that transmitting signal potent-ials each amounting to Us/2, but of mutually opposite sign, are 25 fed to the two texminals, a and b of the two-wire line.
The two-wire line terminals, a and b are also connected via respective resistors R to the inverting and non-inverting inputs respectively of an operational amplifier V, which leads to the go -- 10 ~
signal path V~ of the four-wire line VL. The two resistors ~ will be assumed to possess a resistance value which is high in relation to the two-wire line surge irnpedance, so that their influence upon the termination of the two wire line ZL is effectively negligible, The two inputs of the operatio~al amplifier V are connected to the two terminals sb and sa of the return path VS of the four-wire line VL via respective resistors 2R, each having a value double the resistance value of the resistors R, in a relative assignment which is the reverse to that for the two-wire line terminals, a and 10 b. Finally the inverting input (-) of the operational amplifier V
is connected to its output and the non-inverting input (~) is connected to the symmetrical point 0, each via a respective resistor vR whose resistance value is v times greater than that of the resistors R, where v is the gain of the amplifier V. The output A
15 of the operational amplifier and the symmetrical point 0 form the terminals of the go path VE oF the four-wire line VL. Here, in response to signal potentials ~ Ue/2 received via the two-wire line wires at terminals a and b (from the remote end thereof) and which have superimposed thereon any aEorementioned transmitted 20 signal potentials - Us/2, only one undistorted signal voltage v.Ve occurs, as the transmitted signal components which reach the input terminals of the operational amplifier V effectively compensate one another.
A hybrid circuit constructed in accordance with the 25 invention is not limited to use in communications transmission using line conductors, or equal frequency positions, or even sim-ilar transmission techniques on the respective lines, but may also be used in a transmission system in which the transmission channels are separate from one another in respect of time slot location an~/
or frequency location, for example, in which cas~ the hybrid cir-cuit provides connection to a return path VS for the onward trans-mission of input signal pulses received at specific points in ti~,~
and/or in a frequency spectrum with a specific centre frequency, and to a go signal channel VE or the reception and onward trans-mission of output signal pulses thereto at other points in time and/
or in a frequency spectrum with another centre frequency. The return path VS may contain a cascade arrangement of a speech signal 10 coder, formed for example by a delta modulator, and a digital signal transmitting circuit for the transmission of input signal pulses, for example at specific points of time, and the go signal c~annel VE can contain a cascade arrangement of a corresponding digital signal receiving circuit and a speech signal decoder, 15 possibly formed by a delta demodulator. The aforementioned digital signal transmitting circuit can for example emit pseudo-ternary half-element signal pulses, or so-called half bauded AMI (alternate mark inversion) signal pulses/ for which purpose it can comprise a ROM which stores instantaneous values of the input signal pulses in 20 coded form and is operated in accordance with the digital signals emitted from the speech signal coder and which feeds the corresponding instantaneous values, in their coded form, to a decoder which forms the corresponding input signal pulses on the basis thereof, as described in the German Patent 29 16 576~ '~he 25 digital signal receiving circuit can contain a regenerator ! as is fundamentally known (for example frsm the Siemens publication "PCM - Die PulsGode-l~odulation und ihre Anwendung im Fernmeldewesen"
page 15, Fig. 21) and in which a pulse extractor is used to extract from the output signal pulses a received bit pulse train which serves to define the decision times at which, in the digital signal receiving circuit, an amplitude decision is made concerning the particular status value of the bit in question; furthermore the digital signal receiving circuit can contain a received sign~l converter, which can be constructed for example by a rectifier circuit, and which converts the regenerated signals into corres-ponding delta-modulatecl or pulse-code-modulated signals. As described in the German Patent Specification No. 29 21 019, the 10 transmitted bit pulse train can be derived from the received bit pulse train and displaced in phase by one half bit time interval in comparison therewith. Circuitry details of the return path VS
and the go signal path VE have not been shown in detail in the drawing however, as such details are not necessary for an 15 understanding of the present invention.
The exemplary embodiment oE a hybrid circuit constxucted in accordance with the invention illustrated in Figure 2 contains a pair of operational amplifiers, OP1 and OP2, i.e. two amplifier units each having a differential amplifier two terminal input, a 20 very high input impedance/ a very low output impedance, and a very large no-load amplification.
I'he non-inverting inputs of the two operational amplifiers are each connected by respective circuit paths to a rererence d.c.
voltage which will be assumed to be derived from the feed voltage 25 source of a subscriber connection line which forms a two-wire line connected to terminals a and b. The non-inverting input of the operational ampliier OP2 is also connected to the signal path VE
of the four~wire line. The output of each of the two operational amplifiers has a feedback path via a respective resistor, Rrl and Rr2, to its inverting input. The output of the operational amplifier OP2 is also connected via a resistor RK to the inverting input of the operational amplifier OP1.
The output of the operational amplifier OP1 is connected via a resistor RF to the terminal a ~the two-wire subscriber connection line ~ conductor)~ Similarly, the output of the operational amplifièr OP2 is connected to the terminal (the subscriber conn-ection line b conductor) via a further resistor RF, which is 10 preferably of the same resistance value as the first mentioned resistor RF. The subscriber connection line will be assumed to serve to connect a subscriber station (not shown) to the associated exchange-side subscriber connection l~ne, of which the described hybrid circuit forms a part.
A differential amplifier A1 represents a further component of this embodiment of the hybrid circuit/ and its non-inverting input is connected via a resistor R1 to the output of the afore-mentioned operational amplifier OP1, and also connected via a resistor R3 to the terminal b Similarly, the inverting input of 20 the differential amplifier A1 is connected via a resistor R2 to the output of the operational amplifier OP2, and is connected via ~ ,~
a resistor R4 to the terminal .~ Feedback is provided from the output of the differential amplifier to its inverting input via a further resistor Rr. The output is also connected to the go-signal 25 path VS of the four-wire line.
As will be seen from Figure 3, the circuit arrangement of Figure 2 can be further developed in various ways in order that it may undertake various monitoring ~unctiOns For loop closure a~;
monitoring of the subscriber connection line which comprises an a-wire and b-wire connected to terminals a and b, a second differer,t-ial amplifier A2 is provided, whose inverting input is connected to the output of the first differential amplifier A1, and wh~se non-inv2rting input is connected to a d.c. reEerence voltage. A
transistor Q1 has its control electrode connected to the output of the second differential amplifier A2. The circuit parameters, thus in particular the amplification of the differen~-ial amplifier A1, the reference voltage connected to the non-inverting input of 10 the second differential amplifier A2, and the bias voltage of the aforementioned transistor Q1, are selected to be such that when the subscriber loop is closed via the hook switch of the subscriber station, the current which then flows produces an output signal in the first differential amplifier Al which undershoots the relerence 15 voltage in the second differential amplifier, so ~hat the second differential amplifier A2 emits an output signal which b~ings the transistor Q1 into its conductive state to indicate the existence of loop closure, as will be shown by appropriate analysis of the collector potential OFFH which then prevails. The differential 20 amplifier properties of the amplifier A2 and the amplitude relat-ionship between the alternating currents which occur on the subscriber connection line and the d.c. comparator voltage ensure that these alternating currents do not influence the aforementioned indication of loop closuxe.
To limit the current flowing in the subscriber connection line, then, as is shown in Figure 3, a threshold value element is provided in the form of a diode D1, which is normally biased in the block~ng direction by a voltage divider composed of resistors R5, R6, and R7, and which serves to operate a transistor Q2 whose control circuit contains the diode D1. The threshold value ele-ment is supplied with the output voltage of the first differential amplifier A1 via a filter element composed of a resistor RS and a capacitor C~ If an impermissibly high current flows in the sub-scriber connection line, the output voltage of the first difer-ential amplifier A1 exceeds the threshold value of the threshold value element, and the diode D1 thereby becomes conductive, where-upon the associated change in voltage in the control circuit of the 10 transistor Q2 leads to a change in the conductivity state of said transistor Since the collector of this transistor is also connected to the terminal via which the first operational amplifier OP1 is supplied with a reference voltage, such a change in conduct i~ity also results in a change in the reference ~oltage to such an 15 extent that the output voltages of the opera~ional amplifiers OP1 and OP2 become approximately equal, resulting in a reduction in the ~oltages between the a-wire and b~wire of the subscriber connection line. As desired, this in turn leads to a limitation of the current flow in the two-wire subscriber connection line.
The circuit arrangement illustrated in Figure 3 is further equipped in such manner that, in addition to the aforementioned functions, it is possible to establish,if there is any asymmetry of the current which flows via the wires of the subscriber connection line. Such asymmetry occurs when ringing curxent is 25 fed into the subscriber connection line, or may occur in the absence of such ringing current injection, if an earth key is actuated, or the b-wire is connected to earth by a low value resistance path as -a result of an insulation failure, for example. To detect this condition a third differential amplifier A3 is provided to drive a fourth differential amplifier A4 and so control an electronic s~itch in the form of a transistor Q3. The inputs of the differ-ential amplifier A3 are supplied via a network which is the same as that for the first differential amplifier A1, so that it is subjected to the same input voltages. ~he fourth differential amplifier A4 is used as a comparator, which compares the output voltage of the differential amplifier A3 with a reference voltage.
The output signal of the fourth differential amplifier A4 serves 10 as control signal for the transistor Q3. The circuit paramete~s are selected to be such that whenever there is any asymmetry of the d.c. flow on the subscriber connection line, the output voltage of the differential amplifier A3, which voltage is proportional to said asymmetry, undershoots the predetermined threshold value, so 15 that the output signal emitted from the differential amplifier A4 switches over the transistor Q3 into its conductive state' and the collector potential GK of said transistor can then be evaluated as an indication of the aforesaid asymmetry. In this context a capacitor CR is pro~ided .in a shunt path which bridges the feedback 20 resistor R_4 of the di~ferential amplifier A3, and prevents the presence of any a.c. signals on the subscriber connection line being evaluated as an indication of asymmetry.
In the circuit arrangement illustrated in Figure 3 it is possible to withdraw the application of operating voltage from 25 the subscriber connection line by means of a signal PDWN that is applied to the connection point o~ the voltage divider resistors R5 and R6, for example in the form of a potential change from +5 to earth potential. This causes the transistor Q2 to go non-
3 ~ D
conductivel whereby the referei~ce voltage for the operational amplifier OP1 changes to such an extent that approximately the same potential occurs at its output as is preser.t at the output of the operational amplifier OP2, and thus the potential difference between the _-wire and the b-wire of the subscriber connection line becomes approximately zeroO
Figure 4 illustrates a further alternative exemplary embodi-ment of a hybrid circuit constructed in accordance with the inventionl basically similar to that illustrated in Figure 3I but 10 having the differential amplifiers A1 and A3 of Figure 3 and their associated input resistors replaced by respective adder stages, ~, S1 and S~. It is possible to use modules constructed as integrated circuits, as no close tolerance resistors ~re required, and the total internal impedance can be relatively low (~elow 200 KOhm).
With the exception of the aforementioned adder stages the arrangement is fundamentally identical to those shown in Figures 2 and 3, as regards the construction of the hybrid circuit itself, and may include the circuit components which exert the additional functions described with reference to Figure 3.
The adder stages S1 and S2 each recelve the same set of input signals, hut produce different output signals, VS and V~.
The operational amplifiers OP1 and OP2 produce respective output voltages VA and VB which are each fed to respective inputs of the adder stages. The b~wire and the a-wire of the two-wire line are respectively connected to the remaining two inputs of each of the 25 adder stages. As the voltage which drops across the resistor RF1 has the value VR-VA, a curr~nt I of value (VR~VA) /RF1 f lows through this resistor. The current I flowing throuyh the resistor RF2 has the value ~VI'-VB)/RF2. In the adder stage 1 the current I(RF1) is subtracted from the current I(RF2). Assuming that RF1=RF2=RF, therefore we have VS=K(VB+VR-VA-VT~
In the adder stage 2 an addition of the currents I(RF1~ and I(RF2) takes place. Given the same condition with regard to the resistors ~F1 and RF2, as stated above, we then have:
VC=K(VT~VR-VA-VB) In the above equations X represents a constant which is dependent 10 upon the amplification actor of the adder stage in question, and upon the resistance value RF.
Therefore as a result of the input voltages VA, VB, VT and VR, the adder stages S1 and S2 emit the respective output voltages VS and VC. These adder stages are known ~er se, and can be 15 constructed particularly successfully as integrated circuits.
As will be seen ~rom Fiyure 4, the output signal VC can be fed to the differential amplifier A4 via a low-pass filter LP in order to withhold interference voltages from the following thres-holcl value element Q3.
conductivel whereby the referei~ce voltage for the operational amplifier OP1 changes to such an extent that approximately the same potential occurs at its output as is preser.t at the output of the operational amplifier OP2, and thus the potential difference between the _-wire and the b-wire of the subscriber connection line becomes approximately zeroO
Figure 4 illustrates a further alternative exemplary embodi-ment of a hybrid circuit constructed in accordance with the inventionl basically similar to that illustrated in Figure 3I but 10 having the differential amplifiers A1 and A3 of Figure 3 and their associated input resistors replaced by respective adder stages, ~, S1 and S~. It is possible to use modules constructed as integrated circuits, as no close tolerance resistors ~re required, and the total internal impedance can be relatively low (~elow 200 KOhm).
With the exception of the aforementioned adder stages the arrangement is fundamentally identical to those shown in Figures 2 and 3, as regards the construction of the hybrid circuit itself, and may include the circuit components which exert the additional functions described with reference to Figure 3.
The adder stages S1 and S2 each recelve the same set of input signals, hut produce different output signals, VS and V~.
The operational amplifiers OP1 and OP2 produce respective output voltages VA and VB which are each fed to respective inputs of the adder stages. The b~wire and the a-wire of the two-wire line are respectively connected to the remaining two inputs of each of the 25 adder stages. As the voltage which drops across the resistor RF1 has the value VR-VA, a curr~nt I of value (VR~VA) /RF1 f lows through this resistor. The current I flowing throuyh the resistor RF2 has the value ~VI'-VB)/RF2. In the adder stage 1 the current I(RF1) is subtracted from the current I(RF2). Assuming that RF1=RF2=RF, therefore we have VS=K(VB+VR-VA-VT~
In the adder stage 2 an addition of the currents I(RF1~ and I(RF2) takes place. Given the same condition with regard to the resistors ~F1 and RF2, as stated above, we then have:
VC=K(VT~VR-VA-VB) In the above equations X represents a constant which is dependent 10 upon the amplification actor of the adder stage in question, and upon the resistance value RF.
Therefore as a result of the input voltages VA, VB, VT and VR, the adder stages S1 and S2 emit the respective output voltages VS and VC. These adder stages are known ~er se, and can be 15 constructed particularly successfully as integrated circuits.
As will be seen ~rom Fiyure 4, the output signal VC can be fed to the differential amplifier A4 via a low-pass filter LP in order to withhold interference voltages from the following thres-holcl value element Q3.
Claims (16)
- THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
l. A transformerless hybrid circuit for connecting a two-wire line to an input-arm and an output-arm of go and return paths of a four-wire line with simultaneous decoupling of the go path and return path from each other, wherein the return path is symmetrically designed and is connected to the two-wire line through an impedance circuit adapted to the two-wire line, and the two-wire line is connected to the go path of the four-wire line through an input-signal subtraction circuit, characterized in that one wire of the two-wire line, which is connected, through an impedance which is substantially equal to half the surge impedance of the symmetrical two-wire line, to one terminal of the return path, which has a low impedance at least in respect of alternating cur-rent, is connected through a first resistor of high resistance value to one input-terminal of a first operational amplifier leading to the go path of the four-wire line, which input-terminal is also connected, through a second re-sistor of high resistance value, to the other terminal of the return path, and in that the other wire of the two-wire line, which is connected, through an impedance substantially equal to half the surge impedance of the two-wire line, to this other terminal of the return path of the four-wire line, is connected through a third resistor also of high resistance value, to the other input-terminal of said first operational amplifier, which input-terminal is connected, through a high resistance fourth resistor, to the said one terminal of the return path, the inverting input of said first operational amplifier being connected to the output therefrom through a high resistance resistor, and the non-inverting input of said first operational amplifier being connected to a line-symmetry point through a high resistance resistor. - 2. A transtormerless hybrid circuit as claimed in Claim 1, in which said first resistor and said third resistor have equal values, said second resistor has a value that is double the value of said first resistor, and that said fourth resistor has a value that is double the value of said third resistor and said respective other relatively high value resistors each have a resistance value that is v times higher than that of said first resistor, where v is the amplification factor of said first operational amplifier.
- 3. A transformerless hybrid circuit as claimed in Claim 2, in which the non-inverting inputs of second and third operational amplifiers located in the input arm from the return signal path are each connected to a d.c. reference voltage, the noninverting input of said second operational amplifier being connected to receive signals in the input arm from the return path, and the output of this second operational amplifier being connected via a resistor to said one terminal of said two-wire line and via a further resistor to the inverting input of the third operational amplifier whose output is itself connected via a resistor to said other of said two terminals of the two-wire line.
- 4. A transformerless hybrid circuit as claimed in Claim 3, in which means are provided to monitor the loop closure of the subscriber connection line, comprising a first differential amplifier having its inverting input connected to the output of the first operational amplifier and its non-inverting input connected to a reference voltage, the output of the first differential ampli-fier being connected to the control electrode of a transistor, associated circuit parameters being such that the transistor changes its conductivity state whenever the output signal from the first operational amplifier under-shoots the reference voltage.
- 5. A transformerless hybrid circuit as claimed in Claim 3, in which means are provided for the limitation of current flow in the subscriber connection line, comprising a threshold value ele-ment which is operated by the output signal from the first oper-ational amplifier, and controls a transistor which changes its conductivity state when the output signal from the first operat-ional amplifier overshoots a threshold value, and the d.c. refer-ence voltage of the third operational amplifier whose output is connected to said other terminal of said two-wire line changes to such an extent that the output signals of the second and third operational amplifiers are substantially mutually equal.
- 6. A transformerless hybrid circuit as claimed in Claim 3, in which means are provided for detecting any asymmetry of current flow in the conductors of the two-wire line, comprising a fourth operational amplifier, to whose inputs are supplied the input voltages fed to said first operational amplifier, and in which there is provided a second differential amplifier which serves as comparator for comparing the output signal of the fourth operation-a1 amplifier with a reference voltage and controls an electronic switch to change its conductivity state whenever the output of said fourth operational amplifier differs from the aforementioned reference voltage by a predetermined amount.
- 7. A transformerless hybrid circuit as claimed in Claim 1, in which said go and return signal paths are selectively connected for the transmission and reception of signal pulses at respective different points in time, and/or in frequency spectra with resp-ective different centre frequencies.
- 8. A transformerless hybrid circuit for connecting a two-wire line to an input-arm and an output-arm of go and return paths of a four-wire line with simultaneous decoupling of the go path and return path from each other, wherein the return path is sym-metrically designed and is connected to the two-wire line through an impedance circuit adapted to the two-wire line, and the two-wire line is connected to the go path of the four-wire line through an input-signal subtraction circuit comprising a first adder stage, characterized in that one wire of the two-wire line, which is connected, through an impedance which is substantially equal to half the surge impedance of the symmetrical two-wire line, to one terminal of the return path, which has a low imped-ance at least in respect of alternating current, is connected to a first input-terminal of said adder stage, in that the other wire of the two wire-line, which is connected, through an impedance substantially equal to half the surge impedance of the two-wire line, to the other terminal of the return path of the four-wire line, is connected to a second input of said first adder stage, said terminals of the return path being connected to third and fourth terminals of said first adder stage, said adder stage having an output connected to said go path of said four-wire line.
- 9. A transformerless hybrid circuit as claimed in Claim 8 wherein said first adder stage comprises a first operational amplifier having first and second inputs and an output, and a plurality of resistors connected to said inputs.
- 10. A transformerless hybrid circuit as claimed in Claim 9, in which the non-inverting inputs of second and third operational amplifiers located in the input arm from the return signal path are each connected to a d.c. reference voltage, the noninverting input of said second operational amplifier being connected to receive signals in the input arm from the return path, and the output of this second operational amplifier being connected via a resistor to said one terminal of said two-wire line and via a further resis-tor to the inverting input of the third operational amplifier whose output is itself connected via a resistor to said other of said two terminals of the two-wire line.
- 11. A transformerless hybrid circuit as claimed in Claim 10, in which means are provided to monitor the loop closure of the subscriber connection line, comprising a first differential amp-lifier having its inverting input connected to the output of the first operational amplifier and its non-inverting input connected to a reference voltage, the output of the first differential amp-lifier being connected to the control electrode of a transistor, associated circuit parameters being such that the transistor changes its conductivity state whenever the output signal from the first operational amplifier undershoots the reference voltage.
- 12. A transformerless hybrid circuit as claimed in Claim 10, in which means are provided for the limitation of current flow in the subscriber connection line, comprising a threshold value ele-ment which is operated by the output signal from the first opera-tional amplifier, and controls a transistor which changes its conductivity state when the output signal from the first operation-al amplifier overshoots a threshold value, and the d.c. reference voltage of the third operational amplifier whose output is con-nected to said other terminal of said two-wire line changes to such an extent that the output signals of the second and third operat-ional amplifiers are substantially mutually equal.
- 13. A transformerless circuit as claimed in Claim 11, in which means are provided for detecting any asymmetry of current flow in the conductors of the two-wire line, comprising a second adder stage, to whose inputs are supplied the input voltages fed to said first adder stage, and in which there is provided a second differential amplifier which serves as comparator for comparing the output signal of the second adder stage with a reference volt-age and controls an electronic switch to change its conductivity state whenever the output of said fourth operational amplifier differs from the aforementioned reference voltage by a predeter-mined amount.
- 14. A tranformerless hybrid circuit as claimed in Claim 13 in which the second adder stage is in the form of a differential amplifier whose inputs are each connected to the aforementioned circuit points via respective resistors.
- 15. A transformerless hybrid circuit as claimed in Claim 10 or 13, in which the output signal of the first adder circuit is proportional to the value VB + VR - VA - VT, where VR and VT
designate the voltages of the respective conductors of said two-wire line and VA and VB represent the respective output voltages of the first and second operational amplifiers. - 16. A transformerless hybrid circuit as claimed in Claim 13, in which the output voltage of the second adder stage is proport-tional to the value VT + VR - VA - VB, where VR and VT designate the voltages of the respective conductors of said two-wire line, and VA and VB designate the respective output voltages of the first and second operational amplifiers.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13781080A | 1980-04-04 | 1980-04-04 | |
| US137,810 | 1980-04-04 | ||
| DEP3019882.4 | 1980-05-23 | ||
| DE19803019882 DE3019882C2 (en) | 1980-05-23 | 1980-05-23 | Transformer-free hybrid connection |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1181186A true CA1181186A (en) | 1985-01-15 |
Family
ID=25785653
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000374518A Expired CA1181186A (en) | 1980-04-04 | 1981-04-02 | Transformerless hybrid circuits |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP0037518B1 (en) |
| AR (1) | AR228148A1 (en) |
| CA (1) | CA1181186A (en) |
| MX (1) | MX151720A (en) |
| SU (1) | SU1568898A3 (en) |
| UA (1) | UA5976A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6169801B1 (en) | 1998-03-16 | 2001-01-02 | Midcom, Inc. | Digital isolation apparatus and method |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3040263C2 (en) * | 1980-10-24 | 1982-07-15 | Siemens AG, 1000 Berlin und 8000 München | Analog / digital telecommunications subscriber station |
| US8385538B2 (en) * | 2008-12-10 | 2013-02-26 | Utc Fire & Security Americas Corporation, Inc. | Method, system, and apparatus for a differential transformer-free hybrid circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2160308B1 (en) * | 1971-11-19 | 1977-01-28 | Labo Cent Telecommunicat | |
| DE2607480C2 (en) * | 1976-02-20 | 1982-11-25 | Deutsche Telephonwerke Und Kabelindustrie Ag, 1000 Berlin | Circuit arrangement for a fork |
| JPS5921237B2 (en) * | 1978-02-01 | 1984-05-18 | ミテル・コ−ポレ−シヨン | telephone line circuit |
-
1981
- 1981-03-25 EP EP81102244A patent/EP0037518B1/en not_active Expired
- 1981-04-02 CA CA000374518A patent/CA1181186A/en not_active Expired
- 1981-04-03 SU SU813267877A patent/SU1568898A3/en active
- 1981-04-03 MX MX186710A patent/MX151720A/en unknown
- 1981-04-03 UA UA3267877A patent/UA5976A1/en unknown
- 1981-04-03 AR AR284867A patent/AR228148A1/en active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6169801B1 (en) | 1998-03-16 | 2001-01-02 | Midcom, Inc. | Digital isolation apparatus and method |
Also Published As
| Publication number | Publication date |
|---|---|
| UA5976A1 (en) | 1994-12-29 |
| AR228148A1 (en) | 1983-01-31 |
| EP0037518B1 (en) | 1984-02-15 |
| SU1568898A3 (en) | 1990-05-30 |
| EP0037518A1 (en) | 1981-10-14 |
| MX151720A (en) | 1985-02-15 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |