CA1157517A - Current limiter for switched dc-to-dc converter - Google Patents

Current limiter for switched dc-to-dc converter

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Publication number
CA1157517A
CA1157517A CA000364049A CA364049A CA1157517A CA 1157517 A CA1157517 A CA 1157517A CA 000364049 A CA000364049 A CA 000364049A CA 364049 A CA364049 A CA 364049A CA 1157517 A CA1157517 A CA 1157517A
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CA
Canada
Prior art keywords
voltage
value
converter
modulator
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000364049A
Other languages
French (fr)
Inventor
Neale A. Zellmer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GTE Communication Systems Corp
Original Assignee
GTE Automatic Electric Inc
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Publication date
Application filed by GTE Automatic Electric Inc filed Critical GTE Automatic Electric Inc
Priority to CA000364049A priority Critical patent/CA1157517A/en
Application granted granted Critical
Publication of CA1157517A publication Critical patent/CA1157517A/en
Expired legal-status Critical Current

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Abstract

CURRENT LIMITER FOR SWITCHED DC-TO-DC CONVERTER

by NEALE A. ZELLMER

ABSTRACT OF THE DISCLOSURE

A switched DC-to-DC converter in a power supply is powered by input line current from an external power source and driven by voltage pulses from a variable duty cycle pulse width modulator for converting a DC input voltage to a DC supply voltage of a different value that is applied to a load impedance.
A comparator monitors the supply voltage for producing an error voltage that biases the modulator for adjusting the width of the voltage pulses, and thus the duty cycle of the converter, for maintaining the supply voltage relatively constant. An RC circuit integrates the voltage pulses for producing an indication of the average value thereof, which is directly related to the value of line current drawn by the converter. When the average value of voltage pulses exceeds a reference voltage, the value of bias voltage is limited for establishing the maximum width of voltage pulses and duty cycle of the converter, and thereby limit the the maximum line current drawn by the power supply.

Description

1~$ 1$J~7 1 CURRENT LIMITER FOR SWITCHED DC-to-DC CONVERTER

3 B~C~GROUND OF INVENTION

6 This invention relates to a regulated power supply 61 roviding a relatively constant supply voltage to a load impedance, 7 and more particularly to method and apparatus providing overload 81 rotection for a regulated power supply.
9 A power supply for converting an input line voltage to a 10 relatively constant supply voltage of a different value that is 11¦ pplied to a load impedance generally comprises a DC-to-DC converter 12 that is powered by input line current from an external voltage 13 source, a pulse width modulator producing voltage pulses that drive 14¦ he converter, and a voltage comparator. As the load impedance lS decreases, the supply voltage also decreases, as does the effective 16 input impedance of the power supply. In order to maintain the 17 supply voltage relatively constant under such load conditions, the 1~ comparator monitors the supply voltage for producing an error volt-19 age that ~iases the modulator for increasing the width of voltage 20 pulses, and thus the time interval that the converter draws line 21 urrent. This operation causes the magnitude of line current drawn 22 y the converter to increase. As the load impedance decreases from 23 light load (a high load impedance), the converter draws increasing 24 alues of line current and input power from the external source ~6 ntil the input impedance of the power supply i5 equal to the output 26 mpedance of the source. At this point, the source delivers maximum 27 ower to the power supply. Although a further decrease in load 29 mpedance causes the po~er supply to demand additional input power, D-22214~
1 1~ 75~

1 the external source delivers additional input line current an] less
2 input power to -the power supply. In order to prevent an overload
3 condition (i.e., a low value of load impedance) locking-up the
4 operation of the power supply such that it will not restoreitsel~
5 to normal re~ulation until it is entirely unloaded, the maximum
6 value of line current must be limited. It is also desirable that
7 the efficiency of the power supply be high so that maximum output
8 power is delivered to the load. This is particularly important in
9 a carrier subscriber telephone system where one power supply in a
10 subscriber terminal services a plurality of subscriber station
11 units (e.g., six) and associated handsets clustered at a common
12 location. Since all of the six handsets are seldom off-hook at
13 the same time in such an application, the load impedance under 1~ normal operating conditions typically varies from a high impedance 15 such as 88 ohms when all handsets are on-hook to a low impedance 16 such as 44 ohms when all six handsets are off-hook, A prior art 17 current limiter senses the line current itself with a series 18 resistor for limiting the maximum value thereof that is drawn by 19 the power supply. This prior art technique wastes power in the 20 series resistor which might better be converted to useful power 21 that is delivered to the load.
22 An object of this invention is the provision of 23 ethod and apparatus for indirectly sensing the magnitude of input 24 urrent drawn by a power supply for limiting -the maximum value hereof.
~6 ~Z - 2 -D-~221~
~5'~5~7 1 SUMMARY OE' INVENTION

3 In a power supply including a DC-to-DC converter that 4 produces a DC supply voltage and is driven by voltage pulses from 5 a modulator that is responsive to an error voltage for varying the 6 width of the voltage pulses (and thus the duty cycle of the 7 converter) for maintaining the supply voltage relatively constant, 8 method and apparatus embodying this invention monitors the voltage 9 pulses for producing a time varying measure of the width thereof.
10 When the measure exceeds a prescribed value, the width of voltage 11 pulses is limited to a maximum value for establishing the maximum 12 duty cycle of the converter and limiting the magnitude of input 13 current drawn by the power supply.
14 PRE~ERRED E~BODIMENTS

17 The single figure of drawing here is a schematic circui-t 18 and block diagram of a power supply 3 embodying this invention 19 and energized by the output signal of an external source 5 of DC
20 voltage. In an application where the power supply 3 services a 21 plurality of channel units and associated handsets clustered at a 22 single location in a carrier subscriber telephone system, the 23 voltage source 5 may comprise a line terminating network having 24 output terminals connected to lines 7A and 7B and input terminals 25 connected on a cable pair of variable length to central office battery equipment. Since the length of the cable pair and 27 associated equipment are not the same for all applications, the 28 line terminating network includes a voltage regulator for ~2 - 3 1 ~L 5 r7 ~ ~ 7 1 converting a DC voltage on the cable pair that may vary from 120V
2 to 250V to a relatively constant DC voltage of 120V to 140V on 3 lines 7A and 7B. The output impedance of the source 5 is 4 relatively large.

6 The power supply 3 compxises a DC-to-DC converter 11 7 that is driven by modulator 12,an oscillator 13,comparator circuit 8 14,starter circuit 15,and a control circuit 17. The feedback loop 9 in the power supply comprises converter 11, comparator 14, 10 amplifier 19, and modulator 12. This loop is designed to maintain 11 the supply voltage Vs relatively constant as the load impedance 12 ~ varies. The circuits 11~15, other than the control circuit 17, 13 are conventional.
14 This power supply is essentially a constant frequency switching
15 regulator in which the length of the energy storage state of the
16 converter is shortened or lengthened as the load impedance gL
17 increases and decreases, respectively. In an application where 1~ such a power supply serviced 6 channel units, the load impedance 19 varied from 88 ohms when all 6 handsets were on-hook to 44 ohms 20 when all 6 handsets were off-hook. It is desirable that the power 21 supply maintain Vs relatively constant, and also provide overload ~2 protection that limits line current drawn by the power supply to a ~3 maximum value such at 65 miliamperes at times other than initial 24 start-up of the power supply.

26 The modulator 12 and oscillator 13 are energized by a 27 DC supply voltage of approximately 7V on bus 26. Such a bus 28 voltage causes the oscillator to produce fixed frequency clock ~ D-22214 I ll5'~5~

1 pulses on line 28 that key the modulator ~or fixing the times 2 that it produces output voltage pulses 34 on line 30. The 3 switching frequency of the modulator is preferably constant in order to accurately contxol the modulator pulse width and provide 5 more efficient operation of the power supply. A DC control 6 voltage Vc on line 38 changes a threshold voltage in the modulator 7 for varying the time interval for a charge voltage on a timing 8 capacitor thereof to exceed this threshold voltage in order 9 to vary the width of output pulses 34. As is described more fully 10 hereinafter, a decrease in 3L causes an increase in Vc and thus 11 the width of the voltage pulses 34. Pulse width modulators are 12 described in the articles "Packaged Pulse-Width Modulator 13 Simplifies Series-Switching Regulator Design" by John Svalbe, 14 Electronic Design 19, September 14, 1972 page 162, and "Constant Period With Variable Duty Cycle Obtained From Timer With Single 16 Control," by Rober W. Hilsher, Electronic Design 14, July 5, 1975, 17 page 72. The oscillator also produces a buffered pulse output
18 signal on line 29.
19 ~0 The converter 11 is energized by an input voltage on 21 lines 7A and 7B and is responsive to voltage pulses 34 on line 30 22 for producing prescribed DC output signal voltages on lines 41-430 23 The converter may be a shunt swinging choke type switching 2g converter including a transformer having a plurality of secondary windings that may be connected to associated rectifiers and 26 regulators for producing the prescribed signal voltages. This 27 type switching converter is described in "DC-DC Converter Using ~8 IC Timer" by Robert Solomon and Robert Broadway, Electronic Design ~9 News, September ~, 1973, pages 87-91, and "Switching Supply 31 Converts -60V to ~5 and -6.3V With 83~ Efficiency" by 32 ~ _ 5 ~ 115'~517 ~ ¦Philip M. Cowett, Jr., Electronic Design 2, January 18, 1978, 2 ¦page 106. The 8V DC supply voltage on line 41 is connected to bus 31 26 for powering the oscillator and modulator~ The constant 16V DC
41 signal voltage Vs on line 43 is applied to the load.

61 When the power suppl~ is initially connected to a DC
ql input voltage suoh as 140V on lines 7A and 7B, starter circuit 15 81 is operative for producing a constant 7V DC signal voltage on line 9¦ 46 that raises the bus 26 voltage sufficiently to energi~e the 0¦ oscillator and modulator for producing voltage pulses 34 on line ¦ 30. Voltage pulses 34 drive converter 11 for causin,g it to 2¦ produce the 8V bus signal on line 41 and bus 26 which then powers 13¦ the oscillator and modulator. The starter circuit 15 is turned 14~ off by buffered output pulses 36 from the oscillator in order to conserve energy. The starter circuit 15 may comprise the emitter-16' collecter path of a transistor and a Zener diode that are 17 electrically connected in series across the input lines 7 as is a 18 voltage divider having a tap connected to the base electrode of the 19 transistor, its collecter being connected to bus 26. The output line 29 of the oscillator is connected to the base of the transitor 21 for turning it off.

23 The comparator circuit 14 comprises a DC bridge 24 consisting of resistors R31, R32 and R33, junction diode D23, and a 5.6V Zener diode D22, the comparison nodes 72 and 73 of the 26 bridge being connected to associated base electrodes of 28 differential amplifier transistors Ql9 and Q20. The voltage ~0 115'~5~7 1 divider R31-R32 divides a supply voltage Vs = 16V down to 2 approximately 2/3 Vs = 6.4V at node 72. This means that 3 approximately two-thirds of any change in Vs is reflected to 4 the Ql9 base. A fixed voltage drop of approximately 6.2V is developed across the Zener D22 and temperature compensating 6 diode D23 for establishing a reference voltage of approximately 7 9.8V at node 73 when Vs = 16V. The full voltage change in Vs 8 will be translated to node 73 by this circui-t arrangement. This 9 means that approximately one-third of the change in Vs is available for driving the differential amplifier Ql9-Q20. The 11 output of the differential amplifier is optically coupled from an 12 LED (light emitting diode) 25 to an associated photo-transistor 13 Qp that conducts through R25. This circuit arrangement provides 14 improved isolation and noise immunity in the power supply. The bias voltage at node 73 forwarded biases Q20 for providing an 16 offset current in the LED which establishes conduction of Qp. The lq output of the comparator is filtered by C23 and amplified by 18 differential operational amplifier ~5 for producing the control 19 voltage Vc that drives the modulator.
21 The control circuit 17 measures the average value of 22 the modulator output signal for limiting the maximum width of ~3 pulses 34 to a value allowing no more than a prescribed current 24 to be drawn on lines 7A and 7B by the converter. The control circuit comprises bootstrap transistors Q17 and Q18; a voltage ~6 divider R28-Dl9-R29 that is connected between the bus 26 and 27 line 7A' for establishing a reference voltage VR on the Q17 28 emitter electrode; and an integrator circuit R27-C25 connected ~0 ~2 - 7 1 11575~7 1¦ between the modulator output line 30 and line 7A'. The 2 ¦temperature compensating diode Dl~ and resistors R28 and R29 3 ¦divide an 8V bus voltage down to approximately 2.3V at node 75 ¦and the Q17 emitter. The resistor R27 and capacitor C25 integrate ~ the voltage pulses 34 for producing an indication of the average 6 value thereof at node 76 and the Q17 base.
8 When the load impedance ZL is high the 16V supply 9 voltage Vs on line 43 turns on Ql9 and Q20 for causing the LED 25 and photo-transistor to establish a prescribed signal voltage at 11 node 74 that is translated to line 38. The resultant control 12 voltage Vc causes the modulator to produce voltage pulses 34 ~3 having a width that is sufficient for driving the converter such 14 that it produces the desired output voltage Vs ~ A decrease in ~L causes a decrease in Vs and the net voltage applied to the 16 differential amplifier. This decreases conduction of Q20, LED25, 17 and Qp for increasing the voltage at node 74, the control voltage 18 V and thus the threshold voltage in the modulator. Since it 19 now takes longer for the timing capacitor in the modulator to charge to this increased threshold voltage, the width of voltage 21 pulses 34 increases. This causes the duty cycle of the converter 22 to increase so that it draws current on lines 7A and 7B for a 23 longer time interval and stores more energy in magnetic fields 2~ thereof for maintaining Vs relatively constant. Thus, it is seen ~5 that the widths of voltage pulses 34 are proportional to and 26 measures of the magnitude of central office line current drawn 27 by the power supply. The elements R27-C25 continually integrate 28 these voltage pulses 34 for producing a charge voltage on C25 ~0 32 _ _ D-22Zl~
11~5~7 l that is a measure oE the a~erage value thereof. 3uring normal 2 load conditions, this charge voltage on C25 is not sufficient to 3 turn on the bootstrap circuit.

If an overload is inadvertently applied across lines 6 43 and 48 the feedback circuit operates to increase the width of 7 voltage pulses 34, the duty cycle of the converter, and the 8 magnitude of line current drawn by the power supply. This 9 operation also causes the charge voltage on C25 to increase.
When this charge voltage raises the node 76 potential to ll approximately 2.8V, the base-emitter junction diode of Ql7 is 12 forward biased (the node 75 is set at approximately 2.5V by the ~3 voltage divider R28-Dl9-R29). This causes Q17 to conduct lightly.
14 Since the overall gain of the bootstrap transistors is high, the small base current in Q17 causes Q18 to conduct heavily through 16 ~25 to gradually set the node 7~ voltage at a fixed value. Any 17 further increase in the width of voltage pulses 34 causes Ql7 and 18 Ql8 to conduct more heavily in the active region to clamp node lg 74 to a fixed voltage which sets the maximum control voltage Vc, the maximum width of voltage pulses 34, the maximum duty cycle of 21 of the converter, and thus the maximum line current drawn by the 2~ power supply and converter.

24 The control circuit 17 is designed to establish the current limiting function for a load impedance that is less than 26 a certain value for which the equivalent input impedance of 27 converter 11 i5 approximately equal to the equivalent output 28 impedance of the source 5. A power supply embodying this 29 invention was built and successfully operated for powering 6 ~0 1 115't5 ~7 1 ¦ channel units and associated handsets in the subscriber terminal of 2 ¦ a carrier suoscriber telephone system where the load impedance 3 ¦ ~L varied from 88 ohms to 44 ohms when the 6 handsets were all 4 ¦on-hook and off-hook, respectively. The control circui-t 17 there 5 ¦was designed to limit the potential at node 74 to a fixed value 6 ¦ for a load impedance of 53 ohms, which corresponded to 4 handsets 7 ¦being off-hook and 2 on-hook. At this point, the power supply 8 ¦becomes a constant power source instead of a constant vol-tage 9¦ source. Any further decrease in load impedance causes a fall-off 10 ¦in supply voltage Vs on line 43. In this power supply, the control 11 ¦voltage Vc varied between SV and 6V, depending on the load. This 1~¦ caused the width of the pulses 34 to vary from approximately 13¦ 2 to 6 micro-seconds, the latter pulse width corresponding to a 1~¦ 45~duty cycle since the clock pulse rate was 71 KHz.

16¦ Although this invention is described in relation to 17¦ preferred embodiments thereof, variations and modifications will 18¦ occur to those skilled in the art. By way of example, the power 19¦ supply may be used in applications other than a carrier
20¦ subscriber telephone system. Also, the magnitude of line current
21¦ drawn by the power supply may be monitored by measuring the
22¦ width of voltage pulses 34 rather than the average value thereof.

231 This operation may be performed by analog techniques with a 241 constant current ramp generator, or digitally with a resetable timing circuit or counter. Additionally, the bootstrap circuit 26 may be replaced with digital gate circuitry for coupling one or 27 the other of the output of comparator 14 and a fixed clamp 2B vo age to node 74. Further, other types of comparator and ~ D-2214 l 11~75~7 I

l¦ starter circuits may be employed here. By way of example, the 21 starter circuit 15 and line 41 may be eliminated by connecting the 31 bus 26 to an 8V DC signal from an external source when the 41 converter is connected to lines 7A and 7B~ Also, R29 may be ~¦ replaced by a Zener diode. The scope of this invention is 61 therefore determined by the appendant claims rather than the ~ aforementioned detailed description.

l7 ~9 l

Claims (12)

What is claimed is:
1. In a power supply including a pulse width modulator; a DC-to-DC converter that is powered by input line current from an external source, is driven by voltage pulses from the modulator, and is operative for converting a DC input voltage from the source to a first DC voltage for driving a load impedance; and comparator means responsive to variations in the magnitude of the first voltage from a prescribed value for producing an error voltage for driving the modulator to vary the width of voltage pulses and thus the converter duty cycle and value of line current drawn by the converter, the improvement comprising:
first means for producing a reference signal with a parameter having a value that is a measure of a maximum value of line current that is to be drawn by the power supply, and;
second means responsive to the reference signal and to the voltage pulses for limiting the maximum width of the latter for limiting the maximum value of line current drawn by the power supply.
2. The improvement according to claim 1 wherein the reference signal is a reference signal voltage and the parameter is the amplitude thereof.
3. The improvement according to claim 2 wherein said second means limits the maximum width of voltage pulses only when the average value of the pulse voltage signal exceeds the reference voltage by a prescribed amount.
4. The improvement according to claim 3 wherein said second means comprises means for integrating the voltage pulses.
5. The improvement according to claim 4 including third means producing a second DC voltage that powers the modulator, and wherein said first means comprises means electrically connected between the second DC voltage and a ground reference potential for producing the reference voltage at a node there-between.
6. The improvement according to claim 5 wherein said reference voltage means comprises a Zener diode electrically connected between the ground reference potential and the node at which the reference voltage is produced, the reference voltage corresponding to the Zener voltage
7. The improvement according to claim 5 wherein said reference voltage means comprises voltage divider means electrically connected between the second voltage and ground for producing the reference voltage at a node therebetween.
8. The improvement according to claim 5 wherein the error voltage from the comparator means is coupled to said second means which comprises: an active element having a first electrode electrically connected to the reference voltage, a second electrode electrically connected to a common node receiving the error voltage, and a control electrode electrically connected to said integrating means; and means coupling the voltage on said common node to the modulator, said active element being nonconducting when the average voltage produced by said integrating means is greater than the reference voltage by less than a prescribed amount so that said coupling means couples the error voltage to the modulator; said active element conducting in other than the saturation region when the reference voltage is less than the average voltage by greater than the prescribed amount for establishing the signal voltage level on the common node at a particular value that said coupling means couples to the modulator and that limits the maximum width of voltage pulses.
9. the improvement according to claim 1 wherein said second means comprises third means producing an indication of the width of voltage pulses and fourth means limiting the maximum width of voltage pulses when the value of the indication exceeds the value of the parameter by a prescribed amount.
10. An improved method of limiting the maximum value of line current drawn from an external source by a power supply including a pulse width modulator driving a DC-to-DC converter that is powered by the line current and operative for converting a DC line voltage to a DC supply voltage that powers a load impedance, and comparator means responsive to variations in the magnitude of the supply voltage for producing an error voltage that drives the modulator to vary the width of voltage pulses therefrom, and thus the duty cycle of the converter, for maintaining the supply voltage relatively constant, comprising the steps of: producing a time varying measure of the width of the voltage pulses, and limiting the maximum pulse width of the modulator for establishing the maximum duty cycle of the converter and thus the maximum line current drawn by the power supply, when the measure exceeds a prescribed value.
11. The method according to claim 10 wherein the measure is of the average value of the pulse voltage signal
12. The method according to claim 11 including the additional step of producing a reference signal having a parameter with a value that is a measure of the maximum line current that is to be drawn by the power supply, said value of the parameter being the prescribed value.
CA000364049A 1980-11-05 1980-11-05 Current limiter for switched dc-to-dc converter Expired CA1157517A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000364049A CA1157517A (en) 1980-11-05 1980-11-05 Current limiter for switched dc-to-dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA000364049A CA1157517A (en) 1980-11-05 1980-11-05 Current limiter for switched dc-to-dc converter

Publications (1)

Publication Number Publication Date
CA1157517A true CA1157517A (en) 1983-11-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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