CA1155966A - Address translator - Google Patents

Address translator

Info

Publication number
CA1155966A
CA1155966A CA000371174A CA371174A CA1155966A CA 1155966 A CA1155966 A CA 1155966A CA 000371174 A CA000371174 A CA 000371174A CA 371174 A CA371174 A CA 371174A CA 1155966 A CA1155966 A CA 1155966A
Authority
CA
Canada
Prior art keywords
address
memory address
internal memory
previous
providing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000371174A
Other languages
English (en)
French (fr)
Inventor
Marc Kaufman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Application granted granted Critical
Publication of CA1155966A publication Critical patent/CA1155966A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)
CA000371174A 1980-02-20 1981-02-18 Address translator Expired CA1155966A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/122,836 US4377844A (en) 1980-02-20 1980-02-20 Address translator
US122,836 1980-02-20

Publications (1)

Publication Number Publication Date
CA1155966A true CA1155966A (en) 1983-10-25

Family

ID=22405050

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000371174A Expired CA1155966A (en) 1980-02-20 1981-02-18 Address translator

Country Status (8)

Country Link
US (1) US4377844A (OSRAM)
JP (1) JPS57500310A (OSRAM)
CA (1) CA1155966A (OSRAM)
DE (1) DE3136066A1 (OSRAM)
FR (1) FR2476367B1 (OSRAM)
GB (1) GB2081946B (OSRAM)
NL (1) NL8120082A (OSRAM)
WO (1) WO1981002480A1 (OSRAM)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4519036A (en) * 1983-01-05 1985-05-21 Emi Limited Program storage hardware with security scheme
DE3415209A1 (de) * 1983-04-29 1984-10-31 N.V. Philips' Gloeilampenfabrieken, Eindhoven Speichereinheit mit einem speicher und einer schutzeinheit
DE3318083A1 (de) * 1983-05-18 1984-11-22 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung mit einem speicher und einer zugriffskontrolleinheit
US4716586A (en) * 1983-12-07 1987-12-29 American Microsystems, Inc. State sequence dependent read only memory
GB2165377A (en) * 1984-09-19 1986-04-09 Itt Ind Ltd A computer element
US4701847A (en) * 1985-01-09 1987-10-20 Logical Services, Inc. Adaptive instruction sequence synthesizer and process
US5155829A (en) * 1986-01-21 1992-10-13 Harry M. Weiss Memory system and method for protecting the contents of a ROM type memory
US5687354A (en) * 1990-02-09 1997-11-11 Harry M. Weiss Memory system and method for protecting the contents of a ROM type memory
US5781750A (en) * 1994-01-11 1998-07-14 Exponential Technology, Inc. Dual-instruction-set architecture CPU with hidden software emulation mode
US5542059A (en) * 1994-01-11 1996-07-30 Exponential Technology, Inc. Dual instruction set processor having a pipeline with a pipestage functional unit that is relocatable in time and sequence order
GB2308905A (en) * 1996-01-08 1997-07-09 John Robert Miller Protected system processor
KR100253328B1 (ko) * 1997-09-30 2000-05-01 김영환 메모리의 데이터 보호회로

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5128728A (OSRAM) * 1974-09-04 1976-03-11 Hitachi Ltd
US3949378A (en) * 1974-12-09 1976-04-06 The United States Of America As Represented By The Secretary Of The Navy Computer memory addressing employing base and index registers
US4128875A (en) * 1976-12-16 1978-12-05 Sperry Rand Corporation Optional virtual memory system
US4155119A (en) * 1977-09-21 1979-05-15 Sperry Rand Corporation Method for providing virtual addressing for externally specified addressed input/output operations
FR2471004B1 (fr) * 1979-11-30 1985-09-13 Dassault Electronique Installation et dispositif de controle de l'acces a une memoire electronique

Also Published As

Publication number Publication date
WO1981002480A1 (en) 1981-09-03
JPS57500310A (OSRAM) 1982-02-18
FR2476367A1 (fr) 1981-08-21
GB2081946A (en) 1982-02-24
DE3136066A1 (en) 1982-05-19
NL8120082A (OSRAM) 1982-01-04
US4377844A (en) 1983-03-22
GB2081946B (en) 1985-01-30
FR2476367B1 (fr) 1986-12-26

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Legal Events

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