CA1148612A - Electric pulse shaping circuit - Google Patents

Abstract

ELECTRIC PULSE SHAPING CIRCUIT
Abstract of the Disclosure A pulse shaping and amplifying circuit is formed by connecting a capacitor in series with the primary winding of a pulse transformer, connecting normally open switching means in parallel with the capacitor and primary winding, and connecting this parallel combination through a series inductor to a source of d-c control power, whereby the capacitor accumulates a charge from the control power source and then, during periods when the switching means is closed, discharges through the switching means and the primary winding. During its closed periods the switching means also conducts current from the control power source through the inductor, but when the switching means is opened the current in the inductor is transferred to the capacitor and the primary winding and thereby assists recharging of the capacitor. The pulse transformer is provided with at least one secondary winding which is connected to a load circuit by a full wave rectifier means comprising a first diode poled to conduct load current when capacitor discharge current is flowing in the primary winding and serially interconnected second and third diodes poled to conduct load current when capacitor charging current is flowing in the primary winding. Another capacitor is connected in series with one of the second and third diodes across the load circuit, whereby it ensures continuous load current after the first half cycle of operation of the pulse shaping circuit if the closed periods of the switching means recur at a sufficiently high frequency.

Description

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ELECTRIC PULSE SHAPING CIRCUI~
Background of the Invention ' .:
This invention relates generally ~o pulse amplifying and shaping circuits and more particularly to an improved circuit of this kind for use as a gate ;
5 driver for a periodically triggered thyristor. , Many electronic circuits and apparatus employ solid-state controllable switching devices known as '~,?~
thyristors or silicon controlled rectifiers ~SCRs).
A thyristor is typically a three-electrode device ;~;
10 having an anode, a cathode, and a control ox gate terminal. When its anode and cathode are externally connected in series with an electric power load and , a source of forward anode voltage (i.e., anode potential is positive with respect to cathode)~ a 15 thyristor will ordinarily block appreciable load current until a firing signal of appropriate amplitude and duration is applied to the control terminal, ri;'~
whereupon it switches from its blocking or "off" state ~;i;
to a conducting or "on" state in which the ohmic value :;
20 o~ the anode-to-cathode resistance is very low. To ;.!
generate the firing signal required to trigger a high-power thyristor, it is common practice to use a gate driver that is activated by a command or gating signal which in turn is supplied by associated control mea~sD
25 The criteria for designing a gate driver are well known in the art - see, for example, the chapter entitled "Gate Trigger Characteristics, Ratings, and Methods"
on pages 71-122 of the SCR Manual tFifth Ed., 1972) published by the General Electric Company (Electronics . ~ . ~ ,: . .
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20-TR-1292 ;`;
--:2-- '' ;''' Park~ Syracuse, NY). Generally speaking the waveform i, of the firing signal should be characterized by a ~;', sharply rising front, a high amplitude, and a sufficient ~.
length (duration) to ensure successful turn on of the "
5 thyristor when commanded by the c:ontrol means. ~ r In many practical applications a thyristor is triggered by a single pulse-like firing signal having a very fast rise time, a ~igh amplitude, and .
a relatively short duration (of t:he order of 25 10 microseconds or less~. When only a single pulse is .
required, it is not difficult to design a gate driver fi for such applications. For example, in a known gate driver of this type a precharged capacitor is discharged through the primary winding of a pulse 15 transformer so that th~ secondary current ~which is th~
firing signal) rises abruptly to a relatively high ~~
peak, and a series LC circuit is connected across the s~J, capacitor so that its subsequent discharge will slightly broaden this pulse of current. In other applications, 20 a thyristor requires a ~iring signal having a much longer duration (e.g., longer than 1 millisecond). In this case the initial rise time of the firing signal is not critical and can be relatively slow, and gate drivers using long pulse width transformers or known 25 filtering techniques to prolong or sustain the firing signal can therefore be applied.
In some cases a combination of short single ;
pulse and long sustained firing signals is needed. An example of this requirement is found in ~:
~30 Canadian patent application Serial Number 3 S ~, &~ , filed ~g~t ~,J~o for R. B. Bailey and T. D.
Stitt and assigned to the General Electric Company, which application discloses a chopper type electric propulsion system for d-c traction motors. For reasons "~!
35 that are explained in the re~erenced patent application, in normal operation the main thyristor o~ the chopper , is periodically fired in response to gating signals of ., ;.'.

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relatively short duration (approximately 10 microseconds) that recur at either a constant frequency ',.
(300 Hz) or a variable frequency that is lower than the ,~/
constant frequency, but to turn o,n the chopper at the .~;
beginning of an electrical braking mode of operation of the propulsion system, the main thyristor is intially triggered by an extended firing signal generated in response to a 2-millisecond burst of high frequency (e.g., 21.6 KHz) discrete pulses (10 to 20 microseconds 10 each). In this case the use of prior art techniques in the gate driver to obtain the extended firing signal is not practical because the resulting retardation of rise time would be unsatisfactory in .
normal operation. Other known pulse shaping circuits 15 that can generate extended firing signals are not ideal r'i;
for dual-purpose gate drivers because of one or more of .;
the following shortcomings: electrical isolation between .
control and power circuits is insufficient, an a-c ' control power source is required, cost is too high, or -~
20 initial rise time is too slow.
Summary of the Invention ..
Accordingly, it is a general objective of the present invention to provide an improved pulse amplifying and shaping circuit useful in a dual purpose ;
25 gate driver that can successfully provide either a single fast rising short duration firing signal or an extended firing signal of much longer duration.
Another objective of the invention is the provision of a relatively simple and low cost pulse 30 shaping circuit that enables a gate driver to generate -a continuous firing signal havin~ a fast rise time in response to a burst of high frequency gating signalsO
A more specific objective is to provide a pulse shaping circuit well suited for practical 35 application in the gate driver for the main thyristor of the electric power chopper that is used in the ", . , .
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-- '' ' ,~ -20-TR~1292 propulsion system disclosed in the above- ,~
cited Canadian Patent Application Serial Numher 3~7,~g~ . :
In carrying out the invention in one form, there is provided a capacitor in series with the primary winding of a pulse transformer, al~d the capacitor is ,' also connected through an inductor to an a-c powsr ;~
supply from which i~ accumulates a charge. Normally open switching means is connected in parallel with the lO primary winding and the capacitor, and means for periodically closing the switching means is provided.
When the switching means is c~osed, it conducts `
discharge current from the precharged capacitor ,~
through the primary winding of the pulse transformer, 15 and it also conducts current from the d-c power supply '.
through the inductor. Subsequently, when the switching :,~
means is next opened, current in the inductor will '~
flow through the primary winding and assist the /, recharging of the capacitor. A econdary winding of 20 the pulse transformer i5 connected through full wave rectifier means to a pair of d-c output terminals adapted to be connected to the gate and cathode of a thyristor. , The rectifier means includes a first diode connected between the secondary winding and one of the output 25 terminals for conducting gate-to-cathode current when ,;
the precharged capacitor is discharging through the primary winding, and a second diode connected between the secondary winding and the same output terminal for conducting gate current when capacitor recharging 30 current is flowing in the primary winding. A third diode is connected in s ries with the second diode, and a second capacitor is connected between the `
junction of the second and third diodes and the other ~ ~, output terminal, whereby the second capacitor is 35 charged during th~ recharging intervals of the -;
capacitor on the primary side of the pulse transformer.

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Consequently the second capacitor does not impede "
the rise time of the gate-to-cathode current when the switching means is initially closed. If the switching means is repetitively closed and opened at a suffi-5 ciently high frequency, the charge on the second ' capacitor will supply gate current during the short i' intervals when the transformer primary current is low or crossing zero, thereby ensuring continuous gate current after the first half cyclle of high frequency '~
10 operation.
The invention will be better understood and its various objects and advantages will be more fully appreciated from the following description taken in conjunction with the accompanying drawing.
Brief Description of the Drawing Fig. 1 is a schematic circuit diagram of a ;
pulse shaping circuit embodying the present invention;
and Fig. 2 is a diagram of the waveform of the 20 output current that is generated by the Fig. 1 circuit during the initial few cycles of operation in a burst ;:
firing mode. ;.
D~scription of the Preferred Embodiment The pulse shaping circuit comprises a pulse ~;
25 transformer T1 having a primary winding 11 and at least one secondary winding 12. Preferably the primary winding 11 has twice the number of turns as the secondary winding 12. The dot end of the primary 11 is connected to an input terminal 13 at ground 30 potential. A capacitor Cl is connected to the other end of the primary, and the series combina~ion of the primary winding 11 and the capacitor Cl is connected via an inductor Ll to a relatively positive input terminal 15 that is adapted to be connected to a 35 source of d-c control power from which the capacitor Cl accumulates charge. The d-c control power source :
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20-TR-129~ , includes a battery or the like (not shown) whose ;, negative terminal i5 connected to ground and whose ~' positive terminal is connected to a terminal 16, and it should have a relatively high voltage (e.g., 100 volts). -s In Fig. 1 a filter capacitor 17 of relatively larcJe , capacitance value (e.g., 50 microfarads) and a series resistor 18 are shown connected between the positive control power terminal 16 and the grounded terminal 13, and the input terminal 15 is the junction of this ~;
10 capacitor and resistor. ,;~
A voltage clipping circuit comprising back-to-back diodes 19 and 20 is connected across the inductor Ll. As is shown symbolically in Fig. 1, the diode 19 is preferably a ~ener diode.
The relatively positive plate of the capacitor Cl is connected through a current limiting resis~or 22 of small ohmic value (e.g., 20 ohms) and an input line 23 ~o the collector of an NPN transistor 25 whose emitter ;,-is grounded. Thus the transistor 25 is connected in 20 parallel with the capacitor Cl and the primary winding 11. This transistor is normally biased off by associated bias means 26, and it serves as a normally open switching means in the pulse shaping circuit of Fig. 1. The ~`
transistor 25 can be physically located remotely from , 25 the other components of the illustrated circuit, in :;
which case the line 23 has measurable inductance which ,,!, is shown symbolically at 27. Whenever the bias means 26 is commanded to forward bias the base-emitter junction of the transistor 25, this devic switches 30 to a turned on or closed state, and while it remains closed ~he collector current in line ~3 comprises a ~, gating signal for activating the pulse shaping circuit.
The bi.as means 26 is suitably controlled so as periodically to turn on the transistor 25.
35 practical example of means for determining the timing of the turned on periods of this transistor is shown , . .

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and described in the above-cited Canadian Patent -`~ Applicatinn Serial Number ~
- ~ The transistor that is herein identified ~y the reference number 25 corresponds to transistor 255 in the referenced application. In normal operation it is turned on for a short period of approximately 10 microseconds at a maximum repetitive rate or frequency of the order of 300 Hz, ,~
but occasionally, in response to a burst iring signal of approximately 2-millisecond duration at the 10 beginning of electrical braking of the propulsion system disclosed in the referenced application, the transistor is turned on for the same short period at a much higher frequency (e.g., 21.6 KHz). As will soon be apparent, the pulse shaping circuit of the present invention will 15 respond equally well to either situation by generating i, an appropriate firing signal for a thyristor 70.
The secondary winding 12 of the pulse trans~ormer Tl is connected through full-wave rectifier means 30 to a pair of d-c output terminals 14C and 14G.
20 These output terminals are coupled to a load circuit comprising the cathode and gate terminals of a ,;
thyristor 70 that is connected in an electric power circuit such as a chopper (not shown). A resistor 31 connected across the output terminals provides noIse 25 immunity and improves the dv/dt capability of the thyristor 70. Between a conductor 32 on the relatively positive side of the rectifier means 30 and the output terminal 14G there is a series resistor 33 that promotes current sharing between the secondary circuit that is illustrated in Fig. 1 and additional secondary circuits that can be coupled to the same transformer ' primary winding 11.
As is shown in Fig. 1, the rectifier means 30 comprises a fire;t divde Dl connected between the dot end of the transformer secondary winding 12 and the conductor 32 ancl poled to cQnduct current from the dot , ~.

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end to the conductor 32, second and thixcl serially ,~
interconnected diodes D2 and D3 connected between the ,~
opposite end of the secondary winding and the ~' conductor 32 and poled to conduct current from the ,,' 5 opposite end to the conductor 32, a fourth diode D4 ' connected between the dot end of the secondary and the output terminal 14C and poled to conduct current fxom this terminal to the dot end of t'he secondary, and a fifth ' diode DS connected between the op]posite end of the 10 secondary winding 12 and the same output terminal 14C ~' and poled similarly to diode D4. A capacitor C2 is connected between the output terminal 14C and th~ r junction of the second and third diodes D2 and D3.
The charging path of this capacitor includes diodes ~, 15 D2 and D~, and the discharging path includes the diode ,.~
D3,. the resistor 33, and the gate-cathode junction of '' the thyristor 70. ' The operation of the pulse shaping circuit will ., now be described. The transistor 25 is normally in a :
20 turned off or open state, and usually the capacitor Cl is precharged to the steady-state voltage level of the ~', d-c control power source (100 volts) with the polarity shown in Fig. 1. When the transistor is turned on or , ' closed, it provides a low-resistance path for discharging 25 the capacitor Cl through the primary winding 11 of th~ '!' pulse transformer Tl, and at the same ~ime it also, .:-conducts current from the positive input terminal 15 through the inductor Ll. ..
Nhen the fully precharged capacitor Cl is '!"
30 thus swi~ched across the transformer primary 11 (in -series with the line 23), its discharge current rises steeply to a relatively high peak in the primary w'inding. The resulting "positive" half cycle of~ ' secondary current is conducted through the diodes Dl 35 and DS and the gate-cathode junction of the thyristor , ' ;;
70, and this current is therefore'the desired fast .. rising single-pu:Lse firing signal iG fox triggering , ,r , ..
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the thyristor 70. Its r:ise time is not impeded by the capacitor C2 because the aiode D3 prevents this capacitor from charging during the positive hal~ cycles o~ secondary current. The capacitance value of the capacitor Cl (e.g., 1 microarad) is selected so that during the conducting period (e.g., approximately 10 , microseconds) of the transistor 25 this capacitor will not fully di~charge and its voltage will not fall below a predetermined level (e.g., 20 volts) at which the 10 magnitude of current iG in the transformer secondary would fall below the minimum ga~e trigger current r;
(e.g., 0.3 ampere) of the thyristor 70. This ensures tnat the magnitude of the initial pulse of secondaxy current is higher than the minimum gate trigger current `
throughout the conducting period o~ the transistor 25.
When the transistor 25 changes to its normally lr~
- open state at the end of the above-described conducting period, the current in the inductor Ll transfers from this transistor to the capacitor Cl and the primary 20 winding 11, and it assists the subsequent recharging of the capacitor Cl. The recharging curxent flows from the positive terminal 15 and through inductor Ll, the capacitor Cl, and the transformer primary 11 to the grounded terminal 13. In the transformer primary its direction is reverse to that o~ the discharging current. A finite time, which can be referred to as ~he commutation time, is required for the current in ^
inductor Ll to transfer from the transistor 25 to the primary winding 11 when the transistor is turned off, and during this time the transformer secondary current decreases to zero and increases with opposite polarity.
While there is recharging current in the transformer primary, a "negative" hal~ cycle o~ secondary current is conducted through the diodes D2, D3, and D4 and the ;`, thyristor gate. This negative ha~ cycle has a lower amplitude but a longer duration than the preceeding ,, ' , .
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positive half cycle of secondary current. During the negative half cycle some of the current in diodes D2 and D4 is diverted into the capacitor C2 which is ?;
charged thereby. Later, during intervals when the 5 potential of line 32 is lower than the potential on its positive plate, this capacitor will discharge into ;
the thyristor gate. ;~.
The inductance value of the inductor Ll (e.g., ' 1 millihenry) is selected so that at the end of the 10 10-microsecond conducting period of the transistor 25 the curxent in Ll will have built up to at least a predetermined minimum magnitude which is about equal to ;' the magnitude of capacitor discharge current than flowing ;
in the trans~ormer primary winding 11 (e.g., approx-15 imately 0.5 ampere) and so that during an ensuing non-conducting interval of a predetermined duration the recharging current of the capacitor Cl will not decay below this predetermined minimum magnitude. This ensures tha~ the magnitude of the second half cycle of 20 secondary current is above the minimum gate trigger current of the thyristor 70 for at least as long as ``
said predetermined duration. Preferably the predeter-mined duration of the non-conducting interval of the ;, transistor 25 is of the order of 40 microsPconds or 25 less. Consequently, if the 10-microsecond conducting periods of the transistor 25 are repeated at a frequency of 20 KH~ or higher, the illustrated pulse shaping circuit is operative, after its initial half cycle, to supply a continuous gate current i~ to the 30 thyristor 7Q. The extended firing signal that the pulse shaping circuit supplies to the thyristor during the first thxee cycles of its operation in this burst firing mode is illustrated in Fig. 2.
At time to in Fig. 2 the transistor 25 is 35 initially turnedL on, and the resulting discharge of the precharged capacitor Cl produces a steep-rising . ,:

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~ 20-TR-1292 high-amplitude pulse of gate current iG which is not impeded by the capacitor C~. At the end of the first conducting period of the transistor 25, current in the transformer primary winding decreases to zero and reverses direction as the capacitor Cl stops discharging through the transistor and commences recharging through the inductor Ll. The first zero crossing of transformer primary current occurs at time tl, and as is shown in Fig. 2 the gate current lO momentarily decreases to zero at the same time. ~uring the ensu-ng non-conducting interval, the capacitor Cl ~;
is being recharged and the negative half cycle of the transformer secondary current serves as the gate signal iG. The second capacitor C2 accumulates a charge 15 during this negative half cycle of secondary current.
When the transistor 25 is turned on for the second time in this burst firing mode of operation, current in the transformer primary winding will again decrease to zero and reverse direction as the 20 capacitor Cl stops recharging through the inductor Ll and commences discharging through the transistor, but there is no corresponding decrease of iG because the ~
capacitor C2 is now charged and will supply gate current , during the short commutation time when the transformer 25 primary current is low or crossing zero. The gate current is quickly driven to another high peak as the capacitor Cl discharges through the transformer primary and the transiskor 25 during the second conducting period of the transistor. At the conclusion of the 30 secona conductin~ period, the capaci~or C2 is again able to supply gate current while the transformer primary current is crossing zero. The gate current ' waveform will continue generally as shown in Fig. 2 throughout the remainder of the burst firing mode of -;
35 operation, with some loss of amplitude due to the partial discharge of the filter capacitor 17 during the burst firing interval.
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In the illustrated embodiment of the ,.
invention, the capacitive value of the capacitor C2 ;~
(e.g., 2.2 microfarads) is selected so that the time constant of the discharging path of this component is longer than the commutation tilme of the transformer primary winding 11. As previously mentioned, this commutation time is the time required for the current in the inductor Ll to transfer from the transistor 25 to the primary winding 11 when the transistor changes 10 from its closed state to its normally open state. In practical embodiments of the invention, a time constant of the order of 3 to 5 microseconds is contemplated.
While a preferred embodiment of the invention has been shown and described by way of example, many 15 modifications will undoubtedly occur to persons skilled in the art. The concluding claims are therefore intended to cover all such modifications as fall within the true spirit and scope of the invention.

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Claims (4)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. In combination:
a) a pair of input terminals adapted to be connected to a source of d-c power;
b) a transformer having a primary winding and at least one secondary winding;
c) a first capacitor connected in series with said primary winding;
d) means including an inductor for connecting the series combination of said primary winding and said first capacitor to said input terminals, whereby said first capacitor accumulates a charge from said source of d-c power;
e) normally open switching means connected in parallel with said primary winding and said first capacitor said switching means being periodically switched to a closed state in which it conducts discharge current from the first capacitor through said primary winding and also conducts current from said source of d-c power through said inductor,;
f) a pair of d-c output terminals adapted to be connected to a load circuit;
g) full wave rectifier means for connecting said secondary winding to said output terminals, said rectifier means including a first diode connected between said secondary winding and one of said output terminals for conducting load current when said capacitor discharge current is flowing in said primary winding, and second and third diodes serially connected between said secondary winding and said one output terminal for conducting load current when capacitor charging current is flowing in said primary winding; and h) a second capacitor connected between the other output terminal and the junction of said second and third diodes.

2. The combination as set forth in claim 1 wherein said second capacitor has a charging path including said second diode and a discharging path including said third diode and the load circuit, and wherein the second capacitor has sufficient capacitance so that the time constant of its discharging path is longer than the time required for the current in said inductor to transfer from said switching means to said primary winding when said switching means changes from said closed state to its normally open state.

3. The combination as set forth in claim 1 wherein said first capacitor has sufficient capacitance so that it does not fully discharge during the period when said switching means is in a closed state, and wherein the inductance of said inductor is selected so that at the end of said period the magnitude of current in the inductor is approximately equal to the magnitude of capacitor discharge current in said primary winding.

4. The combination of claim 3 wherein said second capacitor has a charging path including said second diode and a discharging path including said third diode and the load circuit, and wherein the second capacitor has sufficient capacitance so that the time constant of its discharging path is longer than the time required for the current in said inductor to transfer from said switching means to said primary winding when said switching means changes from said closed state to its normally open state.