CA1136213A - Power supply utilizing a high frequency magnetic amplifier - Google Patents

Power supply utilizing a high frequency magnetic amplifier

Info

Publication number
CA1136213A
CA1136213A CA000318548A CA318548A CA1136213A CA 1136213 A CA1136213 A CA 1136213A CA 000318548 A CA000318548 A CA 000318548A CA 318548 A CA318548 A CA 318548A CA 1136213 A CA1136213 A CA 1136213A
Authority
CA
Canada
Prior art keywords
winding
output
voltage
stack
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000318548A
Other languages
French (fr)
Inventor
Alejandro Marez
Jon J. Spykerman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyber Engineering Inc
Original Assignee
Kyber Engineering Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyber Engineering Inc filed Critical Kyber Engineering Inc
Priority to CA000382736A priority Critical patent/CA1138036A/en
Application granted granted Critical
Publication of CA1136213A publication Critical patent/CA1136213A/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/338Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement
    • H02M3/3385Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement with automatic control of output voltage or current
    • H02M3/3387Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in a self-oscillating arrangement with automatic control of output voltage or current in a push-pull configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core
    • H01F17/06Fixed inductances of the signal type  with magnetic core with core substantially closed in itself, e.g. toroid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/04Fixed inductances of the signal type  with magnetic core
    • H01F17/06Fixed inductances of the signal type  with magnetic core with core substantially closed in itself, e.g. toroid
    • H01F2017/067Core with two or more holes to lead through conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F29/00Variable transformers or inductances not covered by group H01F21/00
    • H01F29/14Variable transformers or inductances not covered by group H01F21/00 with variable magnetic bias
    • H01F2029/143Variable transformers or inductances not covered by group H01F21/00 with variable magnetic bias with control winding for generating magnetic bias

Abstract

POWER SUPPLY UTILIZING A HIGH FREQUENCY MAGNETIC AMPLIFIER

ABSTRACT
A regulated power supply includes an oscillating inverter circuit for generating a high frequency square wave signal that drives a saturable reactor which pulse-width modulates the square wave as a function of a control current through a control winding on the saturable reactor. The output voltage generated by the power supply is sensed by a feedback circuit and fed back as a modulating signal of the control current through the saturable reactor control winding to vary the power transferred by the saturable reactor to an output transformer.
The variation in power supplied to the output transformer compensates the output voltage as sensed by the feedback circuit.
A protective circuit is provided to sense an output overvoltage condition and inactive the power supply by terminating the oscillation of the inverter.

Description

, BACKGROUND OF THE INVENTION
The present invention relates to electrical power supplies and more particularly to a saturable reactor power ltransformation and regulation system.
S 1I Power supplies for electronic devices are divided into generally two types. In one type of conventional linear power supply, the input alternating current is transformed to the appropriate voltage, rectified, and filtered by an assortment of capacitors and inductors. A linear regulator is then provided llin the output circuit to maintain a constant output voltage.
Although this design is widely used, it requires the use of heavy transformers and capacitors and has a relatively low power transform efficiency.
1, In a second type of conventional power supply, the 'iincoming alternating power signal is rectified and filtered and iisupplied to an inverter circuit. The inverter switches the filtered signal on and off at a high rate to generate a high ,Ifrequency square wave. An output transformer then converts the llsquare wave to the desired voltage level and the resulting signal I is passed through a rectifying network and filters to produce a DC
output. The output of the power supply is regulated by varying "the pulse width of the signal generated by the inverter. ¦
Although this design uses lighter components and has a relatively ~high transform efficiency, it produces substantial noise in the loutput. This level of noise is often unacceptable in the operation of computers and other transistor switching circuits.
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In accordance with the present inVentiGn~ there is : provided a power supply which is not only lightweight and efficient but also generates a low noise output with a closely regulated voltage level.

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SUMMARY OF T~IE INVENTION
In accordance with an aspect of the invention there is provided apparatus for regulating the output voltage thereof as applied to a load, comprising: at least one ferrite toroid comprising a first stack, at least one ferrite toroid comprising a second stack spaced from said first stack, a first winding passing through the centers of said first stack and said second stack, a second winding passing through the center of said Eirst stack/ a third winding passing through the center of said second stack and connected in series with said second winding, output means connected to one terminal of said second winding and providing an output voltage applied to the load, a square wave generator providing an output connected to the second terminal of said third winding, and feedback means connected to the load and responsive to the voltage supplied thereto and generating a regulating voltage applied to said first winding.
A DC power supply in accordance with the present invention utilizes a high frequency saturable reactor wherein parallel stacks of ferrite toroids are separated by a non-magnetic plate. A control winding passes through the centers of both stacks and a pair of gate windings are connected in series, with each winding passing through the center of one stack. The saturable reactor is driven by an oscillating inverter which is initiated by a starting circuit. Upon activation of the power supply, a transistor is forward biased to turn on a first of a pair of oscillating transistors. A capacitor is charged by the oscillator output to reverse bias the transistor after oscillation is begun.
The power supply has an overvoltage protection circuit wherein a zener diode detects an overvoltage condition and activates a silicon contro]led rectifier to , ~,` '.

~3~ 3 ground the secondary winding of a transformer in the inverter and terminates oscillation of the inverter.
For regulation of the output voltage, a feedback circuit is provided to vary the current through the control winding of the saturable reactor in order to pulse modulate the signal applied to the output power transformer and thereby compensate the output voltage.
An inverter circuit for the power supply comprises a full wave rectifier, capacitance energy storage, and two pairs of synchronously oscillating switching transistors which generate a high frequency square wave coupled to the saturable reactor.
Switching diodes are disposed in the secondary windings of the output power transformer to rectify the square wave input to the primary winding. A saturable toroid is provided in the gate winding of the saturable rector to block high frequency reverse voltages generated during the transition of the switching diodes.

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B 81 g 4 BRIEF DESCP.IPTION OF T~E DRAWINGS
For a more complate understanding of the present invention and the advantages thereof, reference is now made to I~the following description taken in conjunction with the 11 accompanying drawings in which:
! FIGURE 1 is a block diagram of a power supply in accordance with the present invention, FIGURE 2 is an elevation view of the core elements of a saturable reactor, ,¦ FIGURE 3 is a plan view of the saturable reactor shown in FIGURE 2, il FIGURE 4 is a cross sectional view of a modulator in ~¦accordance with the present invention, ~ :
,i FIGU~ES 5a and 5b are a schematic diagram of a power 1~ supply in accordance with the present invention, ~ :
il FIGURE 6 is a set of waveforms representing signals .generated in the embodiment shown in FIGURES Sa and Sb, ,` FIGURE 7 is a schematic diagram of a power supply ,jrepresenting another embodiment of the present invention, ~ FIGURE 8 is schematic diagram of a full bridge inverter.

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~3~ 3 DETAILED DESCRIPTION OF THE INVENTION
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FIGURE 1 illustrates a power supply in accordance with the present invention. A conventional alternating current source 10 provides power to an inverter 11 which generates a higher ~frequency square wave output signal. This output slgnal is provided to the control winding of a modulator 12 which regulates the power level of a voltage applied to an output transformer and rectifier 14 by pulse-width modulating the square wave signal input to the modulator. The output transformer 14 is selected to provide the desired output voltage of the power supply through ~a filter 15. A constant output voltage level is maintained by a feedback control circuit 16 that generates a control current to the modulator 12. The amplitude of the control current is proportional tO the power transferred from the inverter 11 to the output transformer 14 which in turn determines the voltage provided at the output of the filter 15. The output voltage is also monitored by an over-voltage protection circuit 17 that generates a signal to disable the inverter 11 when the output ;voltage exceeds a predetermined level. Thus, there is provided a power supply which provides a regulated output, compensates for source and load power variation, and protects the load from application of an excessive voltage.
Referring to Figures 2, 3 and 4, the modulator 12 includes a high frequency saturable reactor that includes parallel stacks 18 and 19 of individual ferrite toroids 20. A nonmagnetic material 21 is disposed between the stacks 18 and 19 to separate the flux paths of the two stacks of toroids. The saturable , _ 7 _ - ,. .

~3~ 3 reactor core is shown in a plan view in FIGURE 3. The ferrite toroids 20 in each stack are positioned such that their centers are coaxial.
A modulator 26 including the saturable reactor core illustrated in FIGURES 2 and 3 is shown in an elevational cross section view in FIGURE 4. The modulator has a control winding 22 and a series pair of gate windings 23 and 24. The control winding;
22 passes through the centers of both stacks 18 and 19 and therefore encircles segments of each of the ferrite toroids 20.
Gate winding 23 encircles only the ferrite toroids 20 comprising stack 18 while gate winding 24 encircles only the ferrite toroids ~20 comprising stack 19. Windings 23 and 24 are wound such that the flux induced by these coils in the toroids passes in opposite directions through the control winding 22.
Referring now to FIGURE 4, in operation, a direct current is supplied to the control winding 22 to establish a flux field within the toroids. A square wave signal is applied to the gate windings 23 and 24 and these coils generate magnetic flux which adds to that flux already established in the toroids by the control winding 22. After a short period of time, the added flux created by windings 23 and 24 causes the flux density within the -~oroids to reach the saturation point. Before saturation, the ~windings exhibit a very high impedance level, but after flux saturation is reached in the toroidsl the gate windings exhibit a very low impedance, which is essentially only the resistance of the wire. The period of time required to drive the toroids into saturation can be varied by adjusting the current carried by the --~ \

~ ~3~;2~3 control winding 22. Therefore, the impedance presented by the gate windings 23 and 24 of modulator 26 is controlled by the current in the control winding 22.
Referring to FIGURES Sa and 5b, there is shown a schematic of the power supply of FIGURE 1 utilizing the modulator i 26 of FIGURE 4. An alternating current power source is connected to the input lines 32 through a radio frequency interference ~RFI) ; filter 34 to a full-wave rectifier 36. A resis~or 38 is disposed across the output lines of the full wave rectifier 36 and is in parallel with a series combination of filter capacitors 40 and ~1 42. Energy storage capacitors 44 and 46 are disposed in parallel ' with capacitors 40 and 42 respectively. With a 117 volt alternating current 60 hertz power source, there is produced on , i ,line 48 a positive 85 volt DC signal with respect to line 50 and a minus 85 volt DC signal on line 52 also with respect to line 50.
The emitter of a transistor 54 is connected to line 50 through a load resistor 56~ and the base of transistor 54 is connected by a capacitor 58 to line 52. Resistor 59 is in parallel with capacitor 58. A resistor 60 is connected between the base of transistor 54 and the cathode of a diode 62. The collectur of transistor 54 is connected through a diode 64 to the ' base of a transistor 66. The transistor 54 and its adjacent ; circuit element comprise a starting circuit 68.
A transformer 70 has a primary winding 70a which is connected between line 50 and a resistor 72. A secondary winding 70b of transformer 70 is connected between ground and a diode 74.
Secondary 70c of transformer 70 is connected between the base of : `

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a transistor 76 and a resistor 78 and a secondary winding 70d is joined between the base of the transis-tor 66 and a resistor 80.
;~ A blocking diode 82 and a capacitor 84 are connected lin parallel with the resister 78. Another blocking diode 86 ,and a capacitor 88 are connected in parallel with the resistor Protection diodes 90 and g2 are connected between the collectors and emitters of transistors 66 and 76 respectively.
Transistors 66 and 76 together with the associated ,circuitry function as an inverter to produce a high fre~uency l~square wave signal on line 94, which joins the emitter of ~transistor 76 to the collector of transistor 66. The output 'signal on line 94 is produced by the transistors 66 and 76 being ~alternately turned on and off. Oscillation of the inverter ~circuitry is initiated by the starting circuit 68.
When power is initially applied to terminals 32 the transistors 54, 66, and 76 will be off. Since the capacitor 58 !~ is initially discharged, the base of transistor 54 will be at a , . , ~minus 85 volt potential and the emitter will be at a higher ~ potential due to the resistor 56. Since the emitter is at a ,¦higher potential than the base, transistor 54 will be forward "biased therefore also forward biasing diode 64. A voltage at the cathode of the diode 64 is then applied as a potential to the base of transistor 66, and thls voltage is higher than the potential at the emitter. This higher potential applied to ~he base of ` transistor 66 relative to the emitter, which is connected to line 52, forward biases transistor 66. Capacitor 58 now rapidly charges through diode 62 and resistor 60 after the power is applied - 1 0 - , ,, ` 1i 1 , ...

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and transistors 66 and 76 start to oscillate. As it charges, capacitor 58 reverse biases transistor 54 thereby turning it ;off and opening the connection between line 50 and the base of transistor 66.
I When transistor 66 is forward biased its collector electrode is effectively connected to line 52 thereby applying a minus 85 volt potential to the primary 70a of the transformer 70.
The resulting current flow through this primary winding induces voltages in secondary windings 70c and 70d which tend to enhance the forward bias on transistor 66 and apply a reverse bias to transistor 76 thereby holding it in an off state. When itransformer 70 has saturated, the induced voltages in the ; secondary windings 70c and 70d drop to zero thereby causing transistor 66 to be switched off. This opens the circuit passing from line 50 through primary 70a to line 52. Opening this circult causes the field in transformer 70 to collapse which in turn produces reverse voltages in secondary windings 70c and 70d. The voltage now induced in secondary winding 70c will forward bias :`
~transistor 76 thereby turning it on while the voltage induced in secondary winding 70d will tend to hold transistor 66 turned off by means of reverse bias voltageO
j With transistor 76 forward biased, line 48 is connected . !
to the primary winding 70a of the transformer 70. The current -`flow through the primary winding 70a induces a voltage in secondary winding 70c to further forward bias this transistor and ~hold it on. A voltage is also induced in the secondary winding 70d to reverse bias transistor 66 and ~urn it off. When i. .

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~transformer 70 has saturated, the biasing voltage on transistor 76 will be removed and transistor 76 will open~ This opens the circuit of the primary winding 70a and causes the field to collapse thereby inducing opposite polarity voltages in secondary S windings 70c and 70d. These induced voltages will cause transistor 66 to be biased on and transistor 76 to be biased off.
This process is repeated as long as power is supplied thereby ;generating a s~uare wave signal on line 94. In one embodiment ~of the invention the square wave signal has a frequency of 30 kilohertz.
Blocking diodes 82 and 86 are provided to prevent improper biasing of transistors 76 and 66 respectively.
` Capacitors 84 and 88 provide a means for suppressing the transient ;voltages created when the fields in the secondary windings 70c and 70d collapse.
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The series combination of resistor 96 and inductor 98 are in parallel with the resistor 72. Resistor 96 is selected to j .`~ be of a value s~aller than resistor 72. For any voltage ~transistions on line 94 the inductor 98 initially presents a very high impedance thereby making the effective impedance in the line ~94 that of resistor 72. However, as soon as inductor 98 saturates, it in effect becomes a short circuit and the impedance in the line 94 becomes the parallel combination of resistors 96 ., :
and 72, a smaller value than that of resistor 72 alone. Inductor 98 is selected to be of an inductance that will cause saturation prior to the saturation of primary winding 70a of transformer 70.
The function of inductor 98 and resistor 96 is to produce a sharp ,j , , :
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transition from the positive and negative extremes of the square wave on line 94. The low impedance at the end of the cycle increases the current flow so as to maintain the peak voltage until the transition occurs~ This prevents the trailing 'transition ~rom becoming rounded, thereby reducing ~he pcwer transferred from the inverter.
Referring to FIGURE 5b, the square wave signal on line 94 is supplied to a transformer 100 having a primary winding lOOa and secondary windings lOOb and lOOc. Transformer 100 drives an auxillary power supply circuit 102 which produces supply voltages for driving other circuits within the power supply. Secondary winding lOOb drives bridge rectifiers 104, 106, 108, and 110 to produce a positive voltage (+VA) on line 112 and a negative voltage (-VA) on line 114. Inductors 116 and 117 and capacitors 118 and 120 are provided to filter the supply voltages. In one embodiment of the invention the VA voltages are plus and minus 25 volts respectively.
Also included in the auxiliary power supply 102 is the center tap secondary lOOc which drives diodes 122 and 124 to produce a DC voltage to a first control terminal, on line 125, of the modulator 26. Inductor 126 and capacitor 128 provide ' filtering for the signal thus produced. Diode 130 is disposed in series between the inductor 126 and the first control terminal of modulator 26. A series combination of a resistor 132 and a capacitor 134 are in parallel with the diode 130 and provide a means for suppressing diode damaging voltage transients.
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~3~ 3 Line 94 is also connected to the first gate terminal of modulator 26 through an inductor 136 in a line 135. Also ,J . connected to the line 135 is a series combination of a resistor 138 and a capacitor 140, the later tied to the line 50.
S A resistor 142 and a capacitor 144 are in a series combination between the first and second gate terminals of modulator 26. Also connected to the second terminal of the modulator 26 is a transformer 146 having a primary winding 146a r connected in parallel with a series combination of a resistor 148 and a capacitor 150. Joined to the second terminal of the primary winding 146a is the second terminal of primary winding lOOa of transformer 100.
Transformer 146 has secondary windings 146b, 146c, 146d, and 146e having respectively disposed in series therewith diodes lS 152, 154, 156, and 158. To suppress voltage spikes the diodes 152, 154, 156, and 158 are connected in parallel with resistors 160, 162, 164, and 164 together with capacitors 168, 170, 172, and 174 respectively. A filter inductor 176 is tied to a common interconnection of the diodes 152, 154, 156 and 158. An additional filter inductor 178 is in series with the filter inductor 176 and forms a T-filter network with capacitors 180 and 182. As a part of an output circuit, a load resistor 184 is connected in parallel with energy storage capacitors 190 and 192.
Also forming a part of the output circuit are capacitors 194 and 196 interconnected between the positive terminal of output terminals 188 and ground.

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3~.3 `~194 In operation, the square wave signal on line 94 is applied to the first gate terminal, line 135, of modulator 26 which has the second gate terminal, line 151, connected through the primary winding of transformer 146 to line 52. Modulator 26, which was described with reference to FIGURE 4, functions to pulse-width modulate the square wave signal on line 135. The output of the modulator on line 151 is supplied to the primary ~winding of transformer 146. Waveforms of the signals present on lines 135 and 151 are shown in FIGURE 6. Control signals applied ) to the modulator 26 provide the pulse-width modulation.
Referring to FIGURE 6, waveform A illustrates the square wave signal generated on line 135 by the inverter circuit. The modulated output of modulator 26 on line 151 is shown at a low ,modulation level in waveform B and at a higher modulation level ; in waveform C.
The output of the modulator 26 on line 151 is coupled to the primary winding 146a of the transformer 146. Positive-going current pulses on line 151 induce pulse voltages in secondary windings 146b and 146c which are passed through diodes 152 and 154 to the immediately following filter and storage elements.
Negative-going pulses are transferred to secondary windings 146d and 146e and passed through diodes 156 and 158. Filter elements 176, 178, 180, 182, 190, 192, 194, and 196 are provided to suppress voltage transients and to smooth the output voltage.
The output of the power supply, VB, at the output terminals 188, can be used to power a device at a remote location.
Conventional loadst which are powered in this manner, include ~3~

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computers and other types o~ transistor switching devices together with their peripheral equipment. In order to maintain a constant voltage level at the user device, the present invention provides a feedback regulation network. A DC load feedback cable 212 is ~provided to feed back the voltage supplied to the user device ~located remote from the power supply. Cable 212 is connected through an RFI filter 214 to remove any transient voltages generated by either the user device or induced into the load 'feedback cable 212 by other local electrical eauipment. The ,feedback output voltage is provided to the inverting input of an ~,operational amplifier 216 through a series combination of mixing iresistors 218 and 220.
Ripple voltages generated by the power supply are ,'monitored over a cable 222. These ripple voltages are mixed with 'the feedback load voltage at the junction of the mixing resistors 218 and 220. The grounded lead of the cable 222 is connected through a resistor 224 to the ground terminal of the cable 212. 1 ~
The second lead of cable 222 is connected through the series 1 ~¦
combination of a resistor 226 and a capacitor 228 to the ;
interconnection of resistors 218 and 220 to eliminate DC voltages.
A reference input is applied to the noninverting input ; ' ,, ; ~
of the operational amplifier 216. This reference voltage is ! , :
supplied by a voltage regulator 230 which is powered by the positive voltage, ~VA, that is generated by the auxiliary power ~' supply 102, previously described. The output of the voltage regulator 230 is passed through the series combination,oE voltage divider resistors 234 and 236. A capacitor 237 is connected ~ ~ ' .', ; I ''',: ' ' ~
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between the junction of resistors 234 and 236 and circuit ground.
-~ A potentiometer 238 is disposed between the junction of the .
resistors 234 and 236 and in series with a resistor 240 which is connected to ground. The potentiometer 238 is adjusted to set the output voltage, VB~ generated by the power supply at the output terminals 188. This potentiometer sets the reference voltage which is supplied to the noninverting input of the operational amplifier 216. Negative feedback is provided to the operational amplifier 216 by the series combination of a capacitor ~242 and a resistor 244.
;~ A control signal is generated by the operational amplifier 216 and is passed through a series combination of ~resistors 244 and 246 to a Darlington amplifier 248. The Darlington amplifier includes transistors 250 and 252 together with diodes 254 and 256, resistors 258 and 260 and a capacitor 262. A zener diode 264 is connected between the collector of transistor 252 and ground to attenuate voltage transients. The collector of transistor 252 is connected through a current limiting resistor 266 to a control terminal, line 268, of the ; 20 modulator 26. The Darlington circuit 248 acts as a current sink for the control winding 22 of the modulator 26 and is driven by the control signal output of the operational amplifier 216. The second terminal of the control winding 22 is provided with a constant voltage by the auxiliary power supply 102 on the line 125. This voltage is passed through the control winding of the modulator 26 to the line 268 through the current limiting resistor 266 and to the collector of transistor 252. Thus, the drive ,~" ', .

~3~ 3 ~B8194 voltage applied to the Darlington amplifier 248 determlnes the amplitude of the current which is passed through the control wind~ng 22 of the modulator 26.
Operatlonal amplifler 216 is powered by the auxiliary power supply 102 which supplies positive voltage (+VA) and negative voltage (-VA) to voltage control circuits including zener diodes 270 and 272. Zener diodes 270 and 272 together with the respective filter capacitors 274 and 276 provide the desired plus and minus 15 volt drive for the operational amplifier 216. The . resistors 277 and 278 act as voltage dividers between the VA :
voltages and the voltage drives to the operational amplifier 216.
In operation, the feedback circuit monitors both the DC
voltage level at the user load and the AC ripple on the output :~
voltage of the power supply. Variations in these levels away from the desired reference cause a control signal to be generated by the operational amplifier 216. This control signal drives the ;Darlington amplifier 24~ which increases or decreases the current `~
passing through the control winding 22 of the modulator 26. As the control current varies, the pulse width modulation of the power signal is proportionately varied which in turn controls the ;~
current that is transferred from the gate windings 23 and 24 of .
the modulator 26 to the primary winding of the transformer 146. . .
An increase in current to the transformer from the modulator -increases the power supply output voltage while a decrease reduces -~
the output voltage. ~hus, a closed loop feedback system is provided wherein the output voltage is maintained at a constant . - 18 -.. . .

level by regulating the current through the control winding of the modulator 26.
A further feature of the present invention is an over-voltage protection circuit which deactivates the power supply when the output voltage exceeds a predetermined threshold. This feature is provided to prevent damaging the load connected to the power supply. The output voltage is monitored on line 280 which is connected through a zener diode 282 to a potentiometer 284. The potentiometer 284 is connected in series with the gate terminal of a silicon controlled rectifier (SCR) 286. Disposed in parallel between the gate terminal of SCR 286 and ground are a resistor 288 and a capacitor 290. Between the anode of SCR 286 and ground there is connected in series a capaciter 292 and a ;resistor 294.
~15 The level at which the overvoltage circuit is activated is determined by the potentiometer 284 which acts as a voltage `
divider in series with the resistor 288. The zener diode 282 provides a stable reference for setting the overvoltage limit.
The anode of SCR 286 is connected to secondary winding 70b of transformer 70 such that when the SCR is conducting, the secondary winding 70b is grounded thereby short circuiting the primary winding 70a and disabling the transformer 70. Since the transformer 70 drives the transistors 66 and 76 that generate the , high frequency square wave provided to the modulator 26, the grounding of the secondary winding 70b terminates the oscillations and removes the power which is applied to the modulator.
~, Activation of the SCR 286 occurs when the output voltage VB

exceeds the predetermined threshold set by the potentiometer 284 and triggers the SCR through its gate terminal. ~fter the SCR 286 has been triggered it remains conducting only for the short per~od that is required to discharge the field in the transformer 70.
When the field in the transformer is discharged, the SCR is turned off and the excessive output voltage is no longer present.
Capacitor 290 is prov~ded to bypass overvoltage transients which would unnecessarily deactivate the power supply.
After SCR 286 has turned off transistors ~6 and 76, capacitor 58, which was charged to a positive 85 volts relative ,'to line 50, is discharged through resistor 59. When the voltage ~on the base of transistor 54 drops below that of line 50, the transistor 54 is forward biased and restarts the oscillations in transistors 66 and 76 as previously described.
An overvoltage indicator is also provided in the present invention. This indicator is activated to show that the output ' ;
;~ ,voltage is in excess of that which is desired but is still less than the threshold required to trip the overvoltage protection circuit. Such operatlon provides an early warning of a possible failure and indicates a marginal operatlng condition. An overvoltage indicator light emitting diode 296 is driven by an ~-integrated circuit 298. In one embodiment the integrated circuit ' ~
298 is a model NE5S5 manufactured by National Semiconductor. The -indicator 296 is connected between the positive terminal of the output voltage VB and a sink term~nal, pin 7, of the integrated circuit. The power to the integrated circuit is provided by the auxiliary power supply 102 which generates positive voltage (+VA) ; ~

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to the input on terminals 4 and 8 of the integrated circuit. An external resistor 300 is connected between the voltage supply and , terminal 6 of the integrated circuit. ~urther voltage divider I resisters 3~2, 304, and 306 are connected between the voltage source and terminals 5 and 1. An external capacitor 308 is connected between terminals 5 an~ 1 of the integrated circuit 298.
The integrated circuit is triggered through terminal 2 ' which senses the voltage generated at the output terminals 188.
A zener diode is connected between terminal 2 and the positive ~ terminal of the output 188. A resistor 312 is connected 'between terminal 2 and ground. Selection of the level at which the indicator is activated is determined by the zener diode 310.
~'hen an excessive voltage is generated which reverse biases zener `diode 310, a current sink is applied to terminal 7 which activates 'light emitting diode 296 through the resistor 297.
Another embodiment of the present invention is the power supply shos~n in FIGURE 7. An inverter is connected to terminals 332 and a square wave is passed through a high frequency filter ~icomprising an inductor 334 and a series combination of a resistor -, ~336 and a capacitor 338. The square wave signal is provided to 1, ;the gate windings 23 and 24 of the modulator 26 previously described. The output of the modula~or 26 is passed through the primary winding 340a of a transformer 340 which has a secondary winding 340b. A grounded center tap is provided in the secondary ' :
winding 340b. 1 ¦
~erminals of the secondary winding 340b are connected to diodes 342 and 344 which are join~d at their cathodes. Each of , ~' i ! ~:
, I .

. ~L3~3 t'ne diodes has a series high frequency bypass circuit comprising a resistor and capacltor in parallel with the diode. These are resistor 346 in series with a capacitor 348 and resistor 350 in series with a capacitor 352. A series inductor 354 is disposed ! between the output of the diodes and the input of a voltage regulator 356. Storage capacitor 358 and filter capacitor 360 are connected to the input to the voltage regulator 356. A
potentiometer 362 is connected in the ground line of the voltage ~, regulator 356 to adjust the regulated voltage.
The output of the voltage regulator is provided to terminals 364 which supply an output voltage VB to the user device. A further storage capacitor 366 is provided across the output terminals.
A feedback circuit comprising an operational amplifier 368 driving a transistor 370 is disposed between the input to the 1 `
~Ivoltage regulator 356 and a first terminal, line 367, of the j'control winding 22 of modulator 26. The inverting input of the ,operational amplifier 368 is connected through a resistor 372 to the input of the voltaye regulator 356. The noninverting ` 20 ;input of the operational amplifier 368 is grounded. Operational ,amplifier 368 drives the base of the transistor 370 through I ;
`a resistor 374. Bias resistor 376 is disposed between the base ¦ ~
of transistor 370 and ground. ~ -'j The control current for the modulator 26 is provided ,through a resistor 378 from the input terminal to the voltage i ~1 regulator 356. Transistor 370 acts as a current sink to regulate ,j . .

'' . ' ~ '`:.
'~ I
l - 22 - I -.' , . .

~3L3~L3 .

the magnitude of the current passing through the control winding 22 of the modulator 26.
The primary function of modulator 26 is to regulate the I
voltage supplied to the input of the voltage regulator 356. This ~is accomplished by the feedback circuit wherein the operational amplifier 368 is referenced to ground. When the desired voltage jis present on the input llne to the voltage regulator 356, the ''output of the operational amplifier 368 drives transistor 370 such¦
!I that the desired current is passed through the control winding 22 ~of modulator 26 to produce the appropriate power transfer to ~transformer 340. When the voltage at the input of the voltage regulator 356 drops below the desired level, the operational amplifier 368 increases the drive on the transistor 370 so as l¦to increase the current flow through the control winding of the .15 ll modulator 26. This increases the current supplied to the "transformer 340 and raises the voltage present at the input to the voltage regulator 356. If the voltage at the input of the l~voltage regulator increases, the current through the modulator control winding is decreased and the power transferred to the ¦ I
~0 1'transformer is reduced thereby reducing the voltage to the input of the voltage regulator.
A conventional power supply design comprises the circuit¦
l,shown in FIGURE 7 minus the modulator 26 and the feedback control ! circuit. ~ith the conventional supply the voltage regulation is lentirely controlled by the voltage regulator 356. This device maintains a constant output voltage from the power supply by ~varying the voltage drop across the regulatcr itself. The miniTIlum ., 1 :`:
1 ` ~' ~, l 'I . I :
.. . .

'voltage drop across the regulator is two volts, b~t when an increased voltage is applied to the input terminal, the regulator ~l ¦
must have a proportionately increased voltage drop across it. The increased voltage drop across the regulator severely reduces the loverall power transform efficiency of the power supply. With the ¦
addition of the modulator 26 and the feedback circuitry, the input~
voltage is maintained at essentially a constant level so as to keep the overall power supply operating as its maximum efficiency ¦
'~level. I
1 Still another embodiment of the present invention is the' full bridge inverter illustrated schematically in FIGURE 8. In the embodiment shown in FIGURES 5a and 5b, the inverter generated a square wave signal with positive and negative 85 volt levels. ! :~
,;But if it is desired to have a power supply with a greater power output over that of a half bridge inverter as shown in FIGURE 5a, ;a full bridge inverter as shown in FIGURE 8 is used to produce a square wave signal having voltage swings from zero to 170 volts.
The inverter circuit in FIGURE 8 can be substituted for the inverter circuitry in FIGURE 5a.
j An alternating current source is connected to the input terminals 382 of the inverter shown in FIGURE 8. The alternating current is rectified in a conventional full wave bridge rectifier I ~
384 then stored and filtered by means of capacitors 386 and 388. 1 ~ -A load resistor 390 is disposed in parallel with the capacitors 386 and 388. Therefore, with a standard 117 volt AC input the . I
capacitors will develop a peak level of 170 volts on line 392 ~with line 394 established as the ground bus.
'.`' ' I '";, ,:

'I

1 ~3~3 !`
.; i The inverter is comprised primarily of four transistors 396, 398, 400, and 402 which are turned on and off in diagonally opposed pairs to generate a high frequency square wave signal.
Each of the transistors is shunted by a bypass diode 404, 406, 408, and 410, respectively. These diodes route any reverse voltage transients around the transistor as a protection feature.
Transistors 396, 398, 400, and 402 each connects to a base drive `lresistor 412, 414, 416, and 418 respectively.
l A transformer primary winding 420 is magnetically 10,coupled to a secondary winding 420a which drives the base of jtransistor 396, a secondary 420b which drives the base of i,transistor 398, a secondary 420c which drives the base of ltransistor 400, and a secondary 420d which drives the base of iltransistor 402. The primary winding of a power transformer 422 15¦¦is connected between a first gate terminal of the modulator 26 ¦land the junction of the emitter of transistor 396 and collector I~,of transistor 400. The second terminal of the gate circuit of ¦the modulator 26 is connected to the junction of the emitter of l'transistor 398 and collector of transistor 402. A toroid 424 20'encircles a lead of the primary winding of the transformer 422 and has disposed thereon a coil which is connected between the ~transistors 396 and 400 and through a resistor 426 to the junction i,of resistors 428 and 430. Disposed in series between the ¦,collector of transistor 400 and the collector of transistor 402 25¦lare the resistors 428 and 430 and the primary winding 420. Joined Ibetween the junction of secondary windings 420c and 420d and ground is a protection diode 432 in parallel with a resistor 43~, Ii I ' I . I .
I~
i, . ,.
ll - 25 ~
11 . '~

- ; l ~3~3 li A routing diode 436 is connected between the emitter of I
transistor 396 and a resistor 438 which is connected to line 392. ' ., A resistor 440 is connected from the emitter of transistor 396 to a second terminal of the secondary winding 420a and the junction of diode 436 with resistor 438. A second routing diode 442 is lconnected between the emitter of transistor 398 and a resistor ,l444 which is connected to line 392. Diode 442 is in parallel with a resistor 446 which is connected between the emitter of transistor 398 and a second terminal of secondary winding 420b.
j When power is first applied to the inverter of FIGURE 8, l'all of the transistors are turned off. Line 392 is charged to a l~value of 170 volts by the action of the rectifying diodes and ,Icapacitors. The voltage on line 392 leaks through both the I -I transistors 396 and 398 as well as the series combination of `'resistors 438 and 440 and the series resistors 444 and 446. This !
~! j -,causes the collector terminals of both transistors 400 and 402 to be raised to an elevated voltage with respect to line 394.

Because the transistors have different leakage characteristics, !~ there will be a voltage difference across primary windiny 420.

~The resulting current through primary winding 420 will induce ',voltages in secondary windings 420a, 420b, 420c and 420d.

! Depending on the polarity of the current through primary 420, either transistors 396 and 402 will be forward biased and ~ ;

'transistors 398 and 400 will be reverse biased or transistors 396 Iand 402 will be reverse biased and transistors 398 and 400 will llbe forward biased.
, , ,., ~,`

;~' 11' ' ! ` - 26 -,~ ..... . -, ' ` ' ' ' ., . ~, .. .. . . .

.l l When primary winding 420 reaches saturation, the field collapses and applies reverse voltages to each of the secondary . , .windings. This reverses the bias on each of the transistors and ;results in a situation wherein the transistor operating states are reversed. As the primary winding 420 is saturated in the reverse direction the process is repeated to generate a high frequency ~square wave signal that is applied to the modulator 26 which functions as previously described in the embodiments of FIGURES
lSa, 5b and 7. Likewise power transformer primary winding 422 ,transfers power to secondary windings (not shown) as previously described for embodiments also in FIGURES 5a, 5b and 7.
,j Toroid 424 is provided to boost the switching ¦Ieffectiveness of the primary winding 420. A terminal lead of ,jprimary winding 422 passes through the toroid 424 to provide ,current feedback. Voltages are induced in a coil on a toroid and ~these voltages provide a current which is passed through resistors~
426 and 428 to enhance the current flow in primary winding 420 which in turn provides stronger bias voltages at the secondary l,windings coupled to the primary winding 420. This current ,Ifeedback loop enhances the switching of the inverter at high load 'Icurrent levels when additional drive is necessary to bias the switching transistors on and off.
Although several embodiments of the invention have ¦
,heen illustrated in the accompanying drawings and described lin the foregoing detailed description, it will be understood ¦ .
that the invention is not limited to the embodiments disclosed, ! .
but is capable of numerous rearrangements, modifications and substitutions without departing from the scope of the invention.
i, 1, 11 ' I ~
1i jl - 27 - I :
. ~, ~ .. ,

Claims (19)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. Apparatus for regulating the output voltage thereof as applied to a load, comprising:
at least one ferrite toroid comprising a first stack, at least one ferrite toroid comprising a second stack spaced from said first stack, a first winding passing through the centers of said first stack and said second stack, a second winding passing through the center of said first stack, a third winding passing through the center of said second stack and connected in series with said second winding, output means connected to one terminal of said second winding and providing an output voltage applied to the load, a square wave generator providing an output connected to the second terminal of said third winding, and feedback means connected to the load and responsive to the voltage supplied thereto and generating a regulating voltage applied to said first winding.
2. Apparatus as recited in claim 1 wherein said feedback means includes an amplifier having a first input connected to receive the voltage supplied to the load and a second input connected to receive a reference voltage.
3. Apparatus as recited in claim 2 including means for adjusting the reference voltage to set the output voltage from said output means as applied to the load.
4. Apparatus as recited in claim 1 wherein said feedback means includes means connected to said output means and responsive to the output voltage at said output means and connected to said load and responsive to the output voltage applied thereto to generate the regulating voltage to the first winding.
5. Apparatus as recited in claim 4 including means responsive to the output of said square wave generator to provide a control voltage to the third winding.
6. Apparatus as recited in claim 1 wherein said output means includes means for comparing the output voltage with a predetermined threshold and generating an overvoltage indication signal for actuating an overvoltage indicator.
7. Apparatus as recited in claim 1 wherein said square wave generator comprises an inverter generating the square wave signal as an output.
8. Apparatus as recited in claim 1 wherein said output means comprises:
a transformer having a primary winding and a secondary winding, a first diode connected to a first terminal of said secondary winding, and a second diode connected to a second terminal of said secondary winding and to said first diode.
9. Apparatus as recited in claim 1 wherein said feedback means comprises:
an operational amplifier having the output voltage connected to a first input terminal, a reference signal connected to a second input of said operational amplifier, and a current sink driven by the output of said operational amplifier, said current sink controlling the magnitude of current flow through said first winding.
10. Apparatus for regulating the output voltage thereof as applied to a load, comprising:
a core having two separate magnetic paths, said core comprising a magnetic material having a square loop, low hysteresis characteristic, a first winding encircling the first and second magnetic paths, a second winding encircling the first magnetic path, a third winding encircling the second magnetic path and connected in series with said second winding, a square wave generator providing an output connected to the second terminal of said third winding, first means connected to one terminal of said second winding and providing an output voltage, a filter connected to be responsive to the output voltage and providing a filtered output applied to the load, feedback means connected to the load and responsive to the voltage applied thereto to generate a first feedback voltage, means for monitoring the output voltage at said first means for generating a second feedback voltage, and means for combining the first and second feedback voltages into a regulating voltage applied to said first winding.
11. Apparatus as set forth in claim 10 wherein said means for combining includes an amplifier having a first input receiving the first and second feedback signals and a second input connected to receive a reference voltage.
12. Apparatus as set forth in claim ll wherein said means for combining further includes a mixer having one input connected to receive the first feedback signal, a second input connected to receive the second feedback signal r and an output connected to the first input of said amplifier.
13. Apparatus as set forth in claim 12 including means for adjusting the reference voltage to set the output voltage from said first means.
14. Apparatus as set forth in claim 13 wherein said means for combining includes an RFI filter connected to the load and to said mixer.
15. Apparatus for regulating the output voltage thereof as applied to a load, comprising:
at least one toroid of a magnetic saturable material comprising a first stack, at least one toroid of a magnetic saturable material comprising a second stack spaced from said first stack, a first winding passing through the centers of said first stack and said second stack, a second winding passing through the center of said first stack, a third winding passing through the center of said second stack and connected in series with said second winding, output means connected to one terminal of said second winding and providing an output voltage applied to the load, an inverter generating a square wave signal connected to the second terminal of said third winding, said inverter including:
first and second output stages interconnected at an output terminal for the generated square wave signal, a saturable transformer having a primary winding and first and second secondary windings, said secondary windings respectively driving said first and second output stages, means connected from the interconnection of the output stages to the primary winding of said transformer to produce a sharp transition from the positive to negative extremes of the generated square wave signal, and feedback means connected to the load and responsive to the voltage supplied thereto and generating a regulating voltage applied to said first winding.
16. Apparatus as set forth in claim 15 including a starting circuit connected to the primary winding of said transformer to provide a starting voltage to said inverter.
17. Apparatus as set forth in claim 15 wherein said first and second output stages each comprise a transistor having one interconnected electrode as the output terminal and one other electrode connected to the respective one of the secondary windings Oe said transformer.
18. Apparatus as set forth in claim 17 wherein said means connected from the output stages to the primary winding includes an inductor connected to the interconnected electrodes of said transistors and to the primary winding of said transformers.
19. Apparatus for regulating the output voltage thereof as applied to a load, comprising:
at least one toroid of a magnetic saturable material comprising a first stack, at least one toroid of a magnetic saturable material comprising a second stack spaced from said first stack, a first winding passing through the centers of said first stack and said second stack, a second winding passing through the center of said first stack, a third winding passing through the center of said second stack and connected in series with said second winding, and output means including a transformer having a primary winding and a secondary winding, the primary winding connected to one terminal of said second winding and the secondary winding providing an output voltage applied to the load.
CA000318548A 1977-12-27 1978-12-22 Power supply utilizing a high frequency magnetic amplifier Expired CA1136213A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA000382736A CA1138036A (en) 1977-12-27 1981-07-28 Starting circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US86477177A 1977-12-27 1977-12-27
US864,771 1977-12-27

Publications (1)

Publication Number Publication Date
CA1136213A true CA1136213A (en) 1982-11-23

Family

ID=25344042

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000318548A Expired CA1136213A (en) 1977-12-27 1978-12-22 Power supply utilizing a high frequency magnetic amplifier

Country Status (4)

Country Link
JP (1) JPS5499964A (en)
CA (1) CA1136213A (en)
DE (1) DE2856818A1 (en)
GB (1) GB2011730A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2124042B (en) * 1982-06-01 1986-10-01 Control Logic Reduction of harmonics in gas discharge lamp ballasts

Also Published As

Publication number Publication date
GB2011730A (en) 1979-07-11
DE2856818A1 (en) 1979-06-28
JPS5499964A (en) 1979-08-07

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