CA1121004A - Television receiver with synchronous detection and automatic fine tuning - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE

A television receiver has an automatic fine tuning circuit with a first phase-locked loop including a first low pass filter and a synchronous video detector with a second phase-locked loop including a second low pass filter. A cut-off frequency of the first low pass filter is selected lower than a cut-off fre-quency of the second low pass filter, thereby enabling a stable operation of two phase-locked loops simultaneously.

Description

BACKGROUND OF THE INYENTION

Field o~ the Invention This invention relates generally to a television receiver using a synchronous video detector, and more particular to a tele~ision receiver having an automatic ~Lue tuning system with a phase-locked loop.
Description of the Prior Art _...
A television receiver having an automatic îine tuning system with a phase-locked loop and a synchronous video detector is known as U.S.Patent No. 3,946,148 tSkerlos).
A television receiver described in the above-mentioned U.S.Patent includes a variable frequency re~erence oscillator suppl,ying a re~erence signal to a phase detector for an automatic fine tuning operation and to a synchronous detector ~or a ~ideo detection .
An output signal Or the phase detector is supp~ied to a local oscillator o~ a tuner through a ~irst low pass filter and to the ref~rence oscillator through a second low pass ~ilter.
However, in the a~ove-rnention U.S.Patent, it is neccesary to insert an AC coupling between the phase detector 3~ ~

and the sec~nd low pass ~ilter while a phase-locked lo~p îor the automatic ~ine tuning is formedO
SUMMARY OF THE INVENTION

It is an object of this invention tc~ prs~Yide an impro~ed synchronous detector-type Selevision receiver with a phase-locked loop type automaeic fine tuning circuit.
- Another object of this invention is to pro~ide an improved synchronous video detecting system which can produce a normal ~rideo signal when the phase-locked loop for automatic fine tuning operation îs opened.
According to an aspect of the present invention there is prorided a circuit ~or receiving an amplitude-modulated signal which comprises a tuner ~or con~rerting an -rnplitude modulated signal to an intermediate frequency signal, a circuit for supplying said intermediate frequency signal to a phase detector and to a synchronous detector, a variable frequenc~y rererence oscillator for suppl~ing a reference signal to said phase detector and to said synchronous detector, a first low pa~s filter connected between said ph~se detector and said tuner, a second low p~s ~ilter connected ~0 between said phase detector and said re~ere~ce oscillator, and an automatic line tuning defeatingcircuit connected to said tunner characterizing in that a cut-o~f ~requenc~r Or ~aid first low pass Iilter is selected lower than a cut-o~f ~requency o~ said second l~w pa~s filter.
More particularly, there is provided:
A o~ut for ~coi~ mplitude-modulated ~ignal compr~sing:
a) ~ tuner Sor con~erting said amplitude-modulated ~i~nal to E~n i~termediate frequency ~ignal, ~) a means ~or ~upplying said intermediat~ ~requency ~iignal to a phP~e detector and to a s~nchronous detector, c~ a ~ ble frequency reference ~scillatc~r ~or ~uppl~r~ng a ro~erence 6ignal tD 6aid phase detector ~d to 6aid s~nchronous ~etectDr;
dl a first low pa~s filter means connected betwe~n said phase detector means and said local sscillator of the tuner means and passing frequencies in a band ranging from DC to a first ~ut~off fxequency for controlling said local oscillator; and e) a second low pass filter means connected between said phase detector and said reference oscillator means and passing frequencies in a band ranging from DC to a second cut-off frequency;

8) ~n aut~matic~tu~gdeSeat~g me ~ c~nAe~ted tos~d iuner,charac~r~ ~g ~ ~atacutniIfrequ~nc~ o~aidt~st low p~sr~ter ~ ~electedlower ~an acuto~ ~reque~c~ o~
s~dsec~ndl~w pass~r.

There is also provided:
A circuit for receiving an AM signal comprising:
tuner means including a local oscillator for converting said ~M signal into an IF signal;
phase detector means for providing a phase error signal containing AC and DC components in response to said IF
~ignal;
synchronous detector means for providing an output signal in response to said IF ignal;
means supplying said IF signal to said phase detector means and to said synchronous detector means;
variable frequency reference oscillator means supply-ing a reference signal to said phase detector means and to said synchronous detector means;
first low pass filter means connected between said phase detector means and said local oscillator of the tuner means and passing frequencies in a band ranging from DC to a first cut-off frequency for controlling said local oscillator;
and ~......
-3a-~ econd low pass filter means connected between said phase detector and said reference oscillator means and passing frequencies in a band ranging from DC to a second cut-off frequency;
said first cut-off frequency being sufficiently less ;than said second cut-off frequency so that it is possible to effect automatic fine tuning for receiving said ~M signal while both ~he AC and DC components of the phase error signal of said phase detector are permitted to pass to said reference oscillator means.
The other objects, reatures and ad~rantages o~ this ~ ;
ention will become. apparent rom the ~ollowing description Sal~e~ in conjunction with the accompanying drawings~
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~3b-^~ l BRIEF DESCRIPTION OF THE DXAWINGS

Fig. 1 is a block diagrarn showing an e~ample of the invention; and Figs, 2, 3 and 4 are graphs showing the characteristics of low pass filters which are useable in the present invention shown in Fig. 1.

DESCRIPTION OF THE PREFERRED EMBODIMENT

An example of the present invention will be hereinafter described with reference to the drawings.
~ Fig. 1 is a systematic block diagram showing an example of the invention. In Fig. 1, reference numeral I designates an antenna . A radio frequency signal received by the antenna 1 is fed to a tuner 2 from which a video intermediate frequency (VIF) signal is derived. The VIF signal from the tuner 2 is applied to a video intermediate frequency (VIF) amplifier 3, amplified thereby and then applied to a video detector 4 consisting of a synchronous detector. A voltage controlled oscillator (VCO) 5 produces a reference signal whose frequency is same as that of the VIF signal. I
The referencs signal from the VCO 5 is applied through a phase

2() , shifter 6, which has the phase shifting amount of ~2 ~ to the video detector 4. Thus, a video signal is detected by the synchronous -~ detection. The VIF signal amplified by the VIF amplifier 3 is also applied to a phase detector 7 which is also supplied ~rith the re~erence signal from the VCO 5, so that the phase detection is ~ achieved with the reference signal from the VCO 5. The detected output signal from the phase detector 7 is fed to a low pass filter 8 which has a relatively high cut-off frequency shovlrn by a curve b in the graph of Fig. 2 in which the ordinate represents the gain and the abscissa . ' _ ~ _ .
, , ~L12~004 represents the frequency. The output voltage from the low pass filter 8 is applied to the VCO 5 to control the latter. The detected output signal from the phase detector 7 is ~urther applied to a low pass filter 9 which has a relatively low out-ofi îrequency shown by a curve a in the graph of Fig. 2. The output voltage from the low pass filter 9 is fed through an automatic f i~ie tuning (AFT) switch 10 to a local oscillator in the tuner 2 to control its local oscillation frequency.
In the above circuit construction, the AFT operation is carried out by a phase-locked loop or a so-called PLL which includes phase detector 7 and low pass filter 9 shown by a loop arrow A in Fig. 1. Thus, when the AFT switch 10 is closed or ON, the carrier oî the VIF signal delivered from the VIF amplifier 3 i.e. the video intermediate carrier is so controlled by the PLL A that its îrequency coincides with the frequency of the reference signal from the VCO 5 and its phase is shifted by just 2 from that of the reference signal.
Accordingly, in the video detector 4 the VIF signal is synchronously detected with the signal whose phase is same as that of the carrier Or the VIF signal, so that the normal video detected output signal can I ~ i be obtained.
' In the present invention9 there is further provided another phase-locked loop (PLL) including the phase detector 7, low pass filter 8 and VCO 5 indicated by a loop arrow B in Fig. 1 in addition to the PLL A for the AFT operation. This PLL B is provided for such a purpose that even l,vhen the AFT switch 10 is opened or OFF, namely the AFT operation is inhibited the video or synchronous detector 4 can detect the video signal normally.
With the above circuit construction, when the AFT switch 10 is Inade OFF the PLL A is cut off. However, since the PLI.
B l,vhich transmits a DC component exists, the VCO 5 is so controlled by the PLL B that the phase of the signal from the VCO 5 is shifted ~t, ., ' :

by just 2 from the phase of the carrier oî the VIF signal delivered ~rom the VIF amplifier 3. Thus, the VIF signal is synchronously detected in the video detector 4 with the signal whose phase is same as the phase of the carrier of the VIF signal, and accordingly the normal vicleo detected output signal is obtained even if the AFT switch 10 is made OFF.
In this case, in order to widen the capture range, the cut-off frequency of the low pass filter 8 of the PLL B is increased to a necessary high frequency, for example, about 2 MHz~;. In this case, the cut-off frequency of low pass filter 9 of PLL A is decreased sufficiently low9 for example, about 5 to 6 Hz so as to avoid that the oscillation frequency of the local oseillator in the tuner 2 is affected by the vertical and horizontal synehroni~ing signal.
It is now oonsidered that when the frequeney of the VIF
signal from VIF amplifier 3 is fluctuated where the PLLs A and B
'j beeome stable. Assuming that the loop gain of PLL A is taken as G~, the loop gain of PLL B as GB ~ the fluctuation of the local oseillation frequeney as ~fL, and the fluetuation of the oseillation frequeney of VCO 5 whieh is eaptured at that time as ~î0, respeetively.
The îollowing relationship is established among them.

af0 ~ 1 ~ GB ------------- (1 ) Accordingly, for the same fluctuation of the local oscillation frequeney, as the ratio A/ GB becomes great the fluctuation of the oscillation frequency of VCO 5 be¢omes small so much.
Therefore, with the example of the invention the loop gain GB of PLL B is suppressed at the limit value necessar~y to maintain the capture range, while the loopgain GA of ~?LL A
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f~ -;

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is selected ~ufficiently higher than the loop gain GB of PLL B in view point of DC and AC. Thus, the fluctuation of the oscillation frequency of VCO 5 can be descreased sufficiently and hence the VCO
5 can be approximately operated as the re~erence oscillator.
By way of example, if the cut~off frequency of low pass filter 9 is selected as 5 to 6 Hs;, the cut-off frequency of low pass filter 8 as about 2 MH~ and the ratio GA/GB as 10 9 it is possible that the capture range of AFT is + 1 MHz and the shift of the frequency of the VIF signal derived from the VrIF amplifier 3 from the reference 1 frequency is fallen within 50 KHz~
- In this case, even if the loop gain GA of PLL A is selected high, the cut-of~ frequency of low pass filter 9 in PLL A is suffi-ciently low as set forth above. Thus, the damping can be easily done and the stability is not affected.
As the second low pass fill;er 8, not only a 1QW pass filter having the ordinary characteristic incLicated by the curve b in the graph of Fig. 2 but also such a low pass filter having the peaking ch~racteristic shown in the graph of Fig. 3 or the trap characteristic shown in the graph of Fig. 4 can be used.
~- According to the system of the invention described asabove, even under the normal condition or the AFT switch 10 being made ON to achieve the AFT operation, there in no need to insert a DC componentblocking circuit between the phase detector 7 and VCO 5, so that it is also of no need to provide a change-over switch in the PLL B.
Further, in the irivention the cut-off frequency of low pass filter 8 is selected relatively high and the cut-off îrequency of low pass filter 9 is selected relatively low, so that the capture range can be widened without damaging the stability oï tuner 2 and the ` CO S can be used as a stable rer:rence osc~llator.

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~:~2~4 Further, even in the case that the AFT switch 10 is mad~e O:FF for the manual fine tuning, the PLL B itself can be formed so that the normal detected video output signal can be derived from the video detector 4 The above description is given on a single preferred embodiment of the present invention but it will be apparent that many modifications and variations could be effected by one skilled in the art w;thout departing from the spirits or scope of the novel concepts of the present invention. Therefore, the scope of the invention should be determined by the appended claims.

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Claims (10)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A circuit for receiving an amplitude-modulated signal comprising:

a) a tuner for converting said amplitude-modulated signal to an intermediate frequency signal, b) a means for supplying said intermediate frequency signal to a phase detector and to a synchronous detector, c) a variable frequency reference oscillator for supplying a reference signal to said phase detector and to said synchronous detector;

d) a first low pass filter means connected between said phase detector means and a local oscillator of the tuner means and passing frequencies in a band ranging from DC to a first cut-off frequency for controlling said local oscillator; and e) a second low pass filter means connected between said phase detector and said reference oscillator means and passing frequencies in a band ranging from DC to a second cut-off frequency;

f) an automatic fine tuning defeating means connected to said tuner, characterizing that a cut off frequency or said first low pass filter is selected lower than a cut off frequency of said second low pass filter.

2. A circuit according to claim 1, wherein said automatic fine tuning defeating means includes a switch connected between said tuner and said first low pass filter in series.

3. A circuit according to claim 1, wherein a cut off frequency of said first low pass filter is selected about 5-6 Hz, and a cut off frequency of said second low pass filter is selected about 2 MHz.

4. A circuit according to claim 1, wherein said tuner, said phase detector and said first low pass filter form a first phase-locked loop, and said reference oscillator, said phase detector and said second low pass filter form a second phase-locked loop, and the gain of said first phase-locked loop is selected greater than the gain of said second phase-locked loop.

5. A circuit for receiving an AM signal comprising:
tuner means including a local oscillator for converting said AM signal into an IF signal;
phase detector means for providing a phase error signal containing AC and DC components in response to said IF
signal;
synchronous detector means for providing an output signal in response to said IF signal;
means supplying said IF signal to said phase detector means and to said synchronous detector means;
variable frequency reference oscillator means supply-ing a reference signal to said phase detector means and to said synchronous detector means;
first low pass filter means connected between said phase detector means and said local oscillator of the tuner means and passing frequencies in a band ranging from DC to a first cut-off frequency for controlling said local oscillator;
and second low pass filter means connected between said phase detector means and said reference oscillator means and passing frequencies in a band ranging from DC to a second cut-off frequency;
said first cut-off frequency being sufficiently less than said second cut off frequency so that it is possible to effect automatic fine tuning for receiving said AM signal while both the AC and DC components of the phase error signal of said phase detector means are permitted to pass to said reference oscillator means.

6. A circuit according to claim 5, wherein said first cut-off frequency is selected to be about 5-6 Hz and said second cut off frequency is selected to be about 2MHz.

7. A circuit according to claim 5, wherein said tuner means, said phase detector means, and said first low pass filter means form a first phase-locked loop, and said reference oscilla-tor means, said phase detector means, and said second low pass filter means form a second phase-locked loop, and the gain of said first phase-locked loop is selected to be greater than the gain of said second phase-locked loop.

8. A circuit according to claim 5, wherein said second low pass filter means has a transfer characteristic with a peak near said second cut-off frequency.

9. A circuit according to claim 5, wherein said second low pass filter means has a trap transfer characteristic.

10. A circuit according to claim 5, wherein said first cut-off frequency is selected as less than about 6Hz.