CA1117217A - Programmer for implanted pacer - Google Patents
Programmer for implanted pacerInfo
- Publication number
- CA1117217A CA1117217A CA000309558A CA309558A CA1117217A CA 1117217 A CA1117217 A CA 1117217A CA 000309558 A CA000309558 A CA 000309558A CA 309558 A CA309558 A CA 309558A CA 1117217 A CA1117217 A CA 1117217A
- Authority
- CA
- Canada
- Prior art keywords
- output
- pulse
- counter
- pulses
- duration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/372—Arrangements in connection with the implantation of stimulators
- A61N1/37211—Means for communicating with stimulators
- A61N1/37252—Details of algorithms or data aspects of communication system, e.g. handshaking, transmitting specific data or segmenting data
- A61N1/3727—Details of algorithms or data aspects of communication system, e.g. handshaking, transmitting specific data or segmenting data characterised by the modulation technique
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61N—ELECTROTHERAPY; MAGNETOTHERAPY; RADIATION THERAPY; ULTRASOUND THERAPY
- A61N1/00—Electrotherapy; Circuits therefor
- A61N1/18—Applying electric currents by contact electrodes
- A61N1/32—Applying electric currents by contact electrodes alternating or intermittent currents
- A61N1/36—Applying electric currents by contact electrodes alternating or intermittent currents for stimulation
- A61N1/362—Heart stimulators
- A61N1/37—Monitoring; Protecting
-
- G—PHYSICS
- G08—SIGNALLING
- G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
- G08C19/00—Electric signal transmission systems
- G08C19/16—Electric signal transmission systems in which transmission is by pulses
- G08C19/22—Electric signal transmission systems in which transmission is by pulses by varying the duration of individual pulses
Landscapes
- Health & Medical Sciences (AREA)
- Public Health (AREA)
- Life Sciences & Earth Sciences (AREA)
- Veterinary Medicine (AREA)
- General Health & Medical Sciences (AREA)
- Engineering & Computer Science (AREA)
- Biomedical Technology (AREA)
- Animal Behavior & Ethology (AREA)
- Radiology & Medical Imaging (AREA)
- Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
- General Physics & Mathematics (AREA)
- Heart & Thoracic Surgery (AREA)
- Physics & Mathematics (AREA)
- Cardiology (AREA)
- Transmitters (AREA)
- Electrotherapy Devices (AREA)
Abstract
Abstract A plurality of programming bits are placed into a parallel in-serially out register. When the programmer is activated, a monostable resets a counter, and energizes an oscillator which clocks the counter. Three subintervals from the counter are utilized for pulse width modulation of the programing signals. Once for each bit, the output is energized and begins transmitting pulses at the lowest subinterval rate.
Depending upon the logic state of each bit, the transmission pulse is terminated either at the second or the third sub-interval time.
Depending upon the logic state of each bit, the transmission pulse is terminated either at the second or the third sub-interval time.
Description
DL~ II
2~7 Programmer for Implanted Pacer Field of the Invention This invention relates to an apparatus for transmlttlng a preselected signal comprising a sequence of signal bits of different values. Such an apparatus can be termed a programmable transmitter where the signal it is desired to transmit to a S receiver may be selected, or set, prior to transmission. T~e invention is especially concerned with programmable transmitters for enabling programming signals to be transmit~ed to, and received by, implanted, programmable body function control apparatus such as cardiac pacemakers.
Background Art ` 10 Pac~nakers for generating artificial stimulating pulses for the heart, and which may be implanted in the body, are well known. Originally the electrical circuitry for such pacemakers was of analog design, but in recent years digital circuitry nas - been also employed. A digital approach to pacemakers has led to the evolution of programmable pacemakers - pacemakers havlng parameters such as pulse rates which are adjustable (programmable ` once the pacemaker has been implanted. Progra~mable pacemaXers are described in, for-instance, British Specifications 1,385,954 ~ and 1,398,875. Such pacemakers have circuitry to detect and ; 20 decode signals transmitted outside the body and alter the program accordingly. In British Specification 1,385,954 (claiming priority based on U.S.S.N. 141694, in turn a parent of U.S.P.N.
Background Art ` 10 Pac~nakers for generating artificial stimulating pulses for the heart, and which may be implanted in the body, are well known. Originally the electrical circuitry for such pacemakers was of analog design, but in recent years digital circuitry nas - been also employed. A digital approach to pacemakers has led to the evolution of programmable pacemakers - pacemakers havlng parameters such as pulse rates which are adjustable (programmable ` once the pacemaker has been implanted. Progra~mable pacemaXers are described in, for-instance, British Specifications 1,385,954 ~ and 1,398,875. Such pacemakers have circuitry to detect and ; 20 decode signals transmitted outside the body and alter the program accordingly. In British Specification 1,385,954 (claiming priority based on U.S.S.N. 141694, in turn a parent of U.S.P.N.
3,805,796 to Tenz) the programming is accomplished by means of a magnetic field which is sensed by a magnetic reed switch;
~ 25 the ope~ing and closing of the switch provides programming i~ pulses to a program store. In British Specification 1,398,875 ~ ~based on U.S.P.M. 3,833,005 to Wingrove) the programming is ~y .,,,~ I .
. ~
~ , . . ~ . .:
means of radio frequency transmission and reception.
Although much attention has been paid to the development of the implantable programmable pacemaker, there is also a need for an external programmable transmitter which can be programmed with the pacema~er program and this program then accurately transmitted to the implanted pacemaker.
We have now developed a programmable transmitter for usch use.
Disclosure of Invention According to the invention we provide an external programmer for supplying a fixed number of pulse-width modulated signal bits as a program to an implanted, program-mable body function control apparatus which comprises means for preselecting and storing a fixed number of signal bits in a code representative of the ~rogram to be supplied to said implanted apparatus and for supplying said code as an output of said means when actuated, counter means for actuating the said code output, means for actuating the counter, and means responsive to said code output for transmitting said program to said implanted apparatus as a sequence of a said fixed number of pulse-width modulated signal bits.
According to a further broad aspect of the present invention there is provided an external programmer for generating an output signal comprising a fixed numher of pulses each having a preselected ~,~ration, said output signal being supplied to an implanted, programmable body function apparatus for varying given operational functions thereof, comprising:
~.
.
~ ~ .
7Z~7 - 2a -register means for receiving and storing a fixed number of logic bits, each of said logic bits determining the duration of one of the fixed number of pulses in said output signal;
pulse generation means for generating a pulse signal at a predete~mined frequency;
counter means coupled to said pulse g2neration means having a plurality of pulse outputs of different fixed durations, the duration of one of said pulse outputs . being less than that of the remaining pulse outputs, the durations of the remaining pulse outputs corresponding to preselected durations of the pulses comprising said output signal as determined by said logic bits;
output means for transmitting said output signal . to said implanted apparatus;
control means coupling said counter means to said output means for periodically enabling said output means ~ to transmit the fixed number of pulses in said output : signal at a rate corresponding to the duration of said ; one pulse output of said counter means; and .~ logic means coupled to said counter means and - said register means for disabling said output means after each periodic enabling thereof, the duration of each pulse `.~ in said output signal being d~termined by said remaining pulse outputs from said counter means.
Brief Description of the Drawinq Preferred features of the invention will now be described, by way of example, with reference to the accompany-- ing drawings, in which:
., ~
, ,~
. ..
~17217 - 2b -FIGURE 1 shows schematically the electrical circuit diagram of an external programmer for encoding an 8-bit program, and for transmitt~ng the program to an implanted, programmable cardiac pacemaker, FIGURE 2 is a timing diagram for use with Figure 1, and :~
FIGURE 3 shows schematically the electrical : circuit diagram of an alternative embodiment.
Best Mode of Carryin~ Out the Invention The illustrated programmer is designed to transmit an 8-bit tone burst modulated program, that is, an 8-bit `-pulse width modulated signal where a sine wave carrier frequency is pulse width modulated by each of the 8 data bits.
Referring to Figure 1, the programmer comprises a . ~
~, ~L'17%~L7 "press-to-program" switch 1 tied between the positive supply rail and earth. The switch output drives a monostable 2.
The monostable 2 is employed to reset a 13 stage counter 3, and to control an oscillator 4. The oscillator 4 includes an "oscillator disable" NOR gate 16 on its input side which, when supplied with a high input from monostable 2, provides a low output which disables the oscillator output to a clock input of counter 3.
Only the Ql, Q6, Q9, and Q13 stages of counter 3 are employed. Stage Q9 is employed to clock a parallel in/serial out eight bit shift register 5 via an inverter 6. The eight parallel inputs for shift register 5 (PI 1 to 8) are labelled A to H and the values of such inputs are set by eight switches which individually can be connected to the positive supply rail or to earth.
The outputs from the Q6 stage of counter 3, inverter 6, ; and the serial output Q8 of shift register 5 drive a pulse sterring network composed of NOR gates 7, 9, and lQ and inverter 8.
The Q9 stage of counter 3 also clocks a D-type flip-flop 11 whose D-input is tied to the ~ositive supply rail.
The Q output of flip-flop 11 is supplied to one input of a N~D gate 12; whose second input is supplied by ~he Ql stage of counter 3. N~D gate 12 drives an amplifier/transmitter 13, outputs from which are transmitted into the body for receipt by an implanted cardiac pacemaker where the received pulses are decoded and employed for changing the program stored in -the pacema~er.
The output o NOR gate 10 clocks a further D-type flip-flop 14, whose D-input and reset are drivenby the Q and Q outputs, respectively, of flip-flop 11. The Q output of flip-flop 14 is employed to reset flip flop 11.
The operation o~ the programmer will now be described generally and then in detail with reference also to the timing diagram of Figure 2, which illustrates the pulses at the positions indicated on Figure 1.
" The pacemà]~er program transmitted by amplifier/tr~ns-mitter 13 consists of an eighk bit pulse-width modulated signal, i; -. wherein each pulse is itself several cycles of a sine wave .
.
, .
,~
:,: . , 11~7Z ~ '' carrier frequency. The pulses of short bit length (which might represent "0" in the pacemaker program) and long bit : le~gth ("l") are determined by the signal supplied to N~iD
gate 12 from flip-flop ll and are initially generated by the values selected by the settings of the eight switches on the inputs A to H of shift register 5.- The carrier frequency present in each pulse is derived from the rapid transitions made by the Ql stage of counter 3, as supplied to the second input of NAI~D gate 12. The output of NAND gate 12 is thus the square wave carrier frequency from Ql modulated by the long or short bit lengths determined by the switching times of flip-flop 11.
After passage through amplifier/transmitter 13, this output becomes the tone burst modulated signal describe~ above.
Referring to the operation in more detail, with the press-to-program switch normally open, the monostable 2 out~ut remains high maintaining a reset on counter 3 and disabling oscillator 4.
When it is desired to change the 8-bit program stored in the implanted pacemaker, the values of the 8-bits are selected by providing an appropriate combination of values through opening or closing each of the eight switches on the inputs to shift register 5. In the example given, referring to Figure 2, the inputs H, G, D, and B are tied -to the positive supply rail whereas inputs F, E, C, and A are earthea. Lhis will provide, as to be described, for transmission by ampllfier/
: transmitter 13, the program 00110101 where "0" represents a pulse of short length ~and "1" of long length), it being ; appreciated that the values are transmitted in the sequence HGFEDCBA. This arises since the first value appearing at the Q8 output of shift register 5 ls the value of the PI 8 input (H).
; To transmit the selected program, the press-to-program switch l is depressed. This causes monostable 2 to fire (i.e.
causing its output to go low), thus removing the reset from counter 3 and allowing oscillator 4 to commence running at a period To determined by its timing components. Counter 3 will .~ increment by l count on every negative clock edge provided by oscilla~or 4.
; At a count of Q9, flip-flop 11 clocks the level of its ~'1'7Z~L7 --, D-input to its Q output, putting Q "high" and Q "low"~ This removes the reset on flip-flop 14 and places its D-input "high".
The "high" output of Q is also applied to NAND gate 12 to - commence transmission of the first bit in the 8-bit sequence of data~ The next positive edge on the clock input of flip-flop 14 will clock its Q output to "high", thus resetting flip-flop 11. The reset of the latter will, in turn, reset flip-flop 14, causing its Q output to go "low" and terminate transmission of the first bit in the 8-bit sequence.
The time at which flip-flop 14 clocks a "high" to its ¦ Q output determines the width of the flip-flop 11 Q output and - hence the pulse width of the modulation at point C in Figure 1.
It is dependent upon the state of the steering network comprising components 7, 8, 9, and 10. The level on the Q8 output of shift register 5 determines whether the clock pulse for flip-flop 14 arises via NOR gate 7 or 9 and is derived from either the Q6 ¦ or Q9 stage of counter 3. With gate 7 enabled, the first positive edge on the flip-flop 14 cloc]c input occurs at 32To from the time the flip-flop 11 Q output went "high". With gate 9 enabled, this first positive edge occurs at 256To from the time the flip-flop 11 Q output went "high".
Initially, the Q8 output of shift register 5 represents the value at its H input ("high") and this causes the pulse supplied by flip-flop 11 to NAND gate 12 to be cut off after 32To (i.e. causing a short pulse representing "0" to be txans-mitted).
Subsequent bits-are then transmitted as the values of the seven remaining shift register stages are sequentially cloc~ed to the Q8 ou~put of shift register 5, The bits are transmitted at each positive transition of the Q9 stage of ~i counter 3 until Q13 is reached. Shift register 5 is clocked on ea~h negative edge of the Q9 stage of counter 3. When the Q13 stage of counter 3 goes high this resets monostable 2 to its initial condition, resets counter 3 and disables the oscillator
~ 25 the ope~ing and closing of the switch provides programming i~ pulses to a program store. In British Specification 1,398,875 ~ ~based on U.S.P.M. 3,833,005 to Wingrove) the programming is ~y .,,,~ I .
. ~
~ , . . ~ . .:
means of radio frequency transmission and reception.
Although much attention has been paid to the development of the implantable programmable pacemaker, there is also a need for an external programmable transmitter which can be programmed with the pacema~er program and this program then accurately transmitted to the implanted pacemaker.
We have now developed a programmable transmitter for usch use.
Disclosure of Invention According to the invention we provide an external programmer for supplying a fixed number of pulse-width modulated signal bits as a program to an implanted, program-mable body function control apparatus which comprises means for preselecting and storing a fixed number of signal bits in a code representative of the ~rogram to be supplied to said implanted apparatus and for supplying said code as an output of said means when actuated, counter means for actuating the said code output, means for actuating the counter, and means responsive to said code output for transmitting said program to said implanted apparatus as a sequence of a said fixed number of pulse-width modulated signal bits.
According to a further broad aspect of the present invention there is provided an external programmer for generating an output signal comprising a fixed numher of pulses each having a preselected ~,~ration, said output signal being supplied to an implanted, programmable body function apparatus for varying given operational functions thereof, comprising:
~.
.
~ ~ .
7Z~7 - 2a -register means for receiving and storing a fixed number of logic bits, each of said logic bits determining the duration of one of the fixed number of pulses in said output signal;
pulse generation means for generating a pulse signal at a predete~mined frequency;
counter means coupled to said pulse g2neration means having a plurality of pulse outputs of different fixed durations, the duration of one of said pulse outputs . being less than that of the remaining pulse outputs, the durations of the remaining pulse outputs corresponding to preselected durations of the pulses comprising said output signal as determined by said logic bits;
output means for transmitting said output signal . to said implanted apparatus;
control means coupling said counter means to said output means for periodically enabling said output means ~ to transmit the fixed number of pulses in said output : signal at a rate corresponding to the duration of said ; one pulse output of said counter means; and .~ logic means coupled to said counter means and - said register means for disabling said output means after each periodic enabling thereof, the duration of each pulse `.~ in said output signal being d~termined by said remaining pulse outputs from said counter means.
Brief Description of the Drawinq Preferred features of the invention will now be described, by way of example, with reference to the accompany-- ing drawings, in which:
., ~
, ,~
. ..
~17217 - 2b -FIGURE 1 shows schematically the electrical circuit diagram of an external programmer for encoding an 8-bit program, and for transmitt~ng the program to an implanted, programmable cardiac pacemaker, FIGURE 2 is a timing diagram for use with Figure 1, and :~
FIGURE 3 shows schematically the electrical : circuit diagram of an alternative embodiment.
Best Mode of Carryin~ Out the Invention The illustrated programmer is designed to transmit an 8-bit tone burst modulated program, that is, an 8-bit `-pulse width modulated signal where a sine wave carrier frequency is pulse width modulated by each of the 8 data bits.
Referring to Figure 1, the programmer comprises a . ~
~, ~L'17%~L7 "press-to-program" switch 1 tied between the positive supply rail and earth. The switch output drives a monostable 2.
The monostable 2 is employed to reset a 13 stage counter 3, and to control an oscillator 4. The oscillator 4 includes an "oscillator disable" NOR gate 16 on its input side which, when supplied with a high input from monostable 2, provides a low output which disables the oscillator output to a clock input of counter 3.
Only the Ql, Q6, Q9, and Q13 stages of counter 3 are employed. Stage Q9 is employed to clock a parallel in/serial out eight bit shift register 5 via an inverter 6. The eight parallel inputs for shift register 5 (PI 1 to 8) are labelled A to H and the values of such inputs are set by eight switches which individually can be connected to the positive supply rail or to earth.
The outputs from the Q6 stage of counter 3, inverter 6, ; and the serial output Q8 of shift register 5 drive a pulse sterring network composed of NOR gates 7, 9, and lQ and inverter 8.
The Q9 stage of counter 3 also clocks a D-type flip-flop 11 whose D-input is tied to the ~ositive supply rail.
The Q output of flip-flop 11 is supplied to one input of a N~D gate 12; whose second input is supplied by ~he Ql stage of counter 3. N~D gate 12 drives an amplifier/transmitter 13, outputs from which are transmitted into the body for receipt by an implanted cardiac pacemaker where the received pulses are decoded and employed for changing the program stored in -the pacema~er.
The output o NOR gate 10 clocks a further D-type flip-flop 14, whose D-input and reset are drivenby the Q and Q outputs, respectively, of flip-flop 11. The Q output of flip-flop 14 is employed to reset flip flop 11.
The operation o~ the programmer will now be described generally and then in detail with reference also to the timing diagram of Figure 2, which illustrates the pulses at the positions indicated on Figure 1.
" The pacemà]~er program transmitted by amplifier/tr~ns-mitter 13 consists of an eighk bit pulse-width modulated signal, i; -. wherein each pulse is itself several cycles of a sine wave .
.
, .
,~
:,: . , 11~7Z ~ '' carrier frequency. The pulses of short bit length (which might represent "0" in the pacemaker program) and long bit : le~gth ("l") are determined by the signal supplied to N~iD
gate 12 from flip-flop ll and are initially generated by the values selected by the settings of the eight switches on the inputs A to H of shift register 5.- The carrier frequency present in each pulse is derived from the rapid transitions made by the Ql stage of counter 3, as supplied to the second input of NAI~D gate 12. The output of NAND gate 12 is thus the square wave carrier frequency from Ql modulated by the long or short bit lengths determined by the switching times of flip-flop 11.
After passage through amplifier/transmitter 13, this output becomes the tone burst modulated signal describe~ above.
Referring to the operation in more detail, with the press-to-program switch normally open, the monostable 2 out~ut remains high maintaining a reset on counter 3 and disabling oscillator 4.
When it is desired to change the 8-bit program stored in the implanted pacemaker, the values of the 8-bits are selected by providing an appropriate combination of values through opening or closing each of the eight switches on the inputs to shift register 5. In the example given, referring to Figure 2, the inputs H, G, D, and B are tied -to the positive supply rail whereas inputs F, E, C, and A are earthea. Lhis will provide, as to be described, for transmission by ampllfier/
: transmitter 13, the program 00110101 where "0" represents a pulse of short length ~and "1" of long length), it being ; appreciated that the values are transmitted in the sequence HGFEDCBA. This arises since the first value appearing at the Q8 output of shift register 5 ls the value of the PI 8 input (H).
; To transmit the selected program, the press-to-program switch l is depressed. This causes monostable 2 to fire (i.e.
causing its output to go low), thus removing the reset from counter 3 and allowing oscillator 4 to commence running at a period To determined by its timing components. Counter 3 will .~ increment by l count on every negative clock edge provided by oscilla~or 4.
; At a count of Q9, flip-flop 11 clocks the level of its ~'1'7Z~L7 --, D-input to its Q output, putting Q "high" and Q "low"~ This removes the reset on flip-flop 14 and places its D-input "high".
The "high" output of Q is also applied to NAND gate 12 to - commence transmission of the first bit in the 8-bit sequence of data~ The next positive edge on the clock input of flip-flop 14 will clock its Q output to "high", thus resetting flip-flop 11. The reset of the latter will, in turn, reset flip-flop 14, causing its Q output to go "low" and terminate transmission of the first bit in the 8-bit sequence.
The time at which flip-flop 14 clocks a "high" to its ¦ Q output determines the width of the flip-flop 11 Q output and - hence the pulse width of the modulation at point C in Figure 1.
It is dependent upon the state of the steering network comprising components 7, 8, 9, and 10. The level on the Q8 output of shift register 5 determines whether the clock pulse for flip-flop 14 arises via NOR gate 7 or 9 and is derived from either the Q6 ¦ or Q9 stage of counter 3. With gate 7 enabled, the first positive edge on the flip-flop 14 cloc]c input occurs at 32To from the time the flip-flop 11 Q output went "high". With gate 9 enabled, this first positive edge occurs at 256To from the time the flip-flop 11 Q output went "high".
Initially, the Q8 output of shift register 5 represents the value at its H input ("high") and this causes the pulse supplied by flip-flop 11 to NAND gate 12 to be cut off after 32To (i.e. causing a short pulse representing "0" to be txans-mitted).
Subsequent bits-are then transmitted as the values of the seven remaining shift register stages are sequentially cloc~ed to the Q8 ou~put of shift register 5, The bits are transmitted at each positive transition of the Q9 stage of ~i counter 3 until Q13 is reached. Shift register 5 is clocked on ea~h negative edge of the Q9 stage of counter 3. When the Q13 stage of counter 3 goes high this resets monostable 2 to its initial condition, resets counter 3 and disables the oscillator
4. By this time the values of all eight stages of shift ` register 5 will have appeared at the Q8 output and the corre-spondin~ 8-bits will have been transmitted by amplifier/trans-- mitter l3.
.. In a typical programmer constructed as descibed, To was .' :: ,.
L'17%~
set to 0.05 ms: this provided short pulses of 1~6 ms in width and long pulses of 12.8 ms in width~ These pulses were each modulated via the Ql stage of counter 3 at 10 KHz.
The alternative embodiment shown in Figure 3 will now be described.
Referring to Figure 3, the programmer again comprises a "press-to-program" switch 1 tied between the electrical supply rails. The switch output drives a monostable 2. The monostable 2 is employed to reset a 13 stage counter 3, to control an oscillator 4, and to reset a decade counter 15. The oscillator 4 includes an "oscillator disable" NOR gate 16 which, when supplied with a high input ~rom monostable 2, provides a low output which disables the oscillator output to a clock input of counter 3.
The Q7, 8 and 9 output stages of counter 3 are combined through a NAND gate 17 and a NOR gate 18 to provide a "short"
output pulse to a transmission gate 19. The Q9 output stage of counter 3 provides a "long" output pulse to a transmission gate 2Q and, through inverter 21, to the clock input of the decade counter 15.
A NAND gate 22 receives the Ql output of counter 3 and also the outputs of transmission gates 19 and 20~ The output of NAND gate 22 drives an amplifier/transmitter 23, output pulses from which are transmitted into the body for receipt by an implanted programmable cardiac pacemaker where the received pulses are decoded and employed for changing the program stored in the pacemaker.
The Q13 output-of counter 3 is supplied to a disable input of monostable 2.
~0 The decade counter 15 has eight output stages ~0 to 7) which are successively employed to control (turn on and off) eight transmission gates which, in this embodiment, take the form of two quad/bilateral switches 24. The eight gates formed by the switches 24 each receive an input from a selector switch 35 25. The switches 25 ("A" to "H") can be individually connected to the positive supply rail or to earth. The eight outputs of the switches 24 are coupled together to provide a common bus 26 which is employed to control transmission gate 2~ and ~via inverter 271 transmission gate 19.
:
, 7Z~7 "
The operation of the programmer will now be described first generally and then in more detail.
The counts which are supplied by counter 3 to trans-mission gates 19 and 20 supply pulses representative of short bit lengths (e.g. "0") and long ~it lengths (e.g. "1"). The 8-bit program desired is selected by setting the switches 25 appropriately and these values are sequentially clocked onto the common bus 26 to open either transmission gate 19 or 20 depending upon the logic value supplied on bus 26. The short or long pulse supplied to the amplifier/txansmitter 23 from the opene~ transmission gate 19 or 20 is employed to modulate the higher frequency count supplied to M~ND gate 22 from the Q~ stagP
of counter 3 so that the output of the amplifier/transmitter is ; an 8-bit tone burst signal.
Referring to the operation in more detail, with the press to program switch 1 nor~ally open, the monostable 2 output remains high, maintaining a reset on counters 3 and 15 ; and disabling oscillator 4. No output is provided to amplifier/
transmitter 23. When it is desired to change the 8-bit program stored in the implanted pacemaker, the values of the 8-bits are selected by providing an appropriate combination of values throllgh opening or closing each of the switches 25. The press to program switch 1 is then pressed. Pressing, i.e. closing, switch 1 causes monostable 2 to fire (i.e. causing its output to go low), thus removing the reset from the counters 3 to lS and allowing oscillator 4 to commence running. The removal of the reset to decade counter 15 leaves a count at its "zero" stage, which opens the transmission gate in switches 24 corresponding to switch 25 "A". The output of switch 25 "A" is supplied on common bus 26 and depending on its logic value, opens either transmission gate 19 or 20 thus to supply either a shoxt pulse or a long pulse to NAND gate 22. This short or long pulse modulates the high frequency output o-E the Ql stage of counter 3, and is amplified and transmitted by amplifier/transmitter 23.
As soon as the Q9 stage of counter 3 falls, decade counter 15 is incremented by one so that the count, now at its "one" stage, causes the output value supplied by switch 25 "B" rather than 25 "A" to control which of the transmission :, `' :" ~
. : :~
Z~7 -`
.
gates 13 and 20 is opened~ The short or long pulse (modulating the Ql high frequency output as before~ is again -transmitted by amplifier/transmitter 23.
This cycle repeats for each of the eight switches 25 so that a total of eight tone burst modulated pulses, of either short or long width, is transmitted. Once the eighth pulse has been transmitted, the Q13 stage of counter 3 is then reached to disable monostable 2. This causes the latter to revert to its stable state, which reintroduces a reset to counters 3 and 15 and disables oscillator 4. No further information is hence transmitted until the press to program switch 1 is once again depressed, when the whole cycle would then repeat.
Typically, the oscillator has a 20 KHz frequency. This provides a 10 KHz output at the Ql stage of counter 3, a pulse length of 3 2 ms to transmission gatç 19 (a "short" pulse~, a pulse length of 12.8 ms to transmission gate 20 (a "long"
pulse~, and a data rate for clocking decade counter 15 of 25.6 ms The NAND gate 22 thus transmits to amplifier~transmitter 23 eight bits, either of 3.2 ms or 12.8 ms in wïdth and each including a 10 KHz square wave carrier.
.
- ~ , . .
.. In a typical programmer constructed as descibed, To was .' :: ,.
L'17%~
set to 0.05 ms: this provided short pulses of 1~6 ms in width and long pulses of 12.8 ms in width~ These pulses were each modulated via the Ql stage of counter 3 at 10 KHz.
The alternative embodiment shown in Figure 3 will now be described.
Referring to Figure 3, the programmer again comprises a "press-to-program" switch 1 tied between the electrical supply rails. The switch output drives a monostable 2. The monostable 2 is employed to reset a 13 stage counter 3, to control an oscillator 4, and to reset a decade counter 15. The oscillator 4 includes an "oscillator disable" NOR gate 16 which, when supplied with a high input ~rom monostable 2, provides a low output which disables the oscillator output to a clock input of counter 3.
The Q7, 8 and 9 output stages of counter 3 are combined through a NAND gate 17 and a NOR gate 18 to provide a "short"
output pulse to a transmission gate 19. The Q9 output stage of counter 3 provides a "long" output pulse to a transmission gate 2Q and, through inverter 21, to the clock input of the decade counter 15.
A NAND gate 22 receives the Ql output of counter 3 and also the outputs of transmission gates 19 and 20~ The output of NAND gate 22 drives an amplifier/transmitter 23, output pulses from which are transmitted into the body for receipt by an implanted programmable cardiac pacemaker where the received pulses are decoded and employed for changing the program stored in the pacemaker.
The Q13 output-of counter 3 is supplied to a disable input of monostable 2.
~0 The decade counter 15 has eight output stages ~0 to 7) which are successively employed to control (turn on and off) eight transmission gates which, in this embodiment, take the form of two quad/bilateral switches 24. The eight gates formed by the switches 24 each receive an input from a selector switch 35 25. The switches 25 ("A" to "H") can be individually connected to the positive supply rail or to earth. The eight outputs of the switches 24 are coupled together to provide a common bus 26 which is employed to control transmission gate 2~ and ~via inverter 271 transmission gate 19.
:
, 7Z~7 "
The operation of the programmer will now be described first generally and then in more detail.
The counts which are supplied by counter 3 to trans-mission gates 19 and 20 supply pulses representative of short bit lengths (e.g. "0") and long ~it lengths (e.g. "1"). The 8-bit program desired is selected by setting the switches 25 appropriately and these values are sequentially clocked onto the common bus 26 to open either transmission gate 19 or 20 depending upon the logic value supplied on bus 26. The short or long pulse supplied to the amplifier/txansmitter 23 from the opene~ transmission gate 19 or 20 is employed to modulate the higher frequency count supplied to M~ND gate 22 from the Q~ stagP
of counter 3 so that the output of the amplifier/transmitter is ; an 8-bit tone burst signal.
Referring to the operation in more detail, with the press to program switch 1 nor~ally open, the monostable 2 output remains high, maintaining a reset on counters 3 and 15 ; and disabling oscillator 4. No output is provided to amplifier/
transmitter 23. When it is desired to change the 8-bit program stored in the implanted pacemaker, the values of the 8-bits are selected by providing an appropriate combination of values throllgh opening or closing each of the switches 25. The press to program switch 1 is then pressed. Pressing, i.e. closing, switch 1 causes monostable 2 to fire (i.e. causing its output to go low), thus removing the reset from the counters 3 to lS and allowing oscillator 4 to commence running. The removal of the reset to decade counter 15 leaves a count at its "zero" stage, which opens the transmission gate in switches 24 corresponding to switch 25 "A". The output of switch 25 "A" is supplied on common bus 26 and depending on its logic value, opens either transmission gate 19 or 20 thus to supply either a shoxt pulse or a long pulse to NAND gate 22. This short or long pulse modulates the high frequency output o-E the Ql stage of counter 3, and is amplified and transmitted by amplifier/transmitter 23.
As soon as the Q9 stage of counter 3 falls, decade counter 15 is incremented by one so that the count, now at its "one" stage, causes the output value supplied by switch 25 "B" rather than 25 "A" to control which of the transmission :, `' :" ~
. : :~
Z~7 -`
.
gates 13 and 20 is opened~ The short or long pulse (modulating the Ql high frequency output as before~ is again -transmitted by amplifier/transmitter 23.
This cycle repeats for each of the eight switches 25 so that a total of eight tone burst modulated pulses, of either short or long width, is transmitted. Once the eighth pulse has been transmitted, the Q13 stage of counter 3 is then reached to disable monostable 2. This causes the latter to revert to its stable state, which reintroduces a reset to counters 3 and 15 and disables oscillator 4. No further information is hence transmitted until the press to program switch 1 is once again depressed, when the whole cycle would then repeat.
Typically, the oscillator has a 20 KHz frequency. This provides a 10 KHz output at the Ql stage of counter 3, a pulse length of 3 2 ms to transmission gatç 19 (a "short" pulse~, a pulse length of 12.8 ms to transmission gate 20 (a "long"
pulse~, and a data rate for clocking decade counter 15 of 25.6 ms The NAND gate 22 thus transmits to amplifier~transmitter 23 eight bits, either of 3.2 ms or 12.8 ms in wïdth and each including a 10 KHz square wave carrier.
.
- ~ , . .
Claims (5)
1. An external programmer for generating an output signal comprising a fixed number of pulses each having a preselected duration, said output signal being supplied to an implanted, programmable body function apparatus for varying given operational functions thereof, comprising:
register means for receiving and storing a fixed number of logic bits, each of said logic bits determining the duration of one of the fixed number of pulses in said output signal, pulse generation means for generating a pulse signal at a predetermined frequency;
counter means coupled to said pulse generation means having a plurality of pulse outputs of different fixed dura-tions, the duration of one of said pulse outputs being less than that of the remaining pulse outputs, the durations of the remaining pulse outputs corresponding to preselected duration of the pulses comprising said output signal as deter-mined by said logic bits;
output means for transmitting said output signal to said implanted apparatus;
control means coupling said counter means to said output means for periodically enabling said output means to transmit the fixed number of pulses in said output signal at a rate corresponding to the duration of said one pulse output of said counter means; and logic means coupled to said counter means and said register means for disabling said output means after each periodic enabling thereof, the duration of each pulse in said output signal being determined by said remaining pulse outputs from said counter means.
register means for receiving and storing a fixed number of logic bits, each of said logic bits determining the duration of one of the fixed number of pulses in said output signal, pulse generation means for generating a pulse signal at a predetermined frequency;
counter means coupled to said pulse generation means having a plurality of pulse outputs of different fixed dura-tions, the duration of one of said pulse outputs being less than that of the remaining pulse outputs, the durations of the remaining pulse outputs corresponding to preselected duration of the pulses comprising said output signal as deter-mined by said logic bits;
output means for transmitting said output signal to said implanted apparatus;
control means coupling said counter means to said output means for periodically enabling said output means to transmit the fixed number of pulses in said output signal at a rate corresponding to the duration of said one pulse output of said counter means; and logic means coupled to said counter means and said register means for disabling said output means after each periodic enabling thereof, the duration of each pulse in said output signal being determined by said remaining pulse outputs from said counter means.
2. A programmer according to claim 1 wherein the duration of each of the pulses in said output signal has either a first or second value corresponding to a first or second logic bit received by said register means and said counter means has first, second and third pulse outputs wherein said first output periodically enables said output means to transmit the fixed number of pulses in said output signal at a rate corresponding to the duration of said first pulse output, and said logic means couples either said second or third pulse output from said counter means to said output means, after each periodic enabling thereof, to disable said output means, the duration of the pulses in said output signal having said first value when said output means is disabled by the second pulse output from said counter means and having said second value when said output means is dis-abled by the third pulse output of said counter means.
3. A programmer according to claim 2 wherein said logic means comprises at least two transmission gates, said counter means supplying inputs to said gates and the outputs supplied to said output means by said gates being controlled by said fixed number of logic bits.
4. A programmer according to claim 3 wherein said control means for enabling said output means comprises a first flip-flop, and said logic means further comprises a second flip-flop for disabling said output means thereby controlling the duration of the pulses in said output signal.
5. A programmer according to claim 1 wherein said pulse generating means comprises:
programmer activating switch means' monostable means, energized by said switch means, for resetting said counter after the fixed number of pulses in said output signal has been generated; and oscillator means, enabled by said monostable means, for providing a clock signal to said counter.
programmer activating switch means' monostable means, energized by said switch means, for resetting said counter after the fixed number of pulses in said output signal has been generated; and oscillator means, enabled by said monostable means, for providing a clock signal to said counter.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB34912/77 | 1977-08-19 | ||
| GB3491277 | 1977-08-19 | ||
| US917,139 | 1978-06-19 | ||
| US05/917,139 US4211235A (en) | 1977-08-19 | 1978-06-19 | Programmer for implanted pacer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1117217A true CA1117217A (en) | 1982-01-26 |
Family
ID=26262488
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000309558A Expired CA1117217A (en) | 1977-08-19 | 1978-08-17 | Programmer for implanted pacer |
Country Status (4)
| Country | Link |
|---|---|
| EP (1) | EP0000986B1 (en) |
| AU (1) | AU517553B2 (en) |
| CA (1) | CA1117217A (en) |
| DE (1) | DE2861717D1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IT1118131B (en) * | 1978-07-20 | 1986-02-24 | Medtronic Inc | IMPROVEMENT IN MULTI-MODE CARDIAC PACEMAKERS ADAPTABLE IMPLANTABLE |
| EP0015779B1 (en) * | 1979-03-12 | 1985-06-12 | Medtronic, Inc. | Apparatus for programming a pacemaker |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3906348A (en) * | 1973-08-20 | 1975-09-16 | Chamberlain Mfg Corp | Digital radio control |
| US4024875A (en) * | 1975-09-19 | 1977-05-24 | Medtronic, Inc. | Device for non-invasive programming of implanted body stimulators |
| US4049004A (en) * | 1976-02-02 | 1977-09-20 | Arco Medical Products Company | Implantable digital cardiac pacer having externally selectible operating parameters and "one shot" digital pulse generator for use therein |
| NL7700427A (en) * | 1976-03-03 | 1977-09-06 | Arco Med Prod Co | PLANTABLE DIGITAL PASSENGER WHICH IS FITTED WITH EXTERNALLY SELECTABLE BUSINESS PARAMETERS. |
-
1978
- 1978-08-03 EP EP78300240A patent/EP0000986B1/en not_active Expired
- 1978-08-03 DE DE7878300240T patent/DE2861717D1/en not_active Expired
- 1978-08-16 AU AU38953/78A patent/AU517553B2/en not_active Expired
- 1978-08-17 CA CA000309558A patent/CA1117217A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2861717D1 (en) | 1982-05-19 |
| EP0000986B1 (en) | 1982-04-07 |
| AU3895378A (en) | 1980-02-21 |
| EP0000986A1 (en) | 1979-03-07 |
| AU517553B2 (en) | 1981-08-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4211235A (en) | Programmer for implanted pacer | |
| US5127404A (en) | Telemetry format for implanted medical device | |
| US4539992A (en) | Method and apparatus for communicating with implanted body function stimulator | |
| AU682199B2 (en) | Pacemaker telemetry system | |
| EP0781153B1 (en) | Method and apparatus to limit control of parameters of electrical neurological tissue stimulators | |
| US4556063A (en) | Telemetry system for a medical device | |
| US4124031A (en) | Programmable pacer | |
| US5752977A (en) | Efficient high data rate telemetry format for implanted medical device | |
| US4520825A (en) | Digital circuit for control of gradual turn-on of electrical tissue stimulators | |
| US4424812A (en) | Implantable externally programmable microprocessor-controlled tissue stimulator | |
| US4453162A (en) | Efficient and fast-switching telemetry transmitter | |
| US4024875A (en) | Device for non-invasive programming of implanted body stimulators | |
| US4126139A (en) | Method and means for receiving parameter control data in an implantable heart pacer | |
| WO1994016769A1 (en) | Medical device telemetry with bit/data value encoding | |
| US4203447A (en) | Security maintenance for programmable pacer reprogramming | |
| EP0001156B1 (en) | Programmable, implantable body function control apparatus and method for reprogramming said apparatus | |
| JPH05503646A (en) | Improved telemetry method | |
| CA1117217A (en) | Programmer for implanted pacer | |
| CA1183576A (en) | Telemetry system for a medical device | |
| US4164944A (en) | Digital means for non-invasively controlling the parameters of an implantable heart pacer | |
| EP0107483A1 (en) | Pacemaker programmer with telemetric functions | |
| US4190055A (en) | Circuit for determining the parameter control states of an implanted pacer | |
| CN100438364C (en) | Broadcast audio communication from implantable medical device | |
| EP0000985A1 (en) | Program alteration security for programmable pacers | |
| CA1187140A (en) | Telemetry system for a medical device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |