CA1103747A - Tuned oscillator ballast circuit - Google Patents
Tuned oscillator ballast circuitInfo
- Publication number
- CA1103747A CA1103747A CA290,517A CA290517A CA1103747A CA 1103747 A CA1103747 A CA 1103747A CA 290517 A CA290517 A CA 290517A CA 1103747 A CA1103747 A CA 1103747A
- Authority
- CA
- Canada
- Prior art keywords
- circuit
- oscillator
- transformer
- coupled
- pulsed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
- H05B41/14—Circuit arrangements
- H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
- H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
- H05B41/282—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
- H05B41/285—Arrangements for protecting lamps or circuits against abnormal operating conditions
- H05B41/2851—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions
- H05B41/2855—Arrangements for protecting lamps or circuits against abnormal operating conditions for protecting the circuit against abnormal operating conditions against abnormal lamp operating conditions
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S315/00—Electric lamp and discharge devices: systems
- Y10S315/02—High frequency starting operation for fluorescent lamp
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S315/00—Electric lamp and discharge devices: systems
- Y10S315/05—Starting and operating circuit for fluorescent lamp
Landscapes
- Circuit Arrangements For Discharge Lamps (AREA)
- Inverter Devices (AREA)
Abstract
SINUSOIDAL WAVE OSCILLATOR
BALLAST CIRCUIT
ABSTRACT OF THE DISCLOSURE
A sinusoidal wave oscillator ballast circuit includes a tuned oscillator coupled to a DC rectifier means coupled by a power factor correction circuit to an AC potential source. The oscillator is coupled to an inductor means including a first and second transformer means with the secondary winding of the first transformer means coupled to the oscillator, the primary of the first transformer means in series connection with a capacitor and the primary winding of the second transformer means to form a resonant circuit, a first secondary winding of the second transformer means coupled to a lamp circuit to form a load circuit shunting the capacitor of the resonant circuit and a second secondary winding of the second transformer means having opposite ends connected by clamping diodes to the DC rectifier mean.
Means for compensating for "storage time" of the transistor of the oscillator and for conditioning the line to transients and radio frequency interference (RFI) are also provided.
BALLAST CIRCUIT
ABSTRACT OF THE DISCLOSURE
A sinusoidal wave oscillator ballast circuit includes a tuned oscillator coupled to a DC rectifier means coupled by a power factor correction circuit to an AC potential source. The oscillator is coupled to an inductor means including a first and second transformer means with the secondary winding of the first transformer means coupled to the oscillator, the primary of the first transformer means in series connection with a capacitor and the primary winding of the second transformer means to form a resonant circuit, a first secondary winding of the second transformer means coupled to a lamp circuit to form a load circuit shunting the capacitor of the resonant circuit and a second secondary winding of the second transformer means having opposite ends connected by clamping diodes to the DC rectifier mean.
Means for compensating for "storage time" of the transistor of the oscillator and for conditioning the line to transients and radio frequency interference (RFI) are also provided.
Description
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SINUSOIDAL WAVE OSCILLATOR BALLAST CIRCUIT
CROSS-REFEKENCE TO OTHER APPLICATIONS
Canadian patent 1,079,34~ in -the name of the inventor of the present application and assigned to the assignee of the presen-t ap-plica-tion relates to a -tuned oscilla-tor type of ballast circuit hav-ing a plurality of inductive windings associated with an oscillator to effect development of a resonant circuit, activation of the oscillator, coupling to a load circuit, and clamping of the cir-cui-try to inhibit uncontrolled current Flow -through ti-e oscillator.
BACKGROUND OF THE INVENTION
This invention relates -to sinusoidal wave oscillator ballast circuits and especially -to such circui-try suitable for use with fluorescent lamps of the 35 to ~0 watt variety.
Presently manufactured ballast circuits for fluorescent lamps are, most frequently, of the 120 Hz auto-transformer type. Therein, the saturation charactertis-tic of the transformer is employed to provide the desired currents necessary to the operation of a fluorescent lamp.
However, the auto-transformer -type of ballast is known to be relatively heavy and cumbersome. Also, it is known that such apparatus is rela-tively inefficient which leads to excessive heat generation as well as energy loss. ~loreover~ the operational capa-bilities are something less than desired in view of the relatively ~ low operational frequency of 120 Hz which is well within -the audible range.
Another known form of lamp ballast circuitry employs a flip-flop type oscillator circuit in cooperation with a saturable core trans-former. A transistor of the oscillator satura-tes and effects saturation of the core material of the transformer to limit curren-t flow and inhibit lamp burnout. However, core material saturation characteristics are relatively erratic and unpredictable which ren-ders such circuitry undesirable or at best, rnos-t difficult to accurately predict or con-trol.
In still another form of lamp ballast circuitry, a rectangular-shaped waveform is developed and applied -to a filter ,'~' ~.~
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SINUSOIDAL WAVE OSCILLATOR BALLAST CIRCUIT
CROSS-REFEKENCE TO OTHER APPLICATIONS
Canadian patent 1,079,34~ in -the name of the inventor of the present application and assigned to the assignee of the presen-t ap-plica-tion relates to a -tuned oscilla-tor type of ballast circuit hav-ing a plurality of inductive windings associated with an oscillator to effect development of a resonant circuit, activation of the oscillator, coupling to a load circuit, and clamping of the cir-cui-try to inhibit uncontrolled current Flow -through ti-e oscillator.
BACKGROUND OF THE INVENTION
This invention relates -to sinusoidal wave oscillator ballast circuits and especially -to such circui-try suitable for use with fluorescent lamps of the 35 to ~0 watt variety.
Presently manufactured ballast circuits for fluorescent lamps are, most frequently, of the 120 Hz auto-transformer type. Therein, the saturation charactertis-tic of the transformer is employed to provide the desired currents necessary to the operation of a fluorescent lamp.
However, the auto-transformer -type of ballast is known to be relatively heavy and cumbersome. Also, it is known that such apparatus is rela-tively inefficient which leads to excessive heat generation as well as energy loss. ~loreover~ the operational capa-bilities are something less than desired in view of the relatively ~ low operational frequency of 120 Hz which is well within -the audible range.
Another known form of lamp ballast circuitry employs a flip-flop type oscillator circuit in cooperation with a saturable core trans-former. A transistor of the oscillator satura-tes and effects saturation of the core material of the transformer to limit curren-t flow and inhibit lamp burnout. However, core material saturation characteristics are relatively erratic and unpredictable which ren-ders such circuitry undesirable or at best, rnos-t difficult to accurately predict or con-trol.
In still another form of lamp ballast circuitry, a rectangular-shaped waveform is developed and applied -to a filter ,'~' ~.~
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network. Therein, -the rectangular waveform is converted -to a sinu-soidal waveform. However, rectangular-shaped waveform circuitry has been found less efficient -than circuitry where1rl a sinusoidal wave-forrn is developed directly. Also, the required filtering to provide a sinusoidal waveForm derived from a developed rectangular-shaped . waveform is undesirably expensive.
A further Form oF lamp ballast apparatus is set forth in the : previously-mentioned application entitled ~'Tuned Oscillator Ballast Circuit" filed in the name of the present inventor. As mentioned, the circuitry re'lates to a tunecl oscillator having a plurality oF
induc-tive windings to effect development of resonance at a given frequency, activation of the osci'l'lator coupled to a lamp circuit, and clamping of the circuitry to inhibit uncontrol'led curren-t flow through the oscillator.
Additionally, the prior art provided separate circuits For both transient signa'ls and radio frequency interference (RFI). More-over, -the known transient filter circuits included ei-ther a single or "stacked" transient responsive devices while the UFI circuits included at least two inductors and a bifilar wound transformer.
Such circuitry is relatively expensive and appears to leave much to be desired.
OBJECTS AND SUMMARY OF THE INVENTION
An object of the present invention is to provide an enhanced ballast circuit suitable for use with a lamp load. Another object of -the invention is to provide an improved bal'last circuit which minimi~es power transients during transistor switchir)g. Still another object of the invention is to provide an improved ba'llast circuit having cooperative acting multipled transformer inductive windings sui-table -to the development of protective potentials in 3o ! response to open circuited load conditons. A still fur-ther object of the inven-tion is to provide an improved ballast circuit having a power factor correction capability.
These and other objec-ts, advantages and capabi'li-ties are achieved in one aspect o-F the invention by a ballast circuit having a tuned oscillator coupled -to a DC recti-Fier means connectecl by a power factor correction circuit to an AC potential sourceO A first , D92~0
network. Therein, -the rectangular waveform is converted -to a sinu-soidal waveform. However, rectangular-shaped waveform circuitry has been found less efficient -than circuitry where1rl a sinusoidal wave-forrn is developed directly. Also, the required filtering to provide a sinusoidal waveForm derived from a developed rectangular-shaped . waveform is undesirably expensive.
A further Form oF lamp ballast apparatus is set forth in the : previously-mentioned application entitled ~'Tuned Oscillator Ballast Circuit" filed in the name of the present inventor. As mentioned, the circuitry re'lates to a tunecl oscillator having a plurality oF
induc-tive windings to effect development of resonance at a given frequency, activation of the osci'l'lator coupled to a lamp circuit, and clamping of the circuitry to inhibit uncontrol'led curren-t flow through the oscillator.
Additionally, the prior art provided separate circuits For both transient signa'ls and radio frequency interference (RFI). More-over, -the known transient filter circuits included ei-ther a single or "stacked" transient responsive devices while the UFI circuits included at least two inductors and a bifilar wound transformer.
Such circuitry is relatively expensive and appears to leave much to be desired.
OBJECTS AND SUMMARY OF THE INVENTION
An object of the present invention is to provide an enhanced ballast circuit suitable for use with a lamp load. Another object of -the invention is to provide an improved bal'last circuit which minimi~es power transients during transistor switchir)g. Still another object of the invention is to provide an improved ba'llast circuit having cooperative acting multipled transformer inductive windings sui-table -to the development of protective potentials in 3o ! response to open circuited load conditons. A still fur-ther object of the inven-tion is to provide an improved ballast circuit having a power factor correction capability.
These and other objec-ts, advantages and capabi'li-ties are achieved in one aspect o-F the invention by a ballast circuit having a tuned oscillator coupled -to a DC recti-Fier means connectecl by a power factor correction circuit to an AC potential sourceO A first , D92~0
-3 : ' transformer includes windings connec-ted to -the oscilla-tor and to a winding of a second -transformer in series wi-th a capacitor to -form a resonant circuit. A load circuit shun-ts the capacitor of the resonant circuit. The second trans-former includes a winding asso-; 5 ciated with a clamping circuit coupled to the DC rec-tifier means while -the first transformer includes associated circuitry for effecting a transistor storage -time correction capability. More-over, power line conditioning circuitry is also provided.
BRIEF DESCRIPlION OF THE DRAWINGS
Fig. l illustrates a preferred embodiment of a sinusoidal wave tuned oscillator ballast circuit having power factor correc-tion and transistor storage time correction capabil-ty;
Fig. 2 is an alternate embodiment of a sinusoidal wave tuned oscilla-tor circuit employing power factor and storage time cor-rection circuitry.
Fig. 3. is a graphic illustration of currents in each transistor of a sinusoidal wave oscillator lacking proper storage time cor-rection circuitry;
Fig. 4 is a current-voltage graphic illustration of -transis-tors having "L" shaped and inductive-load type switching trajectories; and Fig. 5 is a graphic illustration of the density of minority car-riers in the base region of a transistor.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
For a better understanding of the present invention, together with other and further objects, advantages and capabilities thereo-f, reference is made to the following disclosure and appended claims in conjunction wi-th -the accompanying drawings.
Referring to Fig. l of the drawings, a sinusoidal wave oscillator ballast circuit includes an AC potential source 3 coupled by a power line conditioner and power factor correc-tion circuit 5 to a DC rectifier means 7. A sinusoidal wave oscillator 9 is coup`led to the DC rectifier means 7 and associated witn a first transformer means ll and to a second transformer means l3.
More specifically, the power line conditioner and power factor correction circuit 5 includes a power factor correction circuit por-,,,,j\~ s ~' , .
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BRIEF DESCRIPlION OF THE DRAWINGS
Fig. l illustrates a preferred embodiment of a sinusoidal wave tuned oscillator ballast circuit having power factor correc-tion and transistor storage time correction capabil-ty;
Fig. 2 is an alternate embodiment of a sinusoidal wave tuned oscilla-tor circuit employing power factor and storage time cor-rection circuitry.
Fig. 3. is a graphic illustration of currents in each transistor of a sinusoidal wave oscillator lacking proper storage time cor-rection circuitry;
Fig. 4 is a current-voltage graphic illustration of -transis-tors having "L" shaped and inductive-load type switching trajectories; and Fig. 5 is a graphic illustration of the density of minority car-riers in the base region of a transistor.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
For a better understanding of the present invention, together with other and further objects, advantages and capabilities thereo-f, reference is made to the following disclosure and appended claims in conjunction wi-th -the accompanying drawings.
Referring to Fig. l of the drawings, a sinusoidal wave oscillator ballast circuit includes an AC potential source 3 coupled by a power line conditioner and power factor correc-tion circuit 5 to a DC rectifier means 7. A sinusoidal wave oscillator 9 is coup`led to the DC rectifier means 7 and associated witn a first transformer means ll and to a second transformer means l3.
More specifically, the power line conditioner and power factor correction circuit 5 includes a power factor correction circuit por-,,,,j\~ s ~' , .
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tion having a capacitor 15 shunting the DC rectlFier means 7 and a first inductor 17 coupling the DC rectifier means 7 to -the AC
.~ potential source 3. The power line conditioner portion of the power .;:~ line conditioner and power factor correction circuit 5 includes the firs-t inductor 17 loosely coupled to a second inductor 19 with each one of the first and second inductors~ 17 and 19 respectively, coup-ling one side of the AC potential source 3 to the DC rectifier rneans 7. Also, the junction of the DC rectifier means 7 and each one oF
the first and second inductors, 17 and 19, is coupled by first and second capacitors 21 and 23 -to a potential reference level or cir-: cuit ground. Moreover, a transient suppressor 25, in this example, is shunted across the AC potential source 3.
The DC rectifier means 7 includes first~ second, third, and four-th diodes, 27, 29, 31, and 33 respectively, in a bridge con-figuration. The junction of the first and second diodes 27 and 29 is coupled to the first inductor 17 and first capacitor 21 of the power line conditioner and power Factor correction circuit 5. Simi-larly, the junction oF the third and fourth diodes 31 and 33 is coupled to the second inductive means 19 and second capacitor 23 to ; 20 power line conditioner and power factor correction circuit 5.
The sinusoidal wave oscillator 9 includes first and second transistors 35 and 37 series connected across the DC rectifier means : 7. The first transistor 35 has a bias circuit coupled to the base thereoF and includes a resitor 39 coupling the base to the collector and a parallel coupled capacitor 41 and diode 43 coupled to the base. The second transistor 37 also has a bias circuit including a resistor 45 coupling the base to the collector with a parallel con-nected capacitor 47 and diode 49 coupled to the base.
The first transformer means 11 includes a split secondary wind-ing having a first portion 51 coupled to the emitter and to the : parallel connected capacitor 41 and diode 43 coupled to the base of the first transistor 35. A second portion 53 of the secondary wind-ing is coupled to the emitter and to the parallel connected capaci-tor 47 and diode 49 connected to the base of the second transistor 37. The primary winding 55 of the first transformer means 11 is directly connected to the primary winding 57 of the second trans-former means 13.
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The second transformer means l3 includes the split primary wind-ing 57 in series connection with a charge storage means or capaci-tor - 59 and the primary winding 55 o-f the first transformer means -1l. A
first secondary winding 61 of the second transformer means l3 is connected -to a load in the form of a pair of lamps 64 and coupled by a pair of capacitors ~5 and 67, in shunting rela-tionship across the capacitor 59 of the series resonant circuit.
A second secondary winding 6~ o-f the second transformer rneans l3 has a center tap coupled to the DC rectifier means 7. The outer ends of the second secondary winding 69 are each coupled to d diode, 7l and 73 respectively, which are coupled by an impedance 75 to the DC rectifier means 7.
Additionally, circuits 77 and 78 -for effecting storage time of the first and second transistors 35 and 37 include a series con-nected diode 79 and resistor ~l and 83 and ~35 respectively. The circuit 77 is coupled intermediate the capacitor 4l and cliode ~3 at the base of the first transistor 35 and the collector of the first transistor 35 and the circuit 78 is coupled intermediate the capa-citor 47 and diode 49 at the base of the second transistor 37 and 20 the collector of the second transistor 37. Other circuitry that compensates for s-torage time is also approriate as will be explained hereinafter.
An alternate embodiment oF the ballast circuitry of Fig. l is illustrated in Fig. 2. Therein, the configurations are substan-25 tially similar and bear the same numerals except for the power lineconditioner and power factor correction circui-t 5, the sinusoidal wave oscillator 5, and the first and second transformer means ll and l3 respectively.
In the power line conditioner and power factor correction cir-cuit 5 of Fig. 2, the transient suppressor 25 is coupled to thejunction of first inductor l7 and first capacitor 2l and to the junction of the AC potential source 3 and second inductor l9.
Obviously~ the coupling is reversible in -that the transien-t suppres-sor 25 could be coupled to the junction of the AC potential source 3 and first inductor l7 and the junction of the second inductor l9 and second capacitor 23.
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Also, the second transformer means 13 has an added secondary winding 87 in series connection with an impedance, illustrated as a resistor 89, and an added primary winding 91 on the -First trans-former means 11. Thus, circuitry is provided for an alternate method of "storage time" compensation, as will be explained here inafter, and the circuits 77 and 78 of Fig. 1 are not employecl.
As to operation of the power line condi-tioner and power factor correction circuit S, the power line conditioner includes the first and second inductors 17 and 19 mutually coup~led and connecting the AC potential source 3 to the DC rectifier means 7 and via first and second capacitors 21 and 23 to circuit ground with a transient sup-pressor means 25 either shunting the AC potential source 3, illustrated in Fig. 1, or coupling one side of the AC potential source 3 to the junction of the opposite side of the AC line and the DC rectifier means 7 as in Fig. 2.
The power line conditioner serves as both a transient and as a radio frequency interference (RFI) fil-ter. In the preferred embodi-ment, illustrated in Fig. 2, an undesired transient response at -the AC potential source 3 is subjected to a two-stage filtering pro-cess. The transient suppressor means 25 serves to "clip" the un-desired transient signal and serves as an active filter. There-af-ter, the "clipped" response is further filtered by a second or passive low-pass filter in the form of one of the first and second inductors 17 and 19 and the load circuit.
~5 Moreover, this double-filtering network permits the use of rela-tively inexpensive transient suppressor devices 25 having a less rigid "knee" characteristic capability. More specifically, -the prior known single filter transient response networks required a relatively sharp "knee" characteristic because oF the large change in potential applied thereto when a transient signal occurred. How-ever, the double filtering technique of the above-mentioned circuits permits utilization of less expensive transient response devices with less critical "knee" characteristics since the -transient is both clipped and fil-tered.
Also~ the first inductor and capacitor, 17 and 21 respectively, and the second inductor and capacitor, 19 and 23 respectively, each serve as low pass filters to inhibit RFI signals appearing at the AC
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poten-tial source 3 -from getting -to the load or ~C recti~ier rneans 7.
The first and second induc-tors 17 and 19 also appear as a high impedance for signals directed toward -the AC potential source 3.
Thus, the AC potential source 3 and DC rectifier are isola-ted with respect to RFI signals by the power line conditioner 5 therebetween.
Further, the -First and second inductors 17 and 19 are loosely coupled therebetween. In this manner, currents tending to flow in the circuitry of the First inductor 17 are cancelled by equal and opposite currents flowing in the circuitry of the second inductor 19. As a result, the mutual coupling of the First and second induc-tors 17 and 19 serves to cancel any unbalance in current flow and inhibit any flow of currents to the ground circuit of the apparatus.
As to operaton of the sinusoidal wave oscillator ballast cir-cuit, a pulsed ~C potential at a frequency of 120 Hz is applied to the oscillator means 9. The oscillator means 9 is coupled to a series resonant circuit which includes the primary winding 55 of the firs-t transformer 11, the primary winding 57 of the second trans-former 13, and -the capacitor 59. Also, this oscillator means 9 is operable and the circuitry resonant at a frequency of about 33 KHz.
The load circuit which includes the lamps 63 and secondary wind-ing 61 of the second transformer is shunted across the capacitor 5~
by means of -the capacitors 65 and 67. Initially, a major portion of the current flowing in the oscillator means 9 passes throuyh the resonant circuit having a relatively low impedance while the parallel connected lamps appear as a relatively high impedance which inhibi-t current flow therethrough. As the lamps become ionized, an increasing amount of the current flows therethrough while the cur-rent flowing through the resonant circuit decreases. Thus, the Q of the tank circuit is reduced when the available current is utilized by the lamps load.
It may be assumed that load lamps 63 appear as an open circuit.
Thereupon, current flow through the primary winding 57 of the second transformer 13 would increase~ In turn, the voltage developed across -the primary winding 57 increases which induces an increased potential across the secondary winding 69 of che second transformer means 13. The increased potential on the secondary winding 69 causes conduction of -the diodes 71 and 73 which provide clamping of ,~ , .. ~ .
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the voltage appearing across the transis-tors, 35 and 37, and the primary winding 57 at some given value. Thus, the transis-tors 35 and 37 are protected from injurious increased curren-t flow even though an open circuit condition of the load lamps 63 occurs.
Also, it is well known tha-t transistors have a characteristic known as storage time which may be defined as -the time required to remove excess minority carriers stored in the base oF a transis-tor.
In other words, a Finite tirne is required to rernove the excess minority carriers in -the base circuit whenever switching of a transistor is to be effected.
Previously, the known -Forms of ballast switching circuitry made no provision for switching trajectory optimization. As a resul-t, it was cornmon practice in invertor circuits to have both hiyh collector current and collector to emitter voltage during switching transi-tions as illustrated in Fig. 3. The collec-tor current ICl of one transistor has super-imposecl thereon an additional collector current IC2 from a second transistor due to the lack of compensation for storage time of the transistor. Thus, both -transistors conduct when the switching transition occurs.
As a result of the above-illustrated relatively high values of collector current occurring during switching transitions, it has been a common practice to employ transistors having high transient power capability. The sw1tching trajectory of this load line is graphically illustrated by curve A of Fig. 4.
However, circuitry designed to provide compensation for storage time premits utilization of transistors having an "L"-shaped, low power transient, switching trajector which rnay be graphica11y illus-trated as curve B of Fig. 4. Tnus, storage time compensa-tion per-mits the utilization of relatively inexpensive, and fast switching transistors.
As to storage -time compensation, one technique provices a cir-cuitry for reducing the excess minority carriers prior to switching the transistor by al-tering the conductivi-ty of the transistor from a "saturation" region to an "active" region. As illustra-ted by the diagram of Fig. 5, appearing on page 259 of a McGraw-Hill publica-tion entitled "Electronic Devices and Circuits" copyright 1967, an . . .
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excess of minority carriers is present in the base region between a "saturation" condition and an "active" condition.
Additionally, an "active" conclition relFers to an opera-tional condition of the transis-tor whereat the base -to collec-tor junc-tion is reverse biased. Thus, reducing the excess minority carriers to substantially zero by going to an "active" condition prior to swi-tching substantially eliminates -the storage -time problem and per-mits utilization of a transistor with low power transien-t capability Referring to the circuitry of Fig. 1, it can be seen -tha-t each one of the transistors 35 and 37 has associated -therewi-th a circuit 77 and 79 which includes a series connected diode 79 and resistor 81 and diode 83 and resis-tor 85. Each one of the circuits 77 and 79 act in the form of a clamping circuit to cause each one of the switching -transistors 35 and 37 to enter an "active" condition prior to switching. [n other words, as each one of the transis-tors 35 and 37 approaches a swi-tching condition, current in the base circuit is reduced by the circuits 77 and 79 in an amount sufficient to cause the collec-tor voltage to substantially equal the base voltage.
Thus, an "active" condi-ton is achieved, the excess minority carriers are reduced to substantially zero, storage time is reduced, and switching occurs at essentially zero collector current value.
Another technique for effec-ting "storage tirne" is illustrated in the embodiment of Fig. 2. Therein the same current flows through the primary windings 55 and 57 of the first and second transformer means 11 and 13 respectively. The second winding 87 of the second transforrner rneans 13 has a 90 phase shift in the voltage with respect to the current in the primary windings 57. Thus, -the cur-rent flowing through the secondary winding 87, resistor 89, and pri-mary winding 91 of trans-former means 11 is phase shifted to provide a curren-t leading the current through the primary windings 55 and 57 by 90~.
In turn, this 90 leading current present in the primary winding 91 is vectorially combined with the currents flowing in the secondary windings 51 and 53 of the first transformer means 11.
This combined current flow provides a resultant flow of current to the base of the transistors 35 and 37 which leads the collector cur-.
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rent by a phase angle pre-selected by values of the windinys and primarily the resistor ~9.
As a result, the curren-t app1ied to the base o-~ the transistors 35 and 37 is phase adjusted to lead the collector current by an `; 5 amount sufficient to compensate -for the storage tirne of the transistor. Thus, the transistors 35 and 37 are switched during zero collector current, which allows the use of inexpensive transistors.
Thus, there has been provided a unique sinusoidal wave oscil~
lator ballast circuit especially sui-table for use with 3~ and 40 ` ~ watt fluorescent lamps. The apparatus is light in weight, uses inexpensive components, eFficient, and provides an operating capa-bility which is believed to be unattainable with any other known circuitry. Also, the apparatus includes circuitry whereby inex-pensive but efficient transistors are suitably utilized and compen-sation for open circuit conditions of the load circuit are provided.
While there has been shown and described what is at present con-sidered preferred embodiments of the invention, it will be obvious to those skilled in the art that various changes and modificat;ons may be made therein without departing from the invention as defined by the appended claims.
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tion having a capacitor 15 shunting the DC rectlFier means 7 and a first inductor 17 coupling the DC rectifier means 7 to -the AC
.~ potential source 3. The power line conditioner portion of the power .;:~ line conditioner and power factor correction circuit 5 includes the firs-t inductor 17 loosely coupled to a second inductor 19 with each one of the first and second inductors~ 17 and 19 respectively, coup-ling one side of the AC potential source 3 to the DC rectifier rneans 7. Also, the junction of the DC rectifier means 7 and each one oF
the first and second inductors, 17 and 19, is coupled by first and second capacitors 21 and 23 -to a potential reference level or cir-: cuit ground. Moreover, a transient suppressor 25, in this example, is shunted across the AC potential source 3.
The DC rectifier means 7 includes first~ second, third, and four-th diodes, 27, 29, 31, and 33 respectively, in a bridge con-figuration. The junction of the first and second diodes 27 and 29 is coupled to the first inductor 17 and first capacitor 21 of the power line conditioner and power Factor correction circuit 5. Simi-larly, the junction oF the third and fourth diodes 31 and 33 is coupled to the second inductive means 19 and second capacitor 23 to ; 20 power line conditioner and power factor correction circuit 5.
The sinusoidal wave oscillator 9 includes first and second transistors 35 and 37 series connected across the DC rectifier means : 7. The first transistor 35 has a bias circuit coupled to the base thereoF and includes a resitor 39 coupling the base to the collector and a parallel coupled capacitor 41 and diode 43 coupled to the base. The second transistor 37 also has a bias circuit including a resistor 45 coupling the base to the collector with a parallel con-nected capacitor 47 and diode 49 coupled to the base.
The first transformer means 11 includes a split secondary wind-ing having a first portion 51 coupled to the emitter and to the : parallel connected capacitor 41 and diode 43 coupled to the base of the first transistor 35. A second portion 53 of the secondary wind-ing is coupled to the emitter and to the parallel connected capaci-tor 47 and diode 49 connected to the base of the second transistor 37. The primary winding 55 of the first transformer means 11 is directly connected to the primary winding 57 of the second trans-former means 13.
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The second transformer means l3 includes the split primary wind-ing 57 in series connection with a charge storage means or capaci-tor - 59 and the primary winding 55 o-f the first transformer means -1l. A
first secondary winding 61 of the second transformer means l3 is connected -to a load in the form of a pair of lamps 64 and coupled by a pair of capacitors ~5 and 67, in shunting rela-tionship across the capacitor 59 of the series resonant circuit.
A second secondary winding 6~ o-f the second transformer rneans l3 has a center tap coupled to the DC rectifier means 7. The outer ends of the second secondary winding 69 are each coupled to d diode, 7l and 73 respectively, which are coupled by an impedance 75 to the DC rectifier means 7.
Additionally, circuits 77 and 78 -for effecting storage time of the first and second transistors 35 and 37 include a series con-nected diode 79 and resistor ~l and 83 and ~35 respectively. The circuit 77 is coupled intermediate the capacitor 4l and cliode ~3 at the base of the first transistor 35 and the collector of the first transistor 35 and the circuit 78 is coupled intermediate the capa-citor 47 and diode 49 at the base of the second transistor 37 and 20 the collector of the second transistor 37. Other circuitry that compensates for s-torage time is also approriate as will be explained hereinafter.
An alternate embodiment oF the ballast circuitry of Fig. l is illustrated in Fig. 2. Therein, the configurations are substan-25 tially similar and bear the same numerals except for the power lineconditioner and power factor correction circui-t 5, the sinusoidal wave oscillator 5, and the first and second transformer means ll and l3 respectively.
In the power line conditioner and power factor correction cir-cuit 5 of Fig. 2, the transient suppressor 25 is coupled to thejunction of first inductor l7 and first capacitor 2l and to the junction of the AC potential source 3 and second inductor l9.
Obviously~ the coupling is reversible in -that the transien-t suppres-sor 25 could be coupled to the junction of the AC potential source 3 and first inductor l7 and the junction of the second inductor l9 and second capacitor 23.
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Also, the second transformer means 13 has an added secondary winding 87 in series connection with an impedance, illustrated as a resistor 89, and an added primary winding 91 on the -First trans-former means 11. Thus, circuitry is provided for an alternate method of "storage time" compensation, as will be explained here inafter, and the circuits 77 and 78 of Fig. 1 are not employecl.
As to operation of the power line condi-tioner and power factor correction circuit S, the power line conditioner includes the first and second inductors 17 and 19 mutually coup~led and connecting the AC potential source 3 to the DC rectifier means 7 and via first and second capacitors 21 and 23 to circuit ground with a transient sup-pressor means 25 either shunting the AC potential source 3, illustrated in Fig. 1, or coupling one side of the AC potential source 3 to the junction of the opposite side of the AC line and the DC rectifier means 7 as in Fig. 2.
The power line conditioner serves as both a transient and as a radio frequency interference (RFI) fil-ter. In the preferred embodi-ment, illustrated in Fig. 2, an undesired transient response at -the AC potential source 3 is subjected to a two-stage filtering pro-cess. The transient suppressor means 25 serves to "clip" the un-desired transient signal and serves as an active filter. There-af-ter, the "clipped" response is further filtered by a second or passive low-pass filter in the form of one of the first and second inductors 17 and 19 and the load circuit.
~5 Moreover, this double-filtering network permits the use of rela-tively inexpensive transient suppressor devices 25 having a less rigid "knee" characteristic capability. More specifically, -the prior known single filter transient response networks required a relatively sharp "knee" characteristic because oF the large change in potential applied thereto when a transient signal occurred. How-ever, the double filtering technique of the above-mentioned circuits permits utilization of less expensive transient response devices with less critical "knee" characteristics since the -transient is both clipped and fil-tered.
Also~ the first inductor and capacitor, 17 and 21 respectively, and the second inductor and capacitor, 19 and 23 respectively, each serve as low pass filters to inhibit RFI signals appearing at the AC
.
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poten-tial source 3 -from getting -to the load or ~C recti~ier rneans 7.
The first and second induc-tors 17 and 19 also appear as a high impedance for signals directed toward -the AC potential source 3.
Thus, the AC potential source 3 and DC rectifier are isola-ted with respect to RFI signals by the power line conditioner 5 therebetween.
Further, the -First and second inductors 17 and 19 are loosely coupled therebetween. In this manner, currents tending to flow in the circuitry of the First inductor 17 are cancelled by equal and opposite currents flowing in the circuitry of the second inductor 19. As a result, the mutual coupling of the First and second induc-tors 17 and 19 serves to cancel any unbalance in current flow and inhibit any flow of currents to the ground circuit of the apparatus.
As to operaton of the sinusoidal wave oscillator ballast cir-cuit, a pulsed ~C potential at a frequency of 120 Hz is applied to the oscillator means 9. The oscillator means 9 is coupled to a series resonant circuit which includes the primary winding 55 of the firs-t transformer 11, the primary winding 57 of the second trans-former 13, and -the capacitor 59. Also, this oscillator means 9 is operable and the circuitry resonant at a frequency of about 33 KHz.
The load circuit which includes the lamps 63 and secondary wind-ing 61 of the second transformer is shunted across the capacitor 5~
by means of -the capacitors 65 and 67. Initially, a major portion of the current flowing in the oscillator means 9 passes throuyh the resonant circuit having a relatively low impedance while the parallel connected lamps appear as a relatively high impedance which inhibi-t current flow therethrough. As the lamps become ionized, an increasing amount of the current flows therethrough while the cur-rent flowing through the resonant circuit decreases. Thus, the Q of the tank circuit is reduced when the available current is utilized by the lamps load.
It may be assumed that load lamps 63 appear as an open circuit.
Thereupon, current flow through the primary winding 57 of the second transformer 13 would increase~ In turn, the voltage developed across -the primary winding 57 increases which induces an increased potential across the secondary winding 69 of che second transformer means 13. The increased potential on the secondary winding 69 causes conduction of -the diodes 71 and 73 which provide clamping of ,~ , .. ~ .
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the voltage appearing across the transis-tors, 35 and 37, and the primary winding 57 at some given value. Thus, the transis-tors 35 and 37 are protected from injurious increased curren-t flow even though an open circuit condition of the load lamps 63 occurs.
Also, it is well known tha-t transistors have a characteristic known as storage time which may be defined as -the time required to remove excess minority carriers stored in the base oF a transis-tor.
In other words, a Finite tirne is required to rernove the excess minority carriers in -the base circuit whenever switching of a transistor is to be effected.
Previously, the known -Forms of ballast switching circuitry made no provision for switching trajectory optimization. As a resul-t, it was cornmon practice in invertor circuits to have both hiyh collector current and collector to emitter voltage during switching transi-tions as illustrated in Fig. 3. The collec-tor current ICl of one transistor has super-imposecl thereon an additional collector current IC2 from a second transistor due to the lack of compensation for storage time of the transistor. Thus, both -transistors conduct when the switching transition occurs.
As a result of the above-illustrated relatively high values of collector current occurring during switching transitions, it has been a common practice to employ transistors having high transient power capability. The sw1tching trajectory of this load line is graphically illustrated by curve A of Fig. 4.
However, circuitry designed to provide compensation for storage time premits utilization of transistors having an "L"-shaped, low power transient, switching trajector which rnay be graphica11y illus-trated as curve B of Fig. 4. Tnus, storage time compensa-tion per-mits the utilization of relatively inexpensive, and fast switching transistors.
As to storage -time compensation, one technique provices a cir-cuitry for reducing the excess minority carriers prior to switching the transistor by al-tering the conductivi-ty of the transistor from a "saturation" region to an "active" region. As illustra-ted by the diagram of Fig. 5, appearing on page 259 of a McGraw-Hill publica-tion entitled "Electronic Devices and Circuits" copyright 1967, an . . .
~ . .. ., :
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excess of minority carriers is present in the base region between a "saturation" condition and an "active" condition.
Additionally, an "active" conclition relFers to an opera-tional condition of the transis-tor whereat the base -to collec-tor junc-tion is reverse biased. Thus, reducing the excess minority carriers to substantially zero by going to an "active" condition prior to swi-tching substantially eliminates -the storage -time problem and per-mits utilization of a transistor with low power transien-t capability Referring to the circuitry of Fig. 1, it can be seen -tha-t each one of the transistors 35 and 37 has associated -therewi-th a circuit 77 and 79 which includes a series connected diode 79 and resistor 81 and diode 83 and resis-tor 85. Each one of the circuits 77 and 79 act in the form of a clamping circuit to cause each one of the switching -transistors 35 and 37 to enter an "active" condition prior to switching. [n other words, as each one of the transis-tors 35 and 37 approaches a swi-tching condition, current in the base circuit is reduced by the circuits 77 and 79 in an amount sufficient to cause the collec-tor voltage to substantially equal the base voltage.
Thus, an "active" condi-ton is achieved, the excess minority carriers are reduced to substantially zero, storage time is reduced, and switching occurs at essentially zero collector current value.
Another technique for effec-ting "storage tirne" is illustrated in the embodiment of Fig. 2. Therein the same current flows through the primary windings 55 and 57 of the first and second transformer means 11 and 13 respectively. The second winding 87 of the second transforrner rneans 13 has a 90 phase shift in the voltage with respect to the current in the primary windings 57. Thus, -the cur-rent flowing through the secondary winding 87, resistor 89, and pri-mary winding 91 of trans-former means 11 is phase shifted to provide a curren-t leading the current through the primary windings 55 and 57 by 90~.
In turn, this 90 leading current present in the primary winding 91 is vectorially combined with the currents flowing in the secondary windings 51 and 53 of the first transformer means 11.
This combined current flow provides a resultant flow of current to the base of the transistors 35 and 37 which leads the collector cur-.
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:
rent by a phase angle pre-selected by values of the windinys and primarily the resistor ~9.
As a result, the curren-t app1ied to the base o-~ the transistors 35 and 37 is phase adjusted to lead the collector current by an `; 5 amount sufficient to compensate -for the storage tirne of the transistor. Thus, the transistors 35 and 37 are switched during zero collector current, which allows the use of inexpensive transistors.
Thus, there has been provided a unique sinusoidal wave oscil~
lator ballast circuit especially sui-table for use with 3~ and 40 ` ~ watt fluorescent lamps. The apparatus is light in weight, uses inexpensive components, eFficient, and provides an operating capa-bility which is believed to be unattainable with any other known circuitry. Also, the apparatus includes circuitry whereby inex-pensive but efficient transistors are suitably utilized and compen-sation for open circuit conditions of the load circuit are provided.
While there has been shown and described what is at present con-sidered preferred embodiments of the invention, it will be obvious to those skilled in the art that various changes and modificat;ons may be made therein without departing from the invention as defined by the appended claims.
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.
Claims (10)
1. A sinusoidal wave oscillator ballast circuit comprising:
an AC potential source;
a pulsed DC rectifier means;
a power factor corrector circuit means coupled to said AC poten-tial source and to said pulsed DC rectifier means;
oscillator means including a pair of series connected transis-tors shunting said pulsed DC rectifier means;
a first transformer having primary and secondary windings, said secondary winding of said first transformer directly coupled to said oscillator means;
a second transformer having a primary winding and a first and second secondary winding, said primary winding of said first and second transformers in series connection with a capacitor to form a resonant circuit shunted across said oscillator means, said first secondary winding of said second transformer coupled to lamp cir-cuitry to form a load circuit in shunt connection across said capacitor of said resonant circuit and said second secondary winding of said second transformer connected by a pair of diodes to said DC
rectifier means to effect clamping thereof at a given potential level whereby said given potential level is maintained despite open circuiting of said load circuit; and circuit means coupled to said oscillator means For effecting correction For storage time of said transistors of said oscillator means.
an AC potential source;
a pulsed DC rectifier means;
a power factor corrector circuit means coupled to said AC poten-tial source and to said pulsed DC rectifier means;
oscillator means including a pair of series connected transis-tors shunting said pulsed DC rectifier means;
a first transformer having primary and secondary windings, said secondary winding of said first transformer directly coupled to said oscillator means;
a second transformer having a primary winding and a first and second secondary winding, said primary winding of said first and second transformers in series connection with a capacitor to form a resonant circuit shunted across said oscillator means, said first secondary winding of said second transformer coupled to lamp cir-cuitry to form a load circuit in shunt connection across said capacitor of said resonant circuit and said second secondary winding of said second transformer connected by a pair of diodes to said DC
rectifier means to effect clamping thereof at a given potential level whereby said given potential level is maintained despite open circuiting of said load circuit; and circuit means coupled to said oscillator means For effecting correction For storage time of said transistors of said oscillator means.
2. The sinusoidal wave oscillator ballast circuit of Claim 1 wherein said circuit means for effecting correction for storage time of said transistors of said oscillator means is in the form of a series connected added primary winding of said first transformer, an impedance and a third secondary winding of said second transformer means to effect a phase shift of current of said transistor to said oscillator means and cause said base current to lead said collector current to compensate for storage time of said transistors.
3. The sinusoidal wave oscillator ballast circuit of Claim 1 wherein said circuit means for effecting correction for storage time of said transistors of said oscillator means is in the form of a series connected uni-directional condition device and impedance coupling said secondary winding of said first transformer to an out-put electrode of each one of said transistors of said oscillator means whereby said transistors operate from d saturation to an active region of conduction prior to switching from a conductive state to a non-conductive state.
4. the sinusoidal wave oscillator ballast circuit of Claim 1 wherein said power factor correction circuit is in the form of a capacitor shunting said DC rectifier means and an inductor coupling said DC rectifier means to said AC potential source.
5. The sinusoidal wave oscillator ballast circuit of Claim 1 including a power line conditioner means coupled to said AC poten-tial source and to said pulsed DC rectifier means, said power line conditoner means including a first and a second capacitor each coupled to said pulsed DC rectifier means and to a potential reference level, first and second inductor means each coupled to said pulsed DC rectifier means and to one of said first and second capacitors and to said AC potential source and having a mutual inductance therebetween, and a transient suppressor means shunting said AC potential source.
6. The sinusoidal wave oscillator ballast circuit of Claim 1 wherein said transient suppressor means is coupled to the junction of said AC source and one of said inductor means and the junction of one of said capacitors and the other of said first and second inductor means.
7. A sinusoidal oscillator ballast circuit comprising:
an AC potential source;
a pulsed DC rectifier means;
a power line conditioner and power factor corrector circuit means coupled to said AC potential source and to said pulsed DC
rectifier means;
oscillator means having a pair of series connected transistors shunting said pulsed DC potential source;
first and second transformer means with said first transformer means having a primary and secondary winding and said second trans-former means having a primary and first and second secondary wind-ings;
said primary windings of said first and second transformer means in series connection with a capacitor to form a resonant circuit shunting said oscillator means;
said secondary winding of said first transformer means directly coupled to said oscillator means, said first secondary winding of said second transformer means in series with a lamp circuit shunting said capacitor of said resonant circuit; and said second secondary winding of said second transformer means having center tap coupled to said pulsed DC rectifier means with each of the outer ends of said second secondary winding connected to a diode coupled to said pulsed DC rectifier means.
an AC potential source;
a pulsed DC rectifier means;
a power line conditioner and power factor corrector circuit means coupled to said AC potential source and to said pulsed DC
rectifier means;
oscillator means having a pair of series connected transistors shunting said pulsed DC potential source;
first and second transformer means with said first transformer means having a primary and secondary winding and said second trans-former means having a primary and first and second secondary wind-ings;
said primary windings of said first and second transformer means in series connection with a capacitor to form a resonant circuit shunting said oscillator means;
said secondary winding of said first transformer means directly coupled to said oscillator means, said first secondary winding of said second transformer means in series with a lamp circuit shunting said capacitor of said resonant circuit; and said second secondary winding of said second transformer means having center tap coupled to said pulsed DC rectifier means with each of the outer ends of said second secondary winding connected to a diode coupled to said pulsed DC rectifier means.
8. The sinusoidal wave oscillator ballast circuit of Claim 7 wherein said power factor corrector of said power line conditioner and power factor corrector circuit means includes a capacitor shunt-ing said pulsed DC rectifier means and an inductor coupling said pulsed DC rectifier means to said AC potential source.
9. The sinusoidal wave oscillator ballast circuit of Claim 7 wherein said power line conditioner of said power line conditioner and power factor corrector circuit means includes first and second capacitors each coupled to said pulsed DC rectifier means and to a potential reference level, first and second inductive means coupled to said first and second capacitors respectively, and to said AC
potential source with a mutual coupling therebetween, and a transient suppressor shunting said AC potential source.
potential source with a mutual coupling therebetween, and a transient suppressor shunting said AC potential source.
10. The sinusoidal wave oscillator ballast circuit of Claim 7 wherein said second transformer means includes a third secondary winding in series connection with an impedance and a second primary winding of said first transformer means for effecting a phase shift in current applied to said oscillator means to compensate for storage time of said oscillator means and effect switching thereof at a substantially zero current level whereby switching losses are minimized.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/752,167 US4075476A (en) | 1976-12-20 | 1976-12-20 | Sinusoidal wave oscillator ballast circuit |
US752,167 | 1976-12-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1103747A true CA1103747A (en) | 1981-06-23 |
Family
ID=25025186
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA290,517A Expired CA1103747A (en) | 1976-12-20 | 1977-11-09 | Tuned oscillator ballast circuit |
Country Status (6)
Country | Link |
---|---|
US (1) | US4075476A (en) |
JP (1) | JPS5378683A (en) |
BE (1) | BE861557A (en) |
CA (1) | CA1103747A (en) |
IT (1) | IT1088800B (en) |
NL (1) | NL7713525A (en) |
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GB1568310A (en) * | 1976-12-13 | 1980-05-29 | Kuroi Kosan Kk | Discharge lamp lighting devices |
US4127795A (en) * | 1977-08-19 | 1978-11-28 | Gte Sylvania Incorporated | Lamp ballast circuit |
US4127893A (en) * | 1977-08-17 | 1978-11-28 | Gte Sylvania Incorporated | Tuned oscillator ballast circuit with transient compensating means |
US4857806A (en) * | 1980-08-14 | 1989-08-15 | Nilssen Ole K | Self-ballasted screw-in fluorescent lamp |
US4677345A (en) * | 1980-08-14 | 1987-06-30 | Nilssen Ole K | Inverter circuits |
USRE32155E (en) * | 1979-04-25 | 1986-05-20 | High-efficiency tuned inverter circuit | |
US4417181A (en) * | 1979-07-06 | 1983-11-22 | Sonelt Corporation | Electronic ballast |
US4259616A (en) * | 1979-07-09 | 1981-03-31 | Gte Products Corporation | Multiple gaseous lamp electronic ballast circuit |
USRE33057E (en) * | 1980-06-23 | 1989-09-12 | Brigham Young University | High frequency supply system for gas discharge lamps and electronic ballast therefor |
US4469988A (en) * | 1980-06-23 | 1984-09-04 | Cronin Donald L | Electronic ballast having emitter coupled transistors and bias circuit between secondary winding and the emitters |
US4508996A (en) * | 1980-06-23 | 1985-04-02 | Brigham Young University | High frequency supply system for gas discharge lamps and electronic ballast therefor |
US4388562A (en) * | 1980-11-06 | 1983-06-14 | Astec Components, Ltd. | Electronic ballast circuit |
US4353009A (en) * | 1980-12-19 | 1982-10-05 | Gte Products Corporation | Dimming circuit for an electronic ballast |
US4353010A (en) * | 1980-12-19 | 1982-10-05 | Gte Products Corporation | Transistor drive scheme for fluorscent lamp ballast |
US4388563A (en) * | 1981-05-26 | 1983-06-14 | Commodore Electronics, Ltd. | Solid-state fluorescent lamp ballast |
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US4492897A (en) * | 1981-10-21 | 1985-01-08 | Hauenkalliontie 6 A 4 | Means for limiting and controlling the current of a discharge lamp |
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US5841241A (en) * | 1982-01-25 | 1998-11-24 | Ole K. Nilssen | Electronic ballast for fluorescent lamps |
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WO1987007996A1 (en) * | 1986-06-19 | 1987-12-30 | Innovative Controls, Inc. | A ballast for systems having multiple high-intensity discharge lamps |
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US4999547A (en) * | 1986-09-25 | 1991-03-12 | Innovative Controls, Incorporated | Ballast for high pressure sodium lamps having constant line and lamp wattage |
JPS63198294A (en) * | 1987-02-10 | 1988-08-16 | シャープ株式会社 | Fluorescent lamp lighting system |
US4899087A (en) * | 1987-02-12 | 1990-02-06 | Xerox Corporation | Triggering circuit for series connected flash lamps |
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US5608292A (en) * | 1995-06-15 | 1997-03-04 | Motorola, Inc. | Single transistor ballast with filament preheating |
US6057652A (en) * | 1995-09-25 | 2000-05-02 | Matsushita Electric Works, Ltd. | Power supply for supplying AC output power |
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US6731075B2 (en) | 2001-11-02 | 2004-05-04 | Ampr Llc | Method and apparatus for lighting a discharge lamp |
CN100586247C (en) * | 2004-04-30 | 2010-01-27 | 周云正 | Low crest ratio electronic ballast with double power factor correction |
DE102008000027B4 (en) * | 2008-01-10 | 2014-08-07 | Ralf Kleinodt | Electronic ballast and circuit arrangement for dimming gas discharge lamps |
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US3754160A (en) * | 1971-10-28 | 1973-08-21 | Radiant Ind Inc | Four-lamp driver circuit for fluorescent lamps |
US3769545A (en) * | 1972-05-25 | 1973-10-30 | Kodan Inc | Circuit arrangement for operating electric arc discharge devices |
US4045711A (en) * | 1976-03-19 | 1977-08-30 | Gte Sylvania Incorporated | Tuned oscillator ballast circuit |
-
1976
- 1976-12-20 US US05/752,167 patent/US4075476A/en not_active Expired - Lifetime
-
1977
- 1977-11-09 CA CA290,517A patent/CA1103747A/en not_active Expired
- 1977-12-07 NL NL7713525A patent/NL7713525A/en not_active Application Discontinuation
- 1977-12-07 BE BE2056497A patent/BE861557A/en unknown
- 1977-12-19 JP JP15186877A patent/JPS5378683A/en active Pending
- 1977-12-20 IT IT30937/77A patent/IT1088800B/en active
Also Published As
Publication number | Publication date |
---|---|
BE861557A (en) | 1978-03-31 |
NL7713525A (en) | 1978-06-22 |
US4075476A (en) | 1978-02-21 |
IT1088800B (en) | 1985-06-10 |
JPS5378683A (en) | 1978-07-12 |
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