CA1077144A - Phase locked loop - Google Patents
Phase locked loopInfo
- Publication number
- CA1077144A CA1077144A CA274,618A CA274618A CA1077144A CA 1077144 A CA1077144 A CA 1077144A CA 274618 A CA274618 A CA 274618A CA 1077144 A CA1077144 A CA 1077144A
- Authority
- CA
- Canada
- Prior art keywords
- signal
- phase
- transistors
- frequency
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D1/00—Demodulation of amplitude-modulated oscillations
- H03D1/22—Homodyne or synchrodyne circuits
- H03D1/2209—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders
- H03D1/2236—Decoders for simultaneous demodulation and decoding of signals composed of a sum-signal and a suppressed carrier, amplitude modulated by a difference signal, e.g. stereocoders using a phase locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
Abstract
ABSTRACT OF THE DISCLOSURE
A phase locked loop includes a variable frequency oscillator, a phase comparator for comparing the phase between an output signal derived prom the variable frequency oscillator and a reference signal and for generating a control signal is response to the phase difference of both of signals so as to control the variable frequency oscillator, an indicator for indicating the phase difference of both the signals, and a control circuit for vary-ing the frequency of the variable frequency oscillator.
A phase locked loop includes a variable frequency oscillator, a phase comparator for comparing the phase between an output signal derived prom the variable frequency oscillator and a reference signal and for generating a control signal is response to the phase difference of both of signals so as to control the variable frequency oscillator, an indicator for indicating the phase difference of both the signals, and a control circuit for vary-ing the frequency of the variable frequency oscillator.
Description
~ti;3 BACKGROUND OF THE INVENTION
Field of the Invention The present invention relates generally to a phase locked loop~ and is directed more particulary to a phase locked loop having an indicating means and a means for varying the frequency of a signal derived from a variable frequency oscillator.
.:
Description of the Prior Art Recently, a phase locked loop is employed in VariOUS
electronic instruments. As an example thereof, a stereo demodu-- 20 lator of an FM receiver can be exemplifiad. In this case, the phase locked loop is formed of a circuit for supplying a stereo composite signal to a switching circuit, a circuit for deriving a pilot signal from the stereo composite signal, a variable frequency ` oscillator~ a circuit for comparing the phase of an output from the oscillator (if necessary~ a signal which is frequency-divided is contained therein) with that of the pilot signal, and a circuit for supplying an output from the phase comparing circuit to the variable irequency oscillator as a control signal. The signal from the _ ~ _ .
.
: ' : .
;
variable frequency oscillator which is controlled in response to the output from the phase comparing circuit (the signal including a frequency-divided signal, if necessary) is applied to the switching circuit as a so-called switching signal. From the switching circuit there are derived spearated left and right stereo-phonic signals.
With the above prior art stereo demodulating circuit, the relationship between the deviation of the phase or frequency of the switching signal fed to the switching circuit and the separation of the stereo composite signal is such that if the phase or frequency of the switching signal is shifted any under the stereo composite signal being low in level, the separation is deteriorated rapidly. In this case~ when the loop gain of the phase locked loop is infinite ~
even if the free-running frequency of the variable frequency oscillator 1 5 is deviated from its ~i6rmal frequency, for example, 76 KHz which is four times of the frequency of the pilot signal, the oscillation fre-quency of the variable frequency oscillator is locked at 76 KHz and also synchronized with the pilot signal. As a result, there is caused no deviation in the phase and frequency of the switching signal.
In fact~ however, since the loop gain of the phase locked loop can not be made infinite, when the free-running frequency of the variable frequency oscillator is deviated from 76 KHz, the oscillation frequency thereof is also deviated. In other words, the deviation of .~
a DC voltage from a filter caused by the deviation of the oscillation frequency is balanced with that of the free-running frequency of the oscillator and the circuit becomes stable in such a state. so that at this time the oscillation frequency of the oscillator is deviated. When the oscillation frequency of the oscillator is deviated, the switching frequency is deviated. As a result, the separation of the left and right stereophonic signals from the switching circuit is deteriorated .
. . _ 7714~
To avoid this defect, upon manufacturing a receiver, the free-running frequency of the oscillator is adJusted at a normal frequency or 76 KHz to obtain an optimum separation of signals.
However, the free-running frequency of ths oscillator is deviated in accordance with tirne lapseJ circurnferences and so on. Further~
since the distortion factor and non-linear crosstalk similarly depend upon the switching frequency, they are also deteriorated.
OBJECTS AND SUMMARY OF THE INVENTION
An object of the invention is to provide a novel phase locked loop with which the phase difference between a reference ` signal and a signal to be compared is known.
Another object of the invention is to provide a phase locked loop which indicates the phase difference between a reference signal and a signal to be compared by means of simple construction and has means to remove the phase difference.
A further object of the invention is to provide a phase locked loop suitable for use in an FM stereo receiver.
A yet further object of the invention is to provide a phase locked loop which is provided with an adjustable means for making ~.
the oscillation frequency of a variable oscillator same as that of a reference signal always in accordance with secular variations and circumferences .
According to an aspect of the present invention there is provided a phase locked loop which comprises a variable frequency osciLlator, a phase comparator for comparing the phase of an output signal generated by said variable frequency oscillator with the phase of a reference signal and for providing a control signal in response to the phase difference therebetween, a circuit for supplying said control signal to said variable frequency oscillator, an indicator for 1(~77144 indicating the phase difference between the output signal of - said variable frequency oscillator and the reference signal, and a circuit for varying the frequency of the output signal of said variable frequency oscillator.
More particularly, there is provided:
A phase-locked loop circuit comprising a voltage controlled oscillator providing an output signal and having a free-running frequency that may vary with time; a phase com-parator comparing the phase of a reference signal with the phase of a compared signal which is derived from said output signal of the voltage controlled oscillator for providing a D.C. control voltage in response to a variation of the phase relation of said compared signal with said reference signal, said phase comparator including a first pair of transistors ., each having an input electrode supplied with said reference signal and an output electrode, a second pair of transistors connected to said output electrode of one of said first pair ,~:
of transistors, and a third pair of transistors connected to : said output electrode of the other of said first pair of transistors, said second and third pairs of transistors each having an input electrode supplied with said compared signal;
a filter circuit connected to said phase comparator between output electrodes of said second and third pairs of transis-tors and to said voltage controlled oscillator and through which said control voltage is applied to said voltage con-trolled oscillator so as to shift the actual frequency of said output signal from the oscillator in respect to said free-running frequency for eliminating said variation of the phase . relation; indicator means including a meter whose center is null and which is connected in parallel with said filter cir-cuit for indicating the value and polarity of said D.C. con-_~
~077~4~
trol voltage, and manually actuable means connected with saidvoltage controlled oscillator for adjusting said free-running frequency of the voltage controlled oscillator in the sense, and to the extent indicated by said meter for eliminating said control voltage due to a variation of said free-running frequency with time.
- The other objects, features and advantages of the present invention will become apparent from the following de-scription taken in conjunction with the accompany drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
-- Fig. 1 is a block diagram showing an FM stereo receiver in which an example of the phase locked loop according to the present invention is used;
Figs. 2A to 2E are signal waveform diagrams used for ., explaining the phase locked loop of the invention;
Fig. 3 is a graph showing the output from a filter used in Fig. 1 which is based on the frequency and phase differ-ences of a reference signal and a singal to be compared with the former, and Fig. 4 is a block diagram showing a practical example of a phase comparator and a filter used for forming the phase locked loop of the invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
An example of the phase locked loop according to the present invention used as the stereo demodulator of an FM re-ceiver will be described, by way of example, with reference to Fig. 1.
In Fig. 1, 1 designates a tuner including elements of an Fl~ receiver from its antenna tuning circuit to FM demodula-tor circuit. Upon the stereo reception, a stereo composite signal is derived from the receiver 1 and then fed to a switch-ing circuit 2 for stereo demodulation~
-4a-~.077~L44 In Fig.1 ~ lO denotes a phase locked loop (which will be hereinafter referred simply to as a PLL) which produces a switching signal for the switching circuit 2. A voltage controlled variable frequency oscillator circuit (which will be hereinafter referred simply to as a VCD) 11 produces an oscillation signal whose free-running frequency is ~ for example ~ four times of that of a reference signal or pilot signal, namely 76 K~Iz . The o scillation si gnal from the VCO 1 1 i s supplied to a flip-flop circuit 12 which divides the input oscillation signal into a rectangular wave signal with the frequency of 38 KHz. The rectangular wave signal from the flip-flop circuit 12is supplied to another flip-flop circuit 13 which divides the input signal into a rectangular wave signal with the frequency of 19 KHz. The rectangular signal from the flip-flop circuit 13 is supplied to a phase comparator circuit 14 which is supplied also with the stereo composite signal from the FM receiver 1. Thus, the phase of the rectangular signal from the flip-flop 13 is compared with the phase of the pilot signal in the stereo composite signal from the FM receiver 1 by the phase comparator 14. The compared output therefrom is supplied to a loop filter 15 for inte-gration. The loop filter 15 produces a DC voltage whose polarity and leval correspond to the phase difference between the rectangular wave signal and the pilot signal. This DC voltage is applied to the VCO 11 as its control signal.
Thus~ the oscillation signal from the VCO 11 is synchro-nized with the pilot signal in phase, and hence the rectangular wave signal from the flip-flop 12is in synchronism with the pilot signal.
The rectangular wave signal from the flip-flop 12is fed to the switch-ing circuit 12 as its cDntrol signal. Thus, the switching circuit 12 carries out its switching demodulation and produces at its output terminals 3L and 3R stereophonic signals of left and right channels~
re spe ctively .
1077~44 Now, the phase relation between the pilot signal Sp and the rectangular wave signal Sb from the flip-flop 13 is considered in the PLL 10 of Fig.1. If the oscillation frequency of the VCO
11 is four times QS that Or the pilot signal Sp, the frequency of the rectangular wave signal Sb from the flip-flop 13 is same as that Or the pilot signal Sp. Hence, as shown in Figs.2A and 2B, the rectangular wave signal Sb is ahead of the pilot signal Sp in phase by 90 and stable at that state. At this time, the phase comparator 14 produces, as its compared outputs, a signal of positive 1/4 cycle and a signal of negative 1/4 cycle alternately as shown in Fig.2D .
When the outputs of the phase comparator 14 are integrated by the filter 15, its integrated output is 0.
If, however, the phase Or the signal Sb becomes ahead - of that of the pilot signal Sp more than 90 , the compared output of the phase comparàtor 14 becomes long in positive cycle as com-pared with negative cycle, as shown in Fig.2C. Thus, the integrated output of the filter 15 becomes positive. While, if the phase of the signal Sb is delayed from that of the pilot signal Sp more than 90, the compared output of the comparator 14 becomes long in negative cycle as compared with positive cycle as shown in Fig.2D .
Thus~ the output of the filter 15 becomes negative.
Accordingly, the filter 15 produces a DC voltage VO whose polarity and level are varied in an N-shape in response to a deviation Qf of the phase or frequency between the pilot signal Sp and signal Sb as shown in Fig.3. In this case, the hysteresis width of the N-characteristics is determined by the loop gain of the PLL 10.
The present invention is to provide a correct switching signal for a reference signal in view of the above fact.
An example of the invention will be described with refer-ence to Fig.4 in which numerals same as those used in Fig.1 represent the same elements.
_ ~_ .' '. , 1077~4~
In the example of E~ig.4, the phase comparator circuit 1 4 is formed of a switching circuit of a double-balance type. That is, with a transistor 20 as a constant current source, a first pair of transistor 21 and 22 are connected differentially; with the tran-` 5 sistor 21 as a constant current source, a second pair of transistors 23 and 24 are connected differentially; and with the transistor 22 as a constant current source, a third pair of transistors 25 and 26 are connected differentially In this case, the stereo composite - signal is supplied from the FM receiver circuit 1 to the bases of the transistors 21 and 22, and the rectangular wave signal Sb from the flip-flop circuit 13 is supplied to the bases of the transistors 24 and 25 and to the bases of the transistors 23 and 26, respectively. The phase-comparated outputs described in connection with Figso 2C to 2E are derived between the collectors of the transistors 23, 25 and 1 5 between the collector-s of the transistors 24, 26, respectively. The filter 1 5, which is formed of a capacitor 31 and a series circuit of a capacitor 32 and a resistor 33 connected in parallel to the capacitor 31, is connected between the collectors of the transistors 24 and 25.
; The DC voltage V0, which is described in connection with Fig 3, is derived from the filter 15 and then supplied to the VCO 11.
With the present invention, a meter 51 whose center is null is connected between the output terminals of the filter 15 or in parallel to the capacitor 31, and the VCO 11 has provided with its free-running frequency adjusting circuit which consists of a parallel circuit of a resistor 41 and a capacitor 42. In the case of illustrated example~ a variable resistor 52 is connected in series to the resistor 41, by way of example According to the circuit construction described above, in the case that the free-running frequency of the VCO 11 is deviated and hence its oscillation frequency is deviated, the polarity and level " ,' ~
. 10771~4 of the DC voltage V0 is variecl in response to the deviation as shown in Fig 3. In this case, the DC voltage V0 is supplied to the meter 51, so that the meter 51 indicates thereon the direction and magnitude of the deviation of the oscillation frequency~ namely ~! 5 those of the switching frequency in the switching circuit 2. Thus~
if the variable resistor 52 is adjusted to make the indication on the meter 51 zero, deviation in the free-running frequency and oscil-lation frequency of the VCO 11 can be removed and hence there appears no deviation in the switching frequency. As a result, the separation, distortion factorJ no-linear crosstalk and so on of the stereophonic signals obtained at the terminals 3L and 3R are made optimum~
As described above, according to the present invention, even if there occurs secular variation, circumferential variation or deviation of the frequency of the pilot signal, the PLL 10 can perform its operation maximum and hence the stereo demodulation can be car-ried out optimum. In this case, only the provision of the meter 51 and the variable resistor 52 in addition to the prior art circuit is sufficient for the above purpose, so that the PLL of the present inven-tion is very simple in circuit construction and hence inexpensive The above description is given on the case that the present invention is adapted to the PLL for stereophonic demodulation, but it will be easily understood that the present invention can be adapted as a PLL of a player of the servo type with which the rotation of its turn table is locked at a signal from, for example, a quartz oscillator and as a PLL of the demodulation circuit for a 4-channel stereo record of a so-called carrier system.
Further, it is possible to supply the DC voltage VO from the filter 15 to the meter 51 through an amplifier, or to use an indi-cating element such as a luminous diode in place of the meter 51.
_ ~ _ 1~77~44 .~
It will be apparent that many modifications and variations could be effected by one skilled in the art without departing from the .~
spirits or scope of the novel concepts of the invention.
.9
Field of the Invention The present invention relates generally to a phase locked loop~ and is directed more particulary to a phase locked loop having an indicating means and a means for varying the frequency of a signal derived from a variable frequency oscillator.
.:
Description of the Prior Art Recently, a phase locked loop is employed in VariOUS
electronic instruments. As an example thereof, a stereo demodu-- 20 lator of an FM receiver can be exemplifiad. In this case, the phase locked loop is formed of a circuit for supplying a stereo composite signal to a switching circuit, a circuit for deriving a pilot signal from the stereo composite signal, a variable frequency ` oscillator~ a circuit for comparing the phase of an output from the oscillator (if necessary~ a signal which is frequency-divided is contained therein) with that of the pilot signal, and a circuit for supplying an output from the phase comparing circuit to the variable irequency oscillator as a control signal. The signal from the _ ~ _ .
.
: ' : .
;
variable frequency oscillator which is controlled in response to the output from the phase comparing circuit (the signal including a frequency-divided signal, if necessary) is applied to the switching circuit as a so-called switching signal. From the switching circuit there are derived spearated left and right stereo-phonic signals.
With the above prior art stereo demodulating circuit, the relationship between the deviation of the phase or frequency of the switching signal fed to the switching circuit and the separation of the stereo composite signal is such that if the phase or frequency of the switching signal is shifted any under the stereo composite signal being low in level, the separation is deteriorated rapidly. In this case~ when the loop gain of the phase locked loop is infinite ~
even if the free-running frequency of the variable frequency oscillator 1 5 is deviated from its ~i6rmal frequency, for example, 76 KHz which is four times of the frequency of the pilot signal, the oscillation fre-quency of the variable frequency oscillator is locked at 76 KHz and also synchronized with the pilot signal. As a result, there is caused no deviation in the phase and frequency of the switching signal.
In fact~ however, since the loop gain of the phase locked loop can not be made infinite, when the free-running frequency of the variable frequency oscillator is deviated from 76 KHz, the oscillation frequency thereof is also deviated. In other words, the deviation of .~
a DC voltage from a filter caused by the deviation of the oscillation frequency is balanced with that of the free-running frequency of the oscillator and the circuit becomes stable in such a state. so that at this time the oscillation frequency of the oscillator is deviated. When the oscillation frequency of the oscillator is deviated, the switching frequency is deviated. As a result, the separation of the left and right stereophonic signals from the switching circuit is deteriorated .
. . _ 7714~
To avoid this defect, upon manufacturing a receiver, the free-running frequency of the oscillator is adJusted at a normal frequency or 76 KHz to obtain an optimum separation of signals.
However, the free-running frequency of ths oscillator is deviated in accordance with tirne lapseJ circurnferences and so on. Further~
since the distortion factor and non-linear crosstalk similarly depend upon the switching frequency, they are also deteriorated.
OBJECTS AND SUMMARY OF THE INVENTION
An object of the invention is to provide a novel phase locked loop with which the phase difference between a reference ` signal and a signal to be compared is known.
Another object of the invention is to provide a phase locked loop which indicates the phase difference between a reference signal and a signal to be compared by means of simple construction and has means to remove the phase difference.
A further object of the invention is to provide a phase locked loop suitable for use in an FM stereo receiver.
A yet further object of the invention is to provide a phase locked loop which is provided with an adjustable means for making ~.
the oscillation frequency of a variable oscillator same as that of a reference signal always in accordance with secular variations and circumferences .
According to an aspect of the present invention there is provided a phase locked loop which comprises a variable frequency osciLlator, a phase comparator for comparing the phase of an output signal generated by said variable frequency oscillator with the phase of a reference signal and for providing a control signal in response to the phase difference therebetween, a circuit for supplying said control signal to said variable frequency oscillator, an indicator for 1(~77144 indicating the phase difference between the output signal of - said variable frequency oscillator and the reference signal, and a circuit for varying the frequency of the output signal of said variable frequency oscillator.
More particularly, there is provided:
A phase-locked loop circuit comprising a voltage controlled oscillator providing an output signal and having a free-running frequency that may vary with time; a phase com-parator comparing the phase of a reference signal with the phase of a compared signal which is derived from said output signal of the voltage controlled oscillator for providing a D.C. control voltage in response to a variation of the phase relation of said compared signal with said reference signal, said phase comparator including a first pair of transistors ., each having an input electrode supplied with said reference signal and an output electrode, a second pair of transistors connected to said output electrode of one of said first pair ,~:
of transistors, and a third pair of transistors connected to : said output electrode of the other of said first pair of transistors, said second and third pairs of transistors each having an input electrode supplied with said compared signal;
a filter circuit connected to said phase comparator between output electrodes of said second and third pairs of transis-tors and to said voltage controlled oscillator and through which said control voltage is applied to said voltage con-trolled oscillator so as to shift the actual frequency of said output signal from the oscillator in respect to said free-running frequency for eliminating said variation of the phase . relation; indicator means including a meter whose center is null and which is connected in parallel with said filter cir-cuit for indicating the value and polarity of said D.C. con-_~
~077~4~
trol voltage, and manually actuable means connected with saidvoltage controlled oscillator for adjusting said free-running frequency of the voltage controlled oscillator in the sense, and to the extent indicated by said meter for eliminating said control voltage due to a variation of said free-running frequency with time.
- The other objects, features and advantages of the present invention will become apparent from the following de-scription taken in conjunction with the accompany drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
-- Fig. 1 is a block diagram showing an FM stereo receiver in which an example of the phase locked loop according to the present invention is used;
Figs. 2A to 2E are signal waveform diagrams used for ., explaining the phase locked loop of the invention;
Fig. 3 is a graph showing the output from a filter used in Fig. 1 which is based on the frequency and phase differ-ences of a reference signal and a singal to be compared with the former, and Fig. 4 is a block diagram showing a practical example of a phase comparator and a filter used for forming the phase locked loop of the invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT
An example of the phase locked loop according to the present invention used as the stereo demodulator of an FM re-ceiver will be described, by way of example, with reference to Fig. 1.
In Fig. 1, 1 designates a tuner including elements of an Fl~ receiver from its antenna tuning circuit to FM demodula-tor circuit. Upon the stereo reception, a stereo composite signal is derived from the receiver 1 and then fed to a switch-ing circuit 2 for stereo demodulation~
-4a-~.077~L44 In Fig.1 ~ lO denotes a phase locked loop (which will be hereinafter referred simply to as a PLL) which produces a switching signal for the switching circuit 2. A voltage controlled variable frequency oscillator circuit (which will be hereinafter referred simply to as a VCD) 11 produces an oscillation signal whose free-running frequency is ~ for example ~ four times of that of a reference signal or pilot signal, namely 76 K~Iz . The o scillation si gnal from the VCO 1 1 i s supplied to a flip-flop circuit 12 which divides the input oscillation signal into a rectangular wave signal with the frequency of 38 KHz. The rectangular wave signal from the flip-flop circuit 12is supplied to another flip-flop circuit 13 which divides the input signal into a rectangular wave signal with the frequency of 19 KHz. The rectangular signal from the flip-flop circuit 13 is supplied to a phase comparator circuit 14 which is supplied also with the stereo composite signal from the FM receiver 1. Thus, the phase of the rectangular signal from the flip-flop 13 is compared with the phase of the pilot signal in the stereo composite signal from the FM receiver 1 by the phase comparator 14. The compared output therefrom is supplied to a loop filter 15 for inte-gration. The loop filter 15 produces a DC voltage whose polarity and leval correspond to the phase difference between the rectangular wave signal and the pilot signal. This DC voltage is applied to the VCO 11 as its control signal.
Thus~ the oscillation signal from the VCO 11 is synchro-nized with the pilot signal in phase, and hence the rectangular wave signal from the flip-flop 12is in synchronism with the pilot signal.
The rectangular wave signal from the flip-flop 12is fed to the switch-ing circuit 12 as its cDntrol signal. Thus, the switching circuit 12 carries out its switching demodulation and produces at its output terminals 3L and 3R stereophonic signals of left and right channels~
re spe ctively .
1077~44 Now, the phase relation between the pilot signal Sp and the rectangular wave signal Sb from the flip-flop 13 is considered in the PLL 10 of Fig.1. If the oscillation frequency of the VCO
11 is four times QS that Or the pilot signal Sp, the frequency of the rectangular wave signal Sb from the flip-flop 13 is same as that Or the pilot signal Sp. Hence, as shown in Figs.2A and 2B, the rectangular wave signal Sb is ahead of the pilot signal Sp in phase by 90 and stable at that state. At this time, the phase comparator 14 produces, as its compared outputs, a signal of positive 1/4 cycle and a signal of negative 1/4 cycle alternately as shown in Fig.2D .
When the outputs of the phase comparator 14 are integrated by the filter 15, its integrated output is 0.
If, however, the phase Or the signal Sb becomes ahead - of that of the pilot signal Sp more than 90 , the compared output of the phase comparàtor 14 becomes long in positive cycle as com-pared with negative cycle, as shown in Fig.2C. Thus, the integrated output of the filter 15 becomes positive. While, if the phase of the signal Sb is delayed from that of the pilot signal Sp more than 90, the compared output of the comparator 14 becomes long in negative cycle as compared with positive cycle as shown in Fig.2D .
Thus~ the output of the filter 15 becomes negative.
Accordingly, the filter 15 produces a DC voltage VO whose polarity and level are varied in an N-shape in response to a deviation Qf of the phase or frequency between the pilot signal Sp and signal Sb as shown in Fig.3. In this case, the hysteresis width of the N-characteristics is determined by the loop gain of the PLL 10.
The present invention is to provide a correct switching signal for a reference signal in view of the above fact.
An example of the invention will be described with refer-ence to Fig.4 in which numerals same as those used in Fig.1 represent the same elements.
_ ~_ .' '. , 1077~4~
In the example of E~ig.4, the phase comparator circuit 1 4 is formed of a switching circuit of a double-balance type. That is, with a transistor 20 as a constant current source, a first pair of transistor 21 and 22 are connected differentially; with the tran-` 5 sistor 21 as a constant current source, a second pair of transistors 23 and 24 are connected differentially; and with the transistor 22 as a constant current source, a third pair of transistors 25 and 26 are connected differentially In this case, the stereo composite - signal is supplied from the FM receiver circuit 1 to the bases of the transistors 21 and 22, and the rectangular wave signal Sb from the flip-flop circuit 13 is supplied to the bases of the transistors 24 and 25 and to the bases of the transistors 23 and 26, respectively. The phase-comparated outputs described in connection with Figso 2C to 2E are derived between the collectors of the transistors 23, 25 and 1 5 between the collector-s of the transistors 24, 26, respectively. The filter 1 5, which is formed of a capacitor 31 and a series circuit of a capacitor 32 and a resistor 33 connected in parallel to the capacitor 31, is connected between the collectors of the transistors 24 and 25.
; The DC voltage V0, which is described in connection with Fig 3, is derived from the filter 15 and then supplied to the VCO 11.
With the present invention, a meter 51 whose center is null is connected between the output terminals of the filter 15 or in parallel to the capacitor 31, and the VCO 11 has provided with its free-running frequency adjusting circuit which consists of a parallel circuit of a resistor 41 and a capacitor 42. In the case of illustrated example~ a variable resistor 52 is connected in series to the resistor 41, by way of example According to the circuit construction described above, in the case that the free-running frequency of the VCO 11 is deviated and hence its oscillation frequency is deviated, the polarity and level " ,' ~
. 10771~4 of the DC voltage V0 is variecl in response to the deviation as shown in Fig 3. In this case, the DC voltage V0 is supplied to the meter 51, so that the meter 51 indicates thereon the direction and magnitude of the deviation of the oscillation frequency~ namely ~! 5 those of the switching frequency in the switching circuit 2. Thus~
if the variable resistor 52 is adjusted to make the indication on the meter 51 zero, deviation in the free-running frequency and oscil-lation frequency of the VCO 11 can be removed and hence there appears no deviation in the switching frequency. As a result, the separation, distortion factorJ no-linear crosstalk and so on of the stereophonic signals obtained at the terminals 3L and 3R are made optimum~
As described above, according to the present invention, even if there occurs secular variation, circumferential variation or deviation of the frequency of the pilot signal, the PLL 10 can perform its operation maximum and hence the stereo demodulation can be car-ried out optimum. In this case, only the provision of the meter 51 and the variable resistor 52 in addition to the prior art circuit is sufficient for the above purpose, so that the PLL of the present inven-tion is very simple in circuit construction and hence inexpensive The above description is given on the case that the present invention is adapted to the PLL for stereophonic demodulation, but it will be easily understood that the present invention can be adapted as a PLL of a player of the servo type with which the rotation of its turn table is locked at a signal from, for example, a quartz oscillator and as a PLL of the demodulation circuit for a 4-channel stereo record of a so-called carrier system.
Further, it is possible to supply the DC voltage VO from the filter 15 to the meter 51 through an amplifier, or to use an indi-cating element such as a luminous diode in place of the meter 51.
_ ~ _ 1~77~44 .~
It will be apparent that many modifications and variations could be effected by one skilled in the art without departing from the .~
spirits or scope of the novel concepts of the invention.
.9
Claims
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A phase-locked loop circuit comprising a voltage controlled oscillator providing an output signal and having a free-running frequency that may vary with time; a phase comparator comparing the phase of a reference signal with the phase of a compared signal which is derived from said output signal of the voltage controlled oscillator for providing a D.C. control voltage in response to a variation of the phase relation of said compared signal with said reference signal, said phase comparator including a first pair of transistors each having an input electrode supplied with said reference signal and an output electrode, a second pair of transistors connected to said output electrode of one of said first pair of transistors, and a third pair of transistors connected to said output electrode of the other of said first pair of transistors, said second and third pairs of transistors each having an input electrode supplied with said compared signal;
a filter circuit connected to said phase comparator between output electrodes of said second and third pairs of transistors and to said voltage controlled oscillator and through which said control voltage is applied to said voltage controlled oscilla-tor so as to shift the actual frequency of said output signal from the oscillator in respect to said free-running frequency for eliminating said variation of the phase relation; indica-tor means including a meter whose center is null and which is connected in parallel with said filter circuit for indicating the value and polarity of said D.C. control voltage, and manual-ly actuable means connected with said voltage controlled os-cillator for adjusting said free-running frequency of the vol-tage controlled oscillator in the sense, and to the extent indicated by said meter for eliminating said control voltage due to a variation of said free-running frequency with time.
a filter circuit connected to said phase comparator between output electrodes of said second and third pairs of transistors and to said voltage controlled oscillator and through which said control voltage is applied to said voltage controlled oscilla-tor so as to shift the actual frequency of said output signal from the oscillator in respect to said free-running frequency for eliminating said variation of the phase relation; indica-tor means including a meter whose center is null and which is connected in parallel with said filter circuit for indicating the value and polarity of said D.C. control voltage, and manual-ly actuable means connected with said voltage controlled os-cillator for adjusting said free-running frequency of the vol-tage controlled oscillator in the sense, and to the extent indicated by said meter for eliminating said control voltage due to a variation of said free-running frequency with time.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3652576A JPS52119852A (en) | 1976-04-01 | 1976-04-01 | Pll |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1077144A true CA1077144A (en) | 1980-05-06 |
Family
ID=12472206
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA274,618A Expired CA1077144A (en) | 1976-04-01 | 1977-03-23 | Phase locked loop |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JPS52119852A (en) |
| AU (1) | AU514390B2 (en) |
| CA (1) | CA1077144A (en) |
| DE (1) | DE2714656A1 (en) |
| FR (1) | FR2346895A1 (en) |
| GB (1) | GB1564386A (en) |
| NL (1) | NL7703408A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL174312C (en) * | 1978-05-17 | 1984-05-16 | Philips Nv | STEREO DECODER WITH 19KHZ PILOT SUPPRESSION AND IMPROVED OSCILLATION PHASE LOCK. |
-
1976
- 1976-04-01 JP JP3652576A patent/JPS52119852A/en active Pending
-
1977
- 1977-03-23 CA CA274,618A patent/CA1077144A/en not_active Expired
- 1977-03-28 GB GB1295577A patent/GB1564386A/en not_active Expired
- 1977-03-29 NL NL7703408A patent/NL7703408A/en not_active Application Discontinuation
- 1977-03-29 AU AU23749/77A patent/AU514390B2/en not_active Expired
- 1977-03-31 FR FR7709818A patent/FR2346895A1/en active Granted
- 1977-04-01 DE DE19772714656 patent/DE2714656A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| DE2714656A1 (en) | 1977-10-13 |
| AU514390B2 (en) | 1981-02-05 |
| AU2374977A (en) | 1978-10-05 |
| NL7703408A (en) | 1977-10-04 |
| FR2346895B1 (en) | 1981-10-02 |
| JPS52119852A (en) | 1977-10-07 |
| FR2346895A1 (en) | 1977-10-28 |
| GB1564386A (en) | 1980-04-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |