CA1075813A - Inversion and regeneration in charge transfer devices - Google Patents

Abstract

Krambeck-Strain 4-7 INVERSION AND REGENERATION IN CHARGE TRANSFER DEVICES

Abstract of the Disclosure A basic inversion-regeneration element for use with charge transfer devices. In a described embodiment the element includes three localized semiconductive zones and two localized field plate electrodes which cooperate to sense the charge stored in a charge transfer device and to control the movement of a fixed amount of charge away from an independent source.

Description

~075813 Krambeck-Strain 1~_7 1 Background of` the Invention

2 This invention re:Lates to semiconductor devices;

3 and, more particularly, to charge transfer devices capable

4 of providing logic state inversion and bit regeneration.
One ~orm of charge transfer devices, which has 6 been termed "charge coupled devices," was first descrlbed 7 in the copending Canadian patent application Serial 8 No. 097,711, filed November 9, 1970, by W. S. Boyle and 9 G. E. SmithJ and in the copending Canadian patent application Serial No. 097,712, filed on the same date by D. Kahng and 11 E. H. Nicollian. In these devices information is 12 represented by electronic signals in the form of packets 13 of charge carriers localized by induced potential energy 14 minima in suitable storage media such as semiconductors, semi-insulating semiconductors, and insulators. Those 16 copending applications specifically describe primarily a 17 basic shift-register type of operation in which information 18 is moved within the material by transferring the packets 19 of charge sequentially from each potential well to the one next adjacent.
21 In another form of charge transfer devices, described 22 in the copending Canadian patent application Serial 23 No. og8,836, filed November 23, 1970, by C. N. Berglund 21~ and H. J. Boll~ packets of charge carriers are gated sequentially from zone to zone along the surface of a 26 semiconductive body which includes a bulk portion of one 27 type semiconductivity and a plurality of spaced localized 28 zones of the other type semiconductivity. In these devices .

1~5~3~L3 each zone is operated as a potential well, the boundary of which is defined by the PN junction which defines the zone.
This Berglund-Boll type of charge transfer apparatus i5 presently being referred to as the "bucket brigade" type by those in the art; and so that designation will be used hereinbelow.
A problem early recognized in charge transfer devices is that a small fraction of the charge from each packet is left behind each time a packet is transferred from one potential well to another. Inasmuch as this charge loss results in signal degradation, some form of controlled charge regeneration and/or amplification must be provided if very long strings of information are to be so stored and processed.
And, of course, it is desirable to provide other modes of operation, such as, for example, complete sets of combinational logic functions. Perhaps the most basic of digital logic functions is "state inversion" (signal complementing) and "bit regeneration." Given these two basic functions, it is known that all other combinational logic functions, e.g., AND, OR, NAND~ NOR, fan-in and fan-out, can be derived therefrom.
Summary of the Invention . _ In accordance with an aspect of the invention there is provided in charge transfer apparatus of the type adapted for storage and serial trans~er of charge carriers locali2ed in induced potential energy minima along a portion of a suitable storage medium by sequentially applying a plurality of differing potentials to successive portions of the surface of the medium through field plate electrodes, the improvement which includes means for ~ .

.1075~31.3 providing state inversic)n and bit regeneration in combination with said storage and serial transfer comprising: means disposed in said apparatus for detecting the amount of charge carriers stored therein at a predetermined location at a predetermined time; means for pre-biasing the detection means to a fixed reference level prior to each detecting operation for improved sensitivity; means for injecting at another location within said apparatus a controllecl amount of charge of the type stored and transfereed; and gating means disposed adjacent to the injecting means and coupled to the detection means for controlling the transfer of charge away from the injection means in response to the charge carriers detected at said predetermined location.
It is an ojbect of this invention to provide means for controlled charge regeneration in charge transfer devices.
It is a further object of this invention to provide means for inverting the logic state of information stored in a charge transfer device.
These and other ends are accomplished in accordance with our invention through: means disposed in a charge transfer device apparatus for detecting the amount - 2a -.~
'! `~
. ~

~75813 Kr~mbeck-Straln 4-7 l o~ charge ~tored thereln at ~ predctermined locatlon at 2 a predetermlned time; m~ns for pre-bia~lng the detectio~
3 mean~ to a ~ixed rereren~e level prior to each detectln~
4 operatlon ~or lmproved sen~ltlvity; me~n~ ~or lnJecting a controll~d amount of char~e at another locatlon withln 6 ~aid apparatu~; and ~ating mean~ di~po~ed ad~acent to the 7 lnJectlng ~nean~ and conductlvely connected to the ~en~in~
8 means for controllln~ the tran~rer o~ charge away from the 9 ln~ection mean~ in r~ponse to the losical ~t~te dete~ted at the predetermined ~oc~tlon.
11 The above-~ummarlzed more general a~pects of our 12 lnventlon are embodled ln a presently pre~erred ~orm o~
13 our in~ention which lnclude~ a ~emiconductlve ~tora~e 14 medlum, thre~ localized semlconducti~e zone~, and t~o locallzed field plate electrode~ which cooperate to sense 16 the charse stored in a charge tran~er devlce an~ to 17 contro~ the moYement ~r a ~ixed amount o~ ~har~e away ~rom 18 an indepen~ent ~ourcc.
l9 More ~pecl~lcally~ ~n accordar.ce wlth the aforementloned embodlment o~ our invention~ a ~lrst one 2i o~ the three semiconductive zone3 i~ adapted for ~en~ing 22 the bits to be regenerate~ and, a8 ~uchD i~ dispo~ed ln 23 the in~ormation channel o~ a cha~ge tran~Per devlceO ml~
~4 flrst or sensor zone 1~ conductlvely coupled to a ~lrst localized ~leld plate electrode whlçh~ in turn, 18 adapted 26 ~or controllin~ the trans~er o~ char~e a~ray ~rom the ~7 lndependen~ ~ource. The volta~ o~ the ~n~or i~

28 p~rlodically re~et prior to each ~en~l~g operatlon by 29 coupllng lt to a ~ec~nd znne connected to a ~olta~e ~ourceO
ffliB coupling lc accompll~hed by brldgin~ th~ ~1r~t and 31 ~econd zone~ with a $econd locallzed fleld plate el~ctrode 32 which ic connecte~ to on~ oP th~ clock lln~ the charg~

~ 3 --~758~3 Krambeck-Str~n 1~_7 1 tran~rer device. The third ~emicon~uctlve zone l~
2 connected to the ~am~ clock lin~ (or optionally to an 3 lndependent pul~e ~en~rator ynchroniz~d ther~wi~h) and 4 ~erves a~ the independent ~ource Or new char~e carrier~.
Erler Description Or the Drawin~
6 The a~orementloned and other embodlment~ and the 7 lnvention in general will be better under~tood from th~
8 ~ollowing more detalled descriptlon ta1ten ln conJunction ~ wlth ~he accompanying drawin~ ln which:
~Ia, l is a cro~_sectiona~ v~ew of a basic ll charge coupled device adapt~d rOr two-pha~e operatlon;
~2 F~a. 2 i8 a ~chematic plan vie~ Or R device o~
13 the type ~hown in FIO. l;
14 FI~. 3 ln a schematic plan view o~ charge coupled apparatus employln~ a basic inver~ionOregeneration element 16 ln accordance wlth a ~lr~t embodiment o~ our lnvention;
17 FIG~ 4 is a cross-sectional vle~ taken along l~ line 4-4 in FI~. 3;
lg PIG. 5 i8 a ~hematic plan vlew o~ apparatus o~
~0 th~ type ahown ln FIG. 3 modi~ied to increas2 the output 21 ~ignal from the lnver~ion-regenera~ion ~lement;
22 FqGo 6 1~ a ~chematic plan v~ew o~ another ~orm 23 `of charge tran~fer apparatu~ empl~ying a ba~ic lnver~ion-24 regenera~ion element in accordance wnth another embodim~nt 25 o~ our inventlon; and 26 FI~I. 7 1~ a cro~s-~ec~lonal view ta~cen along 27 l~na 7.7 ~n ~a. 6.
28 It will be appreclated that ~or simplicity and 29 clarlty oP expl~nation th~ ~igures have not neoe~sarily 30 been drawn to ~cale,, Krambeck-.',train 11 '1 1 Detailed ~escriptlorl o~ the ~rawirl~
2 With more spccific re~erence now to t.he drawing, 3 it is believed the present invention will be more readily 4 understood by first reviewing a representative structure and mode of operation of the "charge coupled" type of 6 apparatus described in the above-referenced copending 7 Smith et al and Kahng et al applications. FIGS. 1 and 2 8 are directed to this end.
9 In charge coupled devices (CCD's), digital information is represented by the presence or absence 11 of packets of charge carriers localized in and 12 electrostatically "coupled" to artificially induced 13 potential energy minima, e.g., potential wells, typically 14 ad~acent to an interface with a superposed material.
Advantageously the potential wells are formed and 16 controlled by application of voltages to field plate 17 electrodes of the type conventionally used in the metal-18 insulator-semiconductor (MIS) technologies. Inasmuch as 19 the MIS art is well established and well known, it is considered unnecessary to describe in detail procedures 21 for fabricating the structures disclosed below.
22 ~IG~ 1 shows a cross-sectional view of a basic 23 charge coupled device structure 10 adapted for two-phase 24 operation. Device _ includes a semiconductive N-type bulk portion 11, overlying which there is an insulating 26 layer 12 of nonuniform thickness. Overlying layer 12 are 27 a plurality of close-spaced electrodes 13A, lLIA, 13B, 28 14B, and 13C. As shown in the figure, each electrode ~"
29 includes a first portion overlying a relatively thick region of insulating layer 12 and a second portion overlying ,~ .
~ .

~075813 K~ambeck-~traln 1~_7 1 a relatlvely thln re~ion Or ln~ulnting layer. Every ~econd 2 electrode 1B connected ~o a common one of a pair Or 3 conductlon paths 15 and 16 to whlch drlvln~ pul~e~ (clQck 4 pul~e~) ~1 and ~2 are applled.
More speci~lcally~ FI~. 1 repreaents the operating 6 condltlon in whlch ~ e~ual to (-Vl) and ~2 i~ equal to 7 (-~2)- The V~'~ are taken as posltlve number~; and V2 i~
8 greater than Yl- Vl i~ greater than VTJ where V~ 1~ the 9 threshold voltage ~or producing an lnver~ion o~ the ~emlconductor sur~ace under cteady ~tate condltions~
11 ~roken llne 15 represents schematic~lly the ~ur~ace 12 ~otential (depth Or the potential well~) Or the ~urrace 13 under the above-de~cribed oper~ting condltlon. Where, as 14 herel the operating medium 11 1~ ~e~iconduc$iYe~ broken llne 15 may also ~e con81dered a~ repre~enting schema~cslty 16 the boundaries of depletion region~ ~ormed by voltage~ -17 applled to the electrode~. Charge carrler~ h~les ln thls 18 ca~e, are rcpre~nted schamatlcally by plu~ n~ inserted 1~ in the potentlal well8. Inas~uch as hole9 ~end toward3 ~0 point8 o~ mo~t negative potentlalJ lt i~ readily ~een that 21 ln thl8 operating condltion any free holes under eit~er 22 elec~rode 13A or l~A will tran~er to the ~ht lnto the ~3 de~pe~t portion of the pot~ntial well under eleotrode 14A
24 unt~l all ~h~.hole~ ha~e been transferred or untll ~uPPicient hole~ have trans~erred that the eur~ace poten~ial under the 26 righ~-hand portion o~ electrode 14A ha~ become ~qu~l t~ the 27 ~urrace poten.~lal under th~ lef't~hand portion o~ that ~8 elec~rodeJ which~ver occur~ f~r~
29 ~ aP~er the above descrlb~d condlt~on has b~en e6tabll~hed, the cloGk~pul~e~ ar~ rever9ed ~uch that (~Vl) 31 lo applied ~o ~lock line 16 and (-~2) ~8 applled to olock 32 line 15, the potential w~ under ~lectrodes 13~-i3C w 7 5~ ~3 ~rarnbeck~Straln ~l-7 1 become ~t~e deeper on~ and the potentlal wc118 under 2 electrode~ 14A and 14B will be~ome the ~hallower one~.
3 A~ thl~ transformatlon occur~ the char~e under eleckrodes 14A
4 and 14B will tran3~er to the ;r~ght under electrode~ 13

5 and l~C, re~pectivcly. Tne charge~ tran~3rer to the ri~sht

6 rather than ko th~ left because o~ th~ a~y~netry bullt

7 into the pokential well~ a~ a r~sult o~ the nonunl~orm

8 thlclcness o~ insulator 12. In like manner a~ eaoh reveraal

9 o~ the applied clock voltage~ the charge packet~ ~or the

10 absence the~eo~ ) repr~senting information are tran~erre~

11 one ~tep to th~ rlght.

12 ~I~o 2 lllu~trate~ ~cheMatically a plan view Or

13 ~ devlce o~ the type 8~0wn in FI~. 1. In FI~. 2 solld

14 line pa~terns 13A--14B represent CCD ~lel~ plate electrode8 ident~fied by the ~ame re~rence numeral~ u~ed ln FI~ lo 16 ~lock llnes 15 and 16 likewl8e are corre~pondi~gly 17 identl~led~
18 Wlth ~he Poregoing ~ackground informa~ion in m~nd, lg there wlll now be descrlbed ~harge coupled appara~us employlng a basl~ lnYer5ion regeneration element ln 21 accordance with one embodiment o~ the pre9ent lnven~ion.
22 A 8chematic plan view o~ the appa~atu~ i8 ahown ln ~I~o ~3 2~ where a plurality o~ ~e~lally di~posed ~leld pla~e 24 electrode~ 23A, 24A~ 23BJ 24~ and 2~C repre~ent ~he end o~ a CCD ch~nel who~e bit stream ia to be ~n~r~ed and 26 regenerated; an~ ~erially dl8po~ed ~leld plate electrode8 33A~
27 34AJ 33B~ 34B~ and 33C repre~en~ the beglnning o~ a ~r~9h 28 CCD chan~el to aocept th~ lnverte~ and reg~nerated bit 29 ~tream~ A~ 8hown~ ~Y~ry 8econd one of the ~bo~e~m0ntloned CCD electrode8 1~ connected to a common o~e o~ a pair oP
31 clock l~nec 25 and 2~. Further, it will be a~umed tha~

32 tho8~ CCD electrode~ are a8ymmetrlcal in ~uch a direction ~075~3~ 3 Kramb~
1 to cau~e ln~ormatlon to be transferred to the ri~,ht ln the 2 input or de~;raded channel (as lndicat~d schematlcally by 3 ~rrsw 22 ) and to c~u~e lnformat~on to be tran~rerred to 4 the lert in th~: outpu'c or lower channel (aa lndlcated ~chematically by arrow 35).
6 In FI~. 3~ broken l~ne pa~terns l~l, 4~3 and 43 7 deplct localized P-typ~ ~emiconductive ~on~ di~posed 8 beneath the ~urrace o~ th~ lnsulatln~s layer. ~olid llne 9 pattern~ 24 and 32 repreaent rield plate ~lectrode~
overlying the ln~ulatin8 layer~ Loc~llzed zone~ 41-43 ln 11 comblnatlon wlth rield plate control 01ectrodes 24 and 32 12 represent the inverAlon-r~generation element in accordance 13 wlth the inventlon.
14 As will be ~eacrib~d in more ~etall lmm~dlately below~ zone 41 1~ adapted rOr son~ln~ inPor~a~lon ln the 16 degradad channel an~J accordingly, ~8 dl~po~ed ad~acent 17 the la~t CC~ ~lectrode ~23C~ at th~ end o~ the degrade~
18 channel~ Zone 42 i~ ~paced rrom zone 41. and the ~pace 19 thersbetween 1~ brldg~d by f7ield plate control electrod~ 24 ~o tha~ zone~ 42 3n~ 41 can e~fect~vely b~ couplsd ~ogcther 21 by applylng a voltage to ele¢~70~e 24 ~urflcl~nt to ~nvert ~2 the ~ur~ace b~twsen æone~ 42 and 41 23 ` ~n opera~io~ æone 4~ i~ he~d at ~ ~x~d n~gati 24 pot~nt~al lndl~ate~ by ~ ~ ) in the ~igure. -Zo~e 41 operates to ~n~e paoket~ of c~r~e which sequentlally are 26 tran~erred und~r CCD ¢lectrode 23~; ~n~ th~ voltage 27 ther~by lndu~7e~ on zone 41 b~ ~he incomlng packek~ o~
~8 charge ~ conductively coupl~d d~rectly to ~i~ld plate 29 olectrod~ 32 by a metallio ov~rl~y 44~
Zono 43 r~pre~ent3 an ~ndep~ndent ~ource o~7 ch~r~e 31 carrler~ which ar~ gat~d und~ CCD electrode 33A o~
32 ~nhibl~d ~7rom b~in,g 'c~n~err~ ther*under, dependlng on 33 'che Yoltaæe lnduc~ on ~71~1d plate el~c~rode 32~

~i75~3~3 Krambeck-Str~in ~-7 Accordin~ly, flli ~ho~n, ~leld plate control 2 electrode 32 i9 dl~po~ed between source 43 and elec'crod~ 33C
3 (th~ ~lr~t CCD electrode ln the regenerat~d ohannel) ~o 4 that zone 43 can be e~ctlvely coupl~d to the ~otential 5 well under electrode 33C by applylng a vol~a~e to control 6 electrode 32 ~uf~lcient to ln~ert t~e ~emlconductor ~ur~ace 7 th~r2und~r. A~ ~hown, ~ourc~ 43 ~nd ~lel~ plate electrode 24 8 are connect~d together and to clock line 26~ i,e " the one ~ other than that to which CC~ electrodes 23~ and 33A ar~
connected, 11 Advanta~eou~ly g-VR) i3 s~l~cted to be more 12 ne~ati~e than ~he mo~t negat~ve (-V2~ o~ the palr o~
13 voltage~ alternately applied to ~he clock lines. In this ZS
14 caae~ whan (~V2) i~ applled to clock lin~2~_~nd (-Y
ap~lled to clock lin~ ~ char~ pac~et~ ln th~ CC~
16 -channel3 are loca~ed under ~lectrode~ 24A5 ~4BJ 34A, and 17 34B. B~cause ~l~la pl~t~ 24 1~ conne¢ted to cloc~ line 26 18 and becau~e (~ a~ lea3t a~ ne~atl~e a3 (-~2~ a 19 potentlal Q~ appro~mately (-V2~ ~ ~T i8 lnduced on ~loatln~ ~ensor zo~e 41~ or ~our~e~ ~hi~ ~ame vol~a~e 21 al~o 13 couplad to and appear~ upon gat~ng elec~rode 32 22 ~ ~hy~ically ~hi~ ~oltag~ nduoe~ on ~one 41 ~ b~cau~ po~lti~ char~ carrier~ (hole~ are dra~n ~rom 24 zone 41 ~hrough the invert~d r.eglon under electrode 24 ~5 into thQ mo~ n~ga~ivQ ~ono 42. I~ wlll b~ ~ppreciate~
6 that zon~ 42 i~ thu~ adapted to operate 1tl s~milar ~a~hlon th~ dral~l ln an ln~ulat~d ~te ~ld e~P~ct translstor ~8 ~ ET)~ thi~ oondit~otl a he~vlly invert~d ~e~ion l~
29 ~orm~d under ~at~ ie¢tro~ 32 bub no positi~r~ oharge 30 ~arrl~rG are tran~r~ed ~rom souro~ 43 to ~l~ctrod~ 33A
31 becaus6 ~ouroe 43 1~ mor~ neg~ti~t~ than ~lectrode 33A4 - 9 ~

~5~313 }~rarnbeck Strain 4 7 At the next hal~ Or th~ clock cycl~ ~wh~n 2 ~ V2) and ~ V~ en~or 41 1~ d~coupled from 3 drain 42 because o~ the le~ n~atlv~ voltage applled to 4 coupling ~l~ctrGd~ 24. Also of' ~mpor~nnce 1~ the ~act that 5 ~ource 43 i~ now le~39 negative than CCD electrode~ 33~ ~o 6 that po~itive charge carrler~ can be trans~erred to 7 electrode 33A unlass inhibited by the ~ctlon o~ gs'clng 8 electrode 32.
9 A~ the ¢lock volta,~e~ Ars swltched lnto thl~
10 la~t-de~crl~ed condition, 'che rhar~e packet~ repre~entlng 11 in~xmatlon are trans~erred ~rom the electrode~ numbered 24 12 and 34 under electrodes numbered 23 and 33 ~ re~pectiYely .
13 I~ a loglcal ~}~1 ~a packet o~ charge ) i~ t~ans~erred ~rom 14 Qlectrode 24~3 to electrode ~3C~ mo3~ of' that char,~e 18 1~ drawn into zon~ 41 and serve~ to dl~chax~e the negative 16 potential 3tored thera ~ The potentials and the ~pacin~ o~
17 gating elec~rode 32 ~rom the~~emlconduator ~ur~ace ~re 18 adJusted 8UC~I. that a~ter a ~ (a pac~ce'G o~ char~;e~ 13 19 drawn lnto 3enÆor 41,~ th~ voltage ~emalnlne; on ~a~ing 20 electrodc 22 i~ ln~u~ ciently ne~ati~e to allow th~
21 transrer o~ charge ~rom source 43 to CC~ electr~de 33A.
22 ~hu8~, ao a ~1n i~ tra~ rred under CCD el~ctrode 23C~ a . . .
23 l~o~' appear~ under ~CD electrode 33~, 24 Conver~ly, i~ a ~C)~' ~absence o~ a paoket o~
25 chax~ge) iB tran~rerr~d under electrode 23C khe volt~g~ ort 26 ~ensor 41 wlll no~ ~ di~charg~d a~d ~he ~lta~e on ~'ci~
, 5~7 ele¢t~od~ 32 w111 rem~in ~u~:~ic~ently ne~5a'cl~re to allow a 28 pack~t o~ ch~r~ to t~an~r ~rom ~ou~ce ~3 to CCD
29 electrod~ 33A. mu3~, a~ 0~ trar~ rr~d under 30 ~lectrode 2 C; a "1" Flppear~ und~r elec~rode 33A.

31 A~ the naxt rever~al of' the cloak voltage~ .
32 ~when ~ VL) and ~ w ~_V2)) any exc~ po~1tltr~ char~e ~ 10 -.
. .- ., . - ~

~~ ICr~mbe ck- Str~ l n l~ - 7 1 1~ ùrawn rrom ~en~or 41 lnto dr~ln 42. In thi~ m~nner th~
2 voltage on aen~or 41 1~ re~t to a pr~determined voltage 3 prior to ac~epting each incomlng de~;radecl bit. Becaune 4 o~ thl~ reEet reature whlch causea the ~enaor hele~ to 5 start at the ~ame potential when nccep~n~ an incomin~ bit, 6 tile inverslon-re~eneration element ~ in accordance with 7 thi invention~, of'~er~ lmproved s~n~îtivity and opera tlng 8 noise margln.
9 ~or a more comple~e under~tanding of' ~he apparatu~
10 depict~d ~chematically in FIG~ . 4 ~how~ a cro~s~
11 sectlonal vlew taken along line3 4-4 in ~I~. 3. Re~erence 12 numeral~ have been repeated to indicate correspondlng 13 elemenkc where appropriate. In ~I~. 4J P-type loc~liz~d 14 Ben80r æone 41 i3 ~hown con~acted ~l~ctrlcally by a 1QW

15 reaistan¢e olectrode 27 (no1; shown ln FIC}o ~)~ and draln

16 zone 42 1~ ~hown con~acted olectrlcally by a ~lm~lar low

17 r~si~'Gance electrode 28 talco no~ ~hown ln FI~. 3)0 Th~

18 other ~eature~ will be under~oo~ rrom a comp8ri~0n oP

19 the ~wo ~igure~ ~t ~hould be no~ed that contr~l

20 ele~trod~ 24 18 dlspo~d only over th~ thlnnsr portion Or

21 ~ielec~ric layer 12~ Gon~rol electrode 24 need not

22 be asyIDmetrically ~ posed lik~ CCD electrodes Z4B and ~4C.
~3 hk~w~e ~satin6 ~leotrode 32 al80 n~ed not be a~yrnm~rical, bu~ advantageou~ly i8 d~po~ed over the ~hinner portion o~
25 die~ect~ic layer 12 betwee~ zon~ 43 and C~D electrod~ 33A~, 26 Altl~ough i~ wil~ ba appre~iat~d that a oJide 27 variety of' opera~in~ vo~tagea may be u~ed with th~ above-28 descrlb~d apparatu~, w~ have ~ound 'ch~ ~tructure to b~, 29 operative with tV~ olts# (V23 ~ 10 volt~9 ~nd 30 (VR) ~ 12 volt~ wlth a ~tructur~ in whlch the thinn~r 31 portlon ~ d'lelectrlc portion 12 was about 1000 A. It ~ill 32 not u~ually b~ advan'cageou~ to de~rease (~L) b~low about .0 11 ~

.

~4175~3~3 ~r~m~eclc-Straln 1~7 1 6 volts, but operation ln ~ome ln~tance~ may be enhanced 2 by lncreaaln~ (V2) up to a3 much as 30 volt~ or greater, 3 ln which ca~es, Or cour e, the (VR~ woul~ be increased 4 c~rrespondin~ly to be ~omewhat greater t~an (V2).
me rate Or charge transfer rr~m zon~ 43 to 6 electrode 33A to represent a ~ 13 llMlted by the voltage 7 at that tlme exi~tine on gatin~ electrod~ 32, The volta~e 8 on gating electrode 3~ may be le~ negative than (-VR~
9 becau~ o~ para~itic e~ects and because e~ch degr~ded "0"
sensed by ~ensor 41 contaln3 s~m~ po~itlve charge whlch 11 serve3 to partially discharge the voltag~ thereon. me net 12 e~ect 1~ to cau~e the transfer Or a t~ cont~lning le~s 13 charge than mi~ht bo de~lred lnto th~ potential w~ll under 14 el~c'crode 33A .
qhe rate o~ ~harge tran~er Prom zone ~3 to 16 ~lectrode 33A to repre~ent a t'l~ al~o i~ llmlted by the 17 ln~tantaneQus di~rerenae between th~ pot~ntial on zon~ ~3 18 ~the ~ource) and the 3urr~ce ~o~entlal under el~ctrod~ 33Ao 19 Un~ortunatelyJ thl~ potentlal dl~erence monotonlcally 20 decrea3~s as charge tran~r~ lnto the p~ten~lal wel~ under 21 ~leGtrod~ 33AI, B~cause o~ thls decraase ln pot~ntlal ~2 ~di~rence, the r~t~ Or oharge tran~er al~o d@area~e~ a~
~3 char~e 18 tr~n~ferred. ~Ihe net e~ct or this llmlt~tion 24 al80 18 to cause th~ tranR~er ~f a "1" contalnlng le38 25 charge than migh~ be d~lred ln'co the potentlal w~ll under 26 electrode. 3,3Ao 27 Inasmuch as th~e ~re ~oltage limitatlorls rather 28 than limitations on the amount Or ¢harge av~llabl~ to be 29 tran3rerred" they can be allevlated ~y makin~ the ~ir~t 30 CCD electro~le ~ollowln~ th~ gating ~lectrode larger thRn 31 th~ other C~,D ~le~t~ode~. Beoau~ CCD operatlon 1 32 s~nt~ally capa¢ltlvsly coupled trans~r Or charæe~ th~

IL~7S8~3 KraJnbock-stLaln 4-7 1 ~ur~ace p~tential undcr the bl~,~er electrode (bi~er 2 capacltance) decrea~e3 le~s rapldly than would the aur~ace 3 potential under a amaller electr3de (smaller capacltance).
4 In accordance with thl~ princlple, the ~lze Or thl~ rir~t CCD electrode can be adJu~ted relative to the ~lze o~ th~
6 other CCD electrodes to compensate for the aror~sald 7 predictable volta~e l~mltation~ 80 that the de~lred amount 8 o~ char~e 18 transferred under the ~lr~t and ~uccess~ve 9 CCD electrode3 to represent a "1".
Thi~ is repre~ented schematically ln FIa~ 5 whlch lt show~ apparatus identical to that o~ FI~o 3~ except that 12 CCD electrode 33A (nosY denoted 33AI) 19 represented a9 13 bein~ twice as large a~ the other C~D electrode~. It will 14 b~ appreclated that the prlnciple applied to achleve the improvement shown ln FI~ no~ limited to lnverslon-16 r~eneratlon ~le~nent~ but may be applled in g~neral in C~
17 devic~3 ln accordance wlth capac~tive divl~lon technlque~
18 we~l kno~n in the art, 19 Although the ~oregolng ~l~clo~ure ha~ been ~0 directed prlmarily t~ an inYer~ion-re~eneratlon element in 21 two-pha~e charge coupled deviGe sy~kems~ lt will b~
22 appreciated ~hat an inver~er-re~enerator ln accordanc~ with

23 thl8 lnvention'can b~ r~adily adapted for u~ ln three~pha8e

24 an~ rour-ph~s~ CCD sy8tems ln accord~nce wlth th~ principlea dlsclosed w~th re~erenoe t~ the two-pha~e embodiment hereln.
26 ~urther, it wlll b2 appreciated that the ~ore~
a7 descrlbed ~nver~ion~regeneration ~lement re~dll~ can be 28 ~d~pted rOr u8~ ln ahar~e tran~er devics~ Or th~ bucket-29 brlgad~ type dl8clo~ed in ~he applicatlon o~ Eerglun~ ~nd Eoll, rererred ~o h~rainabova, One ~orm o~ ~uch ~n 31 ~dapt~tion 1~ ~hown ~n ~I~S~ 6 and 7 and wlll now bs 32 descrlbed with rer~r~nce th~reto5 - 13 ~

-:~'7~
Krambeck- Stre i n 4-7 In FLa. 6 t~lere l~ ~h~wn a ~chematl~ plan vi~w 2 of a portlon 50 of` bucket_brlgade typo of charge tranarer 3 apparatu~ employlng ~ ba~lc lnveraion-regeneratlon elem~nt 4 ~n accordance with another embodim~nt of our invention .
5 In FI~. 6 a plurallty o~ ~erially dlapo~ed ~leld plat~
electrode~ 51A, 52A, 51B, 52B~, and 51C ln combinat-lon ~rlth 7 a plurallty o~ a~ymmetrically dl~po~ed~ underlyin~ P-type 8 locallzed zone~ repre~ented by broken-line pattern~ 53A, 9 54A, 53B, and 54B repreYent the end o~ a bucket-brigade 10 channel who~e blt ~tream 1~ to be inverted and regenerated.
11 In like manner, ~erlally dispo~ed ~leld plate ~lectrodes 61A, 12 62AJ 61BJ ~2B, and 61C in combinatlon with a plurali~y o~
13 a~ymmetrically dispo~ed, underlying P-type localized zone~
14 represented by broken line patgern~ 65A~ 66A~ S5BJ 66BJ
15 ~nd 66C repre~ant the beglnnlng o~ a ~re~h bucket-brlgade 16 ch~nnel to accep~ the l~verted and reg~nerated bl~ 8tream~
17 A~ shown~ ev~ry ~econd on~ o~ the a~orement~oned ~ield 18 plat~ otrode5 ig conne¢te~ ko a common one o~ a pair o~
19 clock line~ 67 and 68, 20 As lndicated ~chematically by arro~ 69 and 70, ~1 re3pectlvely, the apparatu~ i8 ~dapted ~o that lnformation 22 ia t~ansr~rred ~o the rlght ln the input or degradetl channel 23 and to the le~t ~n th~ output or r~generate~ channsl, A~
24 wil~ be appreclated more ~ully ~rom a care~ul reading o~

25 the a~orem~n~ioned Berælund~ d1BC108Ure~ the prerer~ed ~: 26 directlon Por information a~vance 1~ d~termln~d by the 27 a~ynunetry with whlch th~ urld~rlyinf~ zonea ar~ overlapped ~ by the r~lcl plate ~lectrode~. More ~peci~lcall~, ~t ~hould 29 b~ not~d in ~ that ~ach o~ th~ a~oremenklon~d 30 ele¢trod~a overl~ps ~ portion o~ ~wo ~eparat~ und~rlying 31 ZoneB and that in th~ upper ohannel the great~r o~erla~ 1Y
32 on the right whll~ ~n the lower ¢h~nn~l ~he greatcr overlap ~ 14 _ " ' ..

~107S8:: L3 ~ramb~ c k s tr a 1 n ll - 7 1 1~ to the l~rt. ~rt.i3 a~yTmntry in over:lap c~u~e~
2 pre~rentl~l inI`orm~tion advance b~cauE3~ o~ the resultlng 3 a~ymmetry in cap~cltlve coupllns between the ~ielcl plato 4 electrodea and the un(lerlyln~; zone~.
l~e re~erence numera Is used in ~I~. 3 ~or th~
6 ~eature~ included in the lnverslon~re~eneration element 7 hava been repeat~d in FIG. 6. Accor~ gly" ln FI~. 6, 8 reatura 41 represent~ the ~enlsor zone; and featur~ 42 9 repre~ent~ the re~erence zona t~ ~rhlch ~en~or zone 41 i~
10 coupled rOr re~ettlng by applyln~ a ~uitable volt;age to a ll bridging ~leld plate elec~rode 240 Fea~ure 43 represenk~
12 the lndependent source o~ carrlers whlch are gated into 13 the lower channel by vol~ages lnduced on fiel~ plate 14 electrode 32. Note~ howe~er, th~ inclu~ion o~ an addl~lonal 15 P-type locallz~d zone 63 ~or bridgin~; the ~ap between 16 gat~ 32 and electrode 61Ao l7 ~n operat~on9 analoæous to the operation de~crlbed 18 above wlth re~erenc~ to FI~ 3, zon~ 42 i~ h~ld at a ~ed l9 ne~ative p~tenti~l indicated by (-VR) in FI~. 6, Zone 41 sen3e~ packet~ o~ charge whlch ~qu~nti~lly are trans~erred 2l under tha la~t bucket; brlgade el~ctrode 51C; and the 22 voltag~ thereby lnduced on zone 41 by the incomin~; packets 2 o~ charge 1~ conduotively aoupled dlrectly to ~at~ .
24 electrode 32 by conductors 44A and 44B,, tle~ together by 25 phantom llne conductor 44C, ~g",~ meta~lic overlay~ A~

26 ahown, 30urce 43 and ~ield plate electrode ~4 are conllec~ed

27 'cog~ther and to cloc~ line 68~ l.e~, the ~lock lln~ other

28 than th~ one to which buoketbrlga~e el~c~rode~ 51C an~ ~lA
~9 ar2 conn~ct~d ~
0~' cour8~3 uource 4~ need not be connected to a 31 clock llne buS in~tea~ may be drlven by an lndependenlt 32 pul~e generQtor whlch 113 ~ynchron~zed with the clock l~ne 107~8~3 Xrnmheck-Strain 4-7 1 pul~e~ to r~alize gr~at~r ~l~xlbility in drlvlng th~
2 ~ource 43 but at th~ exp~nse Or greater complexlky, Thi~
3 option iD repre~ented ~chemati.cally in ~I~. 60 A~ shown, 4 phantom llne 44C indicates khat el~ctrode 24 and ~ource 43 g are connected together ~nd to a common clock llneJ 6~.
6 I~ the optlon 1~ exerclaed, the connection between 44A
7 ~nd 44B would not be made; ancl~ ln~teadJ conductor 44B
8 would b~ connected to the lndepsndent pul~e generator, 9 labeled "pul~e mean~ in FI~. 6.
IS wlll be appreciated tha~ thl~ option al80 may 11 be used ~lth t~.e charge coupled apparatu9 heretorore 12 ~eacrlbed,` Purther, it w~ll be appreclated that 1~ other 13 th~n two-pha~eJ e~ three~pha~e or ~ou~-pha~e~ char~
14 coupled apparatu~ 18 used, the 20urce 43 need not b~
pul~edJ but in8tead may be connected to ~ DC vol~ge. In 16 thi~ case, selective lntroduction o~ blt~ lnt~ the 17 regcnerated channel i~ accompli~hed by ~ield plate 18 electrodes without the need ~or a pul3ed ~urce.
19 Advantageously, (-~R) i8 ~electe~ to b~ more negative than th~ mo~t negativ~ 2~ ~ th~ p~ir o~
21 volta~es al~ernately applied to the clock l~n~ hen ~2 ~_Y~) i3 ap~lled to clock llne 67 ~nd (-V2~ 1~ applled to 23 olock llne 68, blts (charg~ packet~ or th~ absenc~ thereoP3 24 in th~ bucket-brl~ade channel~ a~e locatea i~ zo~e~ 54AJ
54B, 66A~ and 66B under ~lectrode8 52A~ 52B~ 62A, and 62B~
2~ ~e~pectlvely. E~cauHe ~ield plate 24 1B connected to ~7 clock line 68 and bQcause (~ at l~a~t as negatl~e V2)" a potential o~ approxlmately ~-V2) ~ ~tT ls a~ lnduced ~n f'loating ~ensor zone 419 Phy~ically thi~
30 lrolta~e 1B i.nduced on zono 41 becsu~ po~itive ~harge 31 carrler~ (hole~) Qr~ dr~wn rrom zon~ 1l,1 throu~;h th~
32 inv~rted reglon under ~l~ctrod~ 24 lnto the mor~ n~gat~ve . ; :

,' - -. '' ... : . - ~

10 751~3 Kramb~clt-Sl;raln 4-7 1 z~ne 42. It will be appreclntcd that zone 42 i~ thu~
2 ad~pted to op~ra'ce ln ~lrnll~r ~n~hlon a~ the drain ln an 3 ln~ulat~d gate f~elct ~.~rect tran~l~'cor (I~FET), 4 Beoau~ o~ the conductiv~ couplln~; 44 between 5 zone 41 and gating electr~de 32, the potentlal o~ zone 41 6 al~o appears on gatlng el~ctrod~ 32. In thl~ c~ndltlon a 7 heavlly inerted region i~ ~ormed under gating el~ctrode 32 8 ~ut no po~ltlve charge carrlers ar~ tranF~err~d from 9 cource 43 to zone 63 under electrode ~ becau~o ~ource 43 10 1~ more negatlve 'chan æon~ 63~
11 ~at 90urc~ 4~ ia m~re negatl~re khan zone 63 ln 12 thl~ half of the cloc~ cycle is r~ad~ly ~een ~rom the 13 ~ollowlng con3ideratlon, In thl~ hal~ o~ the clock cy~le 14 th~ more negatlve potentlal (-V2) 1~ applied to ~ource 43 15 and the le~ negatl~re potential (-V~ applled t~
16 ~leGtrode 61Ac Be¢au~ o~ t~e Qap~c~ v~ overlap between 17 el~ctrode 61A and zon~ 65A and becau~e electrode 61A ac cs ~8 88 a bridgln~ ~ield plat~ electrod~ cau~ing zon~ 63 and 65A
19 to be coupled to~;ether by a heavil~r inverted re~lon at the 20 preYl~u~ hal~ o~ the clock cycl~, the potentlal Qr ~one~ 63 21 and 65A both are drlv~n to a pot~ntial nearly equal to 22 (-V~ the cloclc ~wi~che~ ~ nto thl~ cycle ~ qhus, 23 Bour¢e 43 i~ mor~ negati~e (~V2~ th~n æone 6~ ~nearly 24 ~Vl)~ durin~ th~a h~l~ cycle.
~5 From the f'oregolng analysi~ o~ ~Gh~ r~l~tion 2~i ~etw~en zone~ 63 and 65A~ it will be apprecl~lted that they 27 need not bQ ~3eparat~ æoneB ~a8 8hown ln ~Ia~ ~ but in~t~ad 28 may be merge~ to~sether lnto ~ne ~ommon zon~ me~er 2~ may be ~ problem rOr ~oms applicat~on~ howev~r~ becau~ 0 30 th~ 2~s~ultin~ ~hcrea8e in para31tio c~p~cltan¢~ ~rom 'che 31 uingle larger zon~
~. 17 ., 107S813 Kra~nbeck~ ~,trQirl 4_7 ~ ontinuing now wlth the deucrlptlon Or operation~
2 at th~ ne:ct halr Or the clock cycl~ (when ~ V2) and 3 ~2 ~ (-Vl ) ) sensor ~ d~couplcd ~l~om drain 4;~ bccau 4 Or the les~ negatlv~ volkaee appll~d to ooupling 5 ~lectrode 24. Al~o Or lmportanc~ i~ the ract that ~ource 43 6 ln now le~ negative than æone 63 and 65A 90 thflt po~tive 7 oharge carrier~ can be transf'erred to zone 65A unles~
8 lnhibited by t~le actlon o~ gatlng electrode 32.
9 ,A~ the clock voltages are ~witched lnto thl~
10 laat~de~cribed condltion, the charge packet3 representlng 11 lnf'ormation are tran~rerred from th~ zone~ numbere~ 54 12 and 66 to the zon~ numbered 53 and 65, reapectively. If' 13 a logical "1" (a packet o~ charge ~ 1~ tran~rred from 14 zone 54B lnto zone 41; that charge serves to dlscharge 15 the ne~ativ~ potenti al stored thero, l~a potentlal~ and 16 the ~paclng oP gatin~ electrodo 32 ~rom the ~emlconductor 17 ~urra¢e are adJusted ~uch that a~ter a pa~et o* charge 1 18 drawn into ~en~or 41 the voltage remaining on gatln~;
19 electrode 32 ~8 in~uf'f'lciently negatlve to ~llow the trans~r o~ charge ~rom source 43 to z~ne 65~. musO a~
21 tran~ferrsd in~o ~en~or zon~ 41~ a "0" ~ppear~ ln zone 65A.
22 Conv~r~ely~ a "o~ b~enoe Or ~ paoke~ o~
23 charge) 18 tran~erred into sen~or~xone 41~ th~ voltage on 24 ~en~or 41 will not bc di~charg~ and th~ voltage o~ ~atin~ ¦
electrode 32 wlll r~maln ~u~lclent~y ne~ative to allow a 26 pa~k~t o~ ch~r~ to tran~rer ~rom ~ource 43 to æone 63 and 27 further lnto zone 65A. ~hu~, 88 3 ~oll 18 ~ran~erred into 28 zone 41~ a ~ appears ln ~one 65A~

29 At the next r~er~al o~ the cloc~ voltage~

(~hen ~1 ~ t-vl) and ~2 ~ (-V2)) any exce~ po~itlYe charge 31 1~ drawn rrom ~en~or 41 1nto draln 42, ~n thl~ manner the 32 voltage on ~en~or 41 13 res~t to a pred~ermined voltag~

.

~5813 ICrambeck~ x~ln 1~_7 1 prlor to acceptln~; each lncomln~ de~;ra~ed blt,, Be(:au~e 2 o~ thi~ re~3~t ~eature ~hlch CflU~ 3 the ~en~or alway~ to 3 ~tart at the ~ame potential wh~n acc~ptlns an lncomin~; bit, 4 the inver~:Lon-regenern~ion el~mentJ ln accordance with thi~
5 lnvention, o~er~ lmproved ~en~ltivity ana operatlng nolse 6 margln.
7 ~or a more complete understanding o~ ~he apparatus 8 deplcted schematlc~lly in ~IG. 69 EIG~c 7 ~ho;~ ~ cro~s_ 9 ~ectional view taken ~long llnes 7~7 ln ~G~, 6~ P~e~erence 10 numeral~ have been r~peated to lndicate corre~pondin~s 11 element~ where approprlate. In ;FIa. 7~, P~ yp~ locallz~d 12 8en~0r zone 41 i3 ~hown contacted el~c~Grically by a low 13 resi~tanc~ electrodc 27 (not ~hown in FIG~ 6)3 ~nd drain 14 zono 42 1~ ~hown contact~d ~lectrically by a slmllar low 15 resl~an~e elec~rode 28 ~also no~; ~hown in ~G~o 6)~! me 16 other f'eature~ will be under~tood ~rom a compRrison o~ 1;he 17 1;wo f'lgures,, 18 A~ with the charge coupled embodlment~ 1 t 19 be ~ppreclated that a W~d~ variety o~ oper~t~ng vol~ag~
20 ma~ be u~ed with th~ ~bove d~cribed ~pparatusO W~ ha 21 ~ound th~ structur~ to be op~ratlr~, ~or QxampleJ wlth ~ ~t2) ~ 10 volt~ d (YR) ~ 12 volt~ with 23 a ~tructure ~n which ~he dl~l~ctrio po~tion 1~ was about ~4 1000 A. I~ wlll no~ u~ually be advanta~;eous to decrease 25 ~Vl) below abou~ 6 volt~, bu~ operat~on in ~om~ in~an~e~
6 n~ay ~e enhanced by lncxea#ing ~ up t~ a~ mu~h a~
~7 30 VQlt~3 or ~rea~er~ ln whlch ca~ o~ cour~e,~ th~ (VR) 28 would b~ lnor~a~ed corre~pondingly to b~ som~what great~r 29 than (V2 ~ . . .
All;hough our lnverltion ha~ be~n d~scrl~ed ln part 31 by makln~ d6~ta~1~d re~rence to certaln ~p~cl~lc 32 lmx)rovements, ~uch detail wlll b~ understood to be iO75~3 Kralnbe ck~ ra ln 11 7 1 instructlve r~ther tharl restr~lctive. It wl]l be appreclatcd 2 by those in the art that many varlat:Lons may be made in 3 the structure and mode Or operation without departing from 4 the spirit and scope of our invention as d~sclosed in the teachings contained herein.
6 For example, throughout the disclosure the 7 semiconductivity types may be reversed as desired, provided 8 a corresponding reversal of voltage polarities also is made.
9 Further, it will be appreciated that Schottky-barrier diodes and/or other rectifying barrier means can 11 be substituted for any or all of the zones (41, 42, and 43) 12 of the inversion-regeneration elements as an alternative 13 means for providing the collecting and injecting functions 14 requisite therein.
Further, it will be appreciated that a pair of 16 inverter-regenerators as described herein may be cascaded 17 such that the regenerated pulse is inverted twice and 18 therefore restored to a regenerated replica of the original.
19 Further, it will be appreciated that inversion-regeneration elements in accordance with our invention are 21 readily included in logic apparatus, for example~ of the ;~
22 type disclosed in the Canadian patent application of 23 G. E. Smith and M. F. Tompsett, Serial No. 121,794, filed 24 August 31, 1971.
Still further, it will be ~ppreciated that 26 inversion-regeneration elements in accordance with our 27 invention readily can be adapted for use in charge transfer 28 device apparatus wherein the storage medium is other than 29 semiconductive. Such charge transfer device apparatus is described, for example, in Canadian patent application 31 Serial No. 104,589, filed February 5, 1971, by D. Kahng. In 32 such apparatus the storage medium may, for example, be an .

., .

~75~13 ICrambeck-Straln 1~_7 l lnsulator which i~ not characterlæed by any one particular 2 conducti~lty type. In cert~ln Or the~e ln~ulator~ zona~
3 3uitable ~or in~ection and collection Or carrl~r~ can be 4 ~ormed, ~n other~, suitable s~ones cannot readlly be ~ormed, In the latter ca~e, the requlred inJection an~
6 coll~ctlon o~ carrler~ in accordance with thl~ invention 7 can be achieved by ~ub~tltutlng ln3ectln~ contacts, ~or 8 example o~ the typ~ ~e~cribed in the Kahng appllcation~
9 ~or the zones~ These contact~, ~ormed wlth th~ sur~ace o~
tha ~tor~ge medium, may be substituted ~or the zone~ in ll ~he lnversion-reg~neration element~ ln accordance wlth 12 principlec well known in the art~

- , ' .

. .
, .. ~ . . , . : , - ; !

' _ ` ' ' !:
: . , ; .

_ 21 -

Claims (27)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. In charge transfer apparatus of the type adapted for storage and serial transfer of charge carriers localized in induced potential energy minima along a portion of a suitable storage medium by sequentially applying a plurality of differing potentials to successive portions of the surface of the medium through field plate electrodes, the improvement which includes means for providing state inversion and bit regenera-tion in combination with said storage and serial transfer comprising:
means disposed in said apparatus for detecting the amount of charge carriers stored therein at a prede-termined location at a predetermined time;
means for pre-biasing the detection means to a fixed reference level prior to each detecting operation for improved sensitivity;
means for injecting at another location within said apparatus a controlled amount of charge of the type stored and transferred; and gating means disposed adjacent to the injecting means and coupled to the detection means for controlling the transfer of charge away from the injection means in response to the charge carriers detected at said predetermined location.

2. Apparatus as recited in claim 1 wherein:
the storage medium is a semiconductor body of a first type semiconductivity;
the detection means includes a first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for detecting the number of charge carriers existing under said one field plate electrode;
the pre-biasing means includes a second zone of the second type semiconductivity disposed within the body and spaced from the first zone and further includes a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
the injection means includes a third zone of the second type semiconductivity disposed within the body and spaced from another of said field plate electrodes;
and the gating means includes a second field plate control electrode disposed over and insulated from the surface of the semiconductive material comprising the space between the injection means and said another field plate electrode and being coupled to the first zone for controlling transfer of charge away from the third zone in response to the charge carriers detected at the first zone.

3. In semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential energy minima along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:
an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;
a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and adjacent another of said field plate electrodes and conductively connected to the first zone;
and a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode, wherein the third zone is conductively connected to the first field plate control electrode.

4. In semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential energy minima along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:
an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;
a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and adjacent another of said field plate electrodes and conductively connected to the first zone;
and a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode, wherein the third zone is connected to a separate pulse generator.

5. In semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential energy minima along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:
an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;

a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and adjacent another of said field plate electrodes and conductively connected to the first zone;
and a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode, in combination with means for maintaining a bias potential on the second zone.

6. Apparatus as recited in claim 5 wherein the bias potential is a DC bias potential.

7. Apparatus as recited in claim 5 in combination with means for sequentially applying the plurality of differing potentials to the first field plate control electrode.

8. Apparatus as recited in claim 7 wherein the potentials applied to the first field plate control electrode are out of phase with respect to the potentials applied to the field plate electrode adjacent the first zone.

9. Apparatus as recited in claim 5 in combination with means forming a pair of conduction paths, every second field plate electrode being connected to a common one of the pair and the other field plate electrodes being connected to the other one of the pair, and the first field plate control electrode being connected to the one other than that to which the field plate electrode adjacent the first zone is connected.

10. In semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential energy minima along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:
an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;
a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and adjacent another of said field plate electrodes and conductively connected to the first zone;
and a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode, wherein an acceptor field plate electrode is spaced from the third zone so that the space is bridged by the second field plate control electrode.

11. Apparatus as recited in claim 10 wherein the acceptor field plate electrode is conductively connected to the field plate electrode adjacent the first zone.

12. Apparatus as recited in claim 10 wherein the acceptor field plate electrode is larger in area than the other field plate electrodes.

13. In semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential energy minima along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:
an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;
a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and adjacent another of said field plate electrodes and conductively connected to the first zone;
a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode; and a plurality of spaced localized zones of a second type semiconductivity disposed adjacent the surface of the body and disposed asymmetrically with respect to said field plate electrodes such that each field plate electrode extends over the space between a pair of said zones and over one of said pair of zones more than the other of said pair of zones.

14. In semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential wells along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regenera-tion in combination with said storage and serial transfer comprising:
an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;
a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and conductively connected to the first zone;
and a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode, the third zone being conductively connected to the first field plate control electrode.

15. In charge transfer apparatus of the type adapted for storage and serial transfer of charge carriers localized in induced potential energy minima along a portion of a suitable storage medium by sequentially applying a plurality of differing potentials to successive portions of the surface of the medium through field plate electrodes, the improvement which includes means for providing state inversion and bit regenera-tion in combination with said storage and serial transfer comprising:
means disposed in said apparatus adjacent one of the field plate electrodes for detecting the amount of charge stored therein at a predetermined time;
means in addition to the plurality of differing potentials for pre-biasing the detection means to a fixed reference level prior to each detecting operation for improved sensitivity;
means for decoupling the detection means from the pre-biasing means during a detection operation;
means for injecting at another location within said apparatus a controlled amount of charge carriers of the type stored and transferred; and gating means disposed adjacent to the injecting means and passively connected to the detection means for controlling the transfer of charge carriers away from the injection means in response to the charge carriers detected by the detection means at said time.

16. Apparatus as recited in claim 15 wherein the gating means is disposed adjacent another of said field plate electrodes and said another field plate electrode is larger in surface area than the other field plate electrodes.

17. In charge transfer apparatus of the type adapted for storage and serial transfer of charge carriers localized in induced potential energy minima along a portion of a suitable storage medium by sequentially applying a plurality of differing potentials to successive portions of the surface of the medium through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:
electrically floating means disposed in said apparatus adjacent one of said electrodes and adjacent a surface of the portion of the storage medium for detecting the amount of charge stored therein at a predetermined time;
means in addition to the plurality of differing potentials for pre-biasing the floating detection means to a fixed reference level prior to each detecting operation for improved sensitivity;
means for decoupling the detection means from the pre-biasing means during a detection operation;
means for injecting at another location within said apparatus a controlled amount of charge carriers of the type stored and transferred; and field plate electrode gating means disposed adjacent to the injecting means and insulated from the storage medium and passively connected to the detection means for controlling the transfer of charge carriers away from the injection means in response to the charge carriers detected by the detection means at said time.

18. Semiconductor surface charge storage and transfer apparatus comprising:

a semiconductor substrate of one conductivity type, means for forming a plurality of electrical charge storage regions in said substrate, means for transferring electrical charge in said substrate between said storage regions, an electrically isolated region of opposite conductivity type adjacent one of said storage regions, means for periodically charging said region of opposite conductivity type to a predetermined potential throùgh a surface adjacent region of said substrate, means for altering said predetermined potential by introducing electrical charge from one of said storage regions through said substrate into said region of opposite conductivity type, and means conductively connected to said region of opposite conductivity type for controlling the transfer of charge into another one of said storage regions to regenerate the level of said electrical charge after transfer between a selected number of storage regions.

19. The apparatus of claim 18, wherein said means for periodically charging said region of opposite conductivity type comprises:
an insulated-gate field-effect transistor including two regions of opposite conductivity type at least one of which is said region of opposite conductivity type and a gate electrode insulatingly overlying at least portions of said two regions of opposite conductivity type.

20. The apparatus of claim 18, wherein said means for controlling the transfer of charge comprises a field-effect transistor.

21. The apparatus of claim 18, wherein said means for controlling the transfer of charge comprises a launch gate for introducing electrical charge.

22. The apparatus of claim 18, wherein said means for controlling the transfer of charge comprises a control electrode insulatingly overlying said substrate for controlling the transfer of charge through a surface portion thereof.

23. The apparatus of claim 20, further comprising means for providing from said transistor an output signal characteristic of the electrical charge introduced into said region.

24. The apparatus of claim 21, wherein said launch gate insulatingly overlies an electrical charge refresh device.

25. The apparatus of claim 24, wherein said refresh device comprises another region of opposite conductivity type.

26. The apparatus of claim 18, wherein said means for controlling the transfer of charge produces a charge in said other storage region which is complementary to the charge received from said one storage region.

27. In a semiconductor apparatus of the type adapted for the storage and serial transfer of charge carriers localized in induced potential energy minima along a surface portion of a body of a first type semiconductivity by sequentially applying a plurality of differing potentials to successive portions of the surface through field plate electrodes, the improvement which includes means for providing state inversion and bit regeneration in combination with said storage and serial transfer comprising:

an electrically floating first zone of a second type semiconductivity disposed within the body and adjacent to one of the field plate electrodes for sensing the number of charge carriers existing under said one field plate electrode;
a second zone of the second type semiconductivity disposed within the body and spaced from the first zone;
a first field plate control electrode disposed over and insulated from the semiconductive material comprising the space between the first and second zones;
a second field plate control electrode disposed over the surface and adjacent another of said field plate electrodes and conductively connected to the first zone;
and a third zone of the second type semiconductivity disposed within the body and adjacent the second field plate control electrode.