CA1060958A - Quantum interference josephson logic devices - Google Patents
Quantum interference josephson logic devicesInfo
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- CA1060958A CA1060958A CA305,240A CA305240A CA1060958A CA 1060958 A CA1060958 A CA 1060958A CA 305240 A CA305240 A CA 305240A CA 1060958 A CA1060958 A CA 1060958A
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Abstract
QUARTUM INTERFERENCE JOSEPHSON LOGIC DEVICES
Abstract of the Disclosure A quantum interference Josephson junction logic device is disclosed which comprises three or more junctions connected in parallel which are capable of carrying Josephson current and includes means integral with at least one of the junctions for carrying a larger maximum Josephson current than the remaining junctions. The spacing between the lobes of the thres-hold curve is increased over that of a two junction interferometer result-ing in an increased operating region in which logic circuits switch to the voltage state. Good current gain with large lobe separation may be ob-tained if the two outer junctions having a zero field threshold current, Io, are connected via an inductance, L, to the center junction with a maxi-mum Josephson current, 21o. Apart from the gain enhancement due to in-creased current in at least one of the junctions and that due to the com-bination of increased current in at least one of the junctions and the symmetrical dual feed, increased gain and operating range can be achieved using the symmetrical dual feed in combination with interferometer arrange-ments where the maximum Josephson current in all the junctions thereof is the same.
Abstract of the Disclosure A quantum interference Josephson junction logic device is disclosed which comprises three or more junctions connected in parallel which are capable of carrying Josephson current and includes means integral with at least one of the junctions for carrying a larger maximum Josephson current than the remaining junctions. The spacing between the lobes of the thres-hold curve is increased over that of a two junction interferometer result-ing in an increased operating region in which logic circuits switch to the voltage state. Good current gain with large lobe separation may be ob-tained if the two outer junctions having a zero field threshold current, Io, are connected via an inductance, L, to the center junction with a maxi-mum Josephson current, 21o. Apart from the gain enhancement due to in-creased current in at least one of the junctions and that due to the com-bination of increased current in at least one of the junctions and the symmetrical dual feed, increased gain and operating range can be achieved using the symmetrical dual feed in combination with interferometer arrange-ments where the maximum Josephson current in all the junctions thereof is the same.
Description
1 This application is a diyisional of Canadian application Number 254,966, filed June 16, 1976, and assigned to the same applicqnt.
BACKGROUND OF THE INVENTION
. Field of the Invention This invention relates generally to ~Dsephson tunnelling interfero-meter devices which have application as logic devices in Josephson tunnel-ling circuits. More specifically it relates to Josephson tunnelling inter-ferometer devices, which, in contrast to a simple junction, are capable of operating with high current gains at low operating currents and have a threshold characteristic with large lobe separation. This latter fea-ture either maintains or increases the operating margins of the resulting logic devices. Still more specifically, it relates to a Josephson junc-tion interferometer device which contains more than two junctions; pre-ferably three, wherein the maximum Josephson current, Im, is greater and preferably twice as large in the center one of three junctions than the maximum Josephson current in the remaining junctions. In a preferred arrangement, gate current is fed into the interferometer device in a sym-metrical manner such that the gate current is applied at the centre of an inductance L disposed between the centre junction and the outer junctions via inductances which have a value of inductance which can be three times the value of the inductance, L. Because there are such a large number of arrangements which include a plurality of junctions, an equally large num-ber of current feed arrangements are required which can be encompassed by adhering to the following criterion: The current should be fed in so that, with zero control field, the phase difference, 0, across the junctions is the same (~ /2) just prior to switching, that is, all junctions in the interferometer switch simultaneously. While three or more junctions can be utilized to form an ;nterferometer having the desired operating margins and current gains, the small size of the three junction interferometer is most attractive from a practical standpoint. The fact that the interfero-meter deyices of the Present application can be operated in both latching and non-latching modes permits them to be utilized in a wtde variety of .
~06095~
1 circuit applications.
~ E~on~ of the prior Art Josephson junction devices are well known in the prior art for use as both memory devices and as switching devices for use in ultra-high speed 10gic circuits. The characteristics of a typical Josephson device is described in detail in a publication entitled "The Tunneling ~ryotron --A Superconductiye Logic Element Based on Electron Tunneling" by J. Mat;soo which appeared in the Proceedings of the IEEE, February 1967, Yol.55, No.2, pp.l72-180. A typical logic device of the character described in the - 10 article consists of a gate and a control line which are positioned above but insulated from the gate. The control line is generally made of a superconductor such as niobium, tin or lead. The Josephson junction de-vice itself consists of two strips of superconducting material which over-lap. In the region of the overlap, the two strips of superconductive material are separated from each other by a tunnel barrier which may be ~ formed of an oxide of one of the superconductor strips. The oxide barrier - usually has a thickness of the order of 10-30 angstroms. The gate and con-trol line are normally placed on a superconducting ground plane and insu-lated from it.
Gate current, Ig, is fed through the junction which, being in the zero voltage state, shorts an output impedance, Z0. If the linear sum of the input currents, Ic, reduces the Josephson Threshold current, Im~ below Ig, the current switches to a voltage equal to or less than 2 ~/e (2 a/e = 2.5mV for lead junctions). After switching, the voltage Vg pro-duces a current Ir equal to Yg/Z0 in the output impedance. The result-jng current may be utilized to control other circuits. In most instances, the switched junction remains locked in the voltage state and must be reset to the zero voltage state by a momentary decrease in Ig. However, d.c. powered non-latching c7rcuits haYe been proposed by W. Bae~htold, Digest of Technical papers~ I.S.5.C.C , Philadelphia, 146~1975~.
Quantum interference between two parallel Josephson junctions, also called interferometers, has been described by R.C. Jakleyic, J. Lambe . .
1 J.E. ~ercereau, A.H. Silver, physical Review, 140, A1628, Noyember 1965.
IBM* Technical Disclosu~ Bulletin, yOl, 17, No. 3, August 1974, pp. 901-902, in an article entitled "Single Flux Quantum Memory Cell for NDRO" by W.W. Jutzi shows a centre fed triple junction interferometer wherein all the junctions are of the same size and carry the same currents. In this arrangement, however, the effort was directed not to increasing the sepa-ration between lobes but rather to having a region of overlap where three energy states are possible. The TDB arrangement is rea11y not concerned with devices that switch to the voltage state nor is it concerned with having a large operating range for devices with high gain.
An article entitled "Three Junction Interferometer" by Stuelm and Wilmsen, in Applied Physics Letters, Vol. 20, No. 11, June 1972, pp. 458-460, shows an asymmetrically fed triple Josephson junction arrangement in which all the junctions are the same size. This article apparently recognizes that the spacing between the lobes of a ~osephson junction threshold curve may be increased by adding an additional junction to the known two junction interferometer. However, while it increases magnetic field sensitivity over the known two junction interferometer, this asymmetrically fed three Josephson junction interferometer does not have the maximum Josephson zero voltage current through it at zero applied magnetic field. The article, however, does indicate that zero applied magnetic field coincides with the maximum current through the interfero-meter for a symmetrically fed device similar to that shown in the IBM*
Technical Disclosure Bulletin. Thus, while it has been recognized that the magnetic field sensitivlty can be improved in both the two and three junction interferometers, all of these arrangements are concerned with enhancing the aforementioned magnetic field sensitivity and not with achieving high current gains while simultaneously improving the operating margins of devices Which are to be used in the logic environment.
SUMMA~Y F THE INVENTION
In accordance w1th the broadest aspect of the present i~Vention a *Registered Trade Mark 1 multiple junction interferometer circuit is provided whiCh co~prises at least three junctions capable of carrying Josephson current connected in parallel , at least one of which carries at least the same maximum Josephson current as the others and means connected to the junctjons for feeding current thereto so that, with zero control field, the phase difference across the junctions is the same prior to switching.
In accordance with the broader aspects of the present invention, a multiple junction interferometer circuit is provided which comprises at least three junctions capable of carrying Josephson current connected in parallel and means integral with at least one of the junctions for car-rying a larger maximum Josephson current than the remaining junctions.
In accordance with the broader aspects of the invention, a multiple junction interferometer is provided wherein the means for carrying a larger maximum Josephson current includes means for carrying a maximum Josephson current which is twice as large as the maximum Josephson cur-rent in the remaining junctions.
In accordance with the broader aspects of the invention, the multiple junction interferometer is provided which further includes means connected to the interferometer for applying current to the junctions.
In accordance with the broader aspects of the present invention, a multiple junction interferometer circuit is provided which comprises at least three junctions capable of carrying Josephson current connected in parallel at least one of which carries at least the same amount of maxi-mum Josephson current as the others and dual current feed means connected to sa;d at least three junctions~
In accordance with broader aspects of the present inYention~ a multi-ple junction interferometer is provided which further includes at least a single control element disposed in insulating spaced relationship with - at least one of the inductive loops co~prising the deYi;ce and further includes output means connected in parallel with the interferQmeter.
In accordance with still broader asPects of the present inYention, the means integral with at least one of the junctlons for carrylng a ~0609S8 1 larger maximum Josephson current includes a junction of larger s~ze; a tun-nel barrier having a thickness different from the tunnel barrier thickness of the remaining junctions; at least one electrode of one of the junctions of conductive material having a work function different from the work function of at least one electrode of the remaining junctions.
In accordance with a more particular aspect of the present inven-tion, the means connected to the interferometer for applying current to said junctions includes at least two inductances connected to the center point of inductive elements disposed between a centrally disposed junc-tion and a pair of outer junctions, said inductances each having a value three times the inductance of the inductances disposed between the cen-trally disposed junction and a pair of outer junctions.
It is, therefore, an object of this invention to provide a multiple junction interferometer circuit which has high current gain and consider-ably increased operating margins.
Another object is to provide a multiple junction interferometer wherein the device consists of three junctions the center one of which is designed to carry a maximum Josephson current which is twice the current in each of the other junctions.
Still another object is to provide a multiple junction interfero-meter circuit wherein the current feed configuration to the interfero-meter provides a circuit with improved gain and operating margins over those of prior art circuits.
Still another object is to provide a multiple junction logic cir-cuit which is capable of being operated in both a latching and non-latching mode.
Still another object is to provide a multiple junction interfero-meter for use in logic circuits which has very low poWer djssipatjon and yery high speed switching.
The foregoing and other objects, features and adyantages of the in-vention wi:ll become apparent from the following more particular descrip-tion of the preferred embodiment of the Invention as illustrated in the 1 accompanyi~ng drawings.
BRIEF DESCRIPTION OF TH~ DRAWINGS
FIG. lA shows the threshold characteristic, Ig ys. Ic, for a center fed prior art interferometer comprising three junctions all of which are the same size and carry the sa~e maximum Josephson current, Io. The figure shows only the threshold characteristic for positive Yalues of Ig and Ic.
FIG. lB shows a schematic of a center fed interferometer, all the junctions of which carry the same maximum Josephson current, the threshold characteristic of which is shown in FIG. lA.
FIG. 2A shows the threshold characteristic, Ig YS. Ic, for a cen-ter fed interferometer comprising three junctions the center one of which carries twice as much current, 210, as the remaining junctions. The threshold characteristic is shown only for positive values of Ig and Ic.
FIG. 2B shows a schematic of a center fed interferometer, one junc-tion of which carries twice the maximum Josephson current of the remain-ing junctions; the threshold characteristic of which is shown in FIG. 2A.
FIG. 3A shows the threshold characteristic, Ig vs. Ic, for a sym-: metrically disposed, dual feed three junction interferometer wherein the : 20 center junction carries twice the maximum Josephson current of the other junctions. The threshold characteristic is shown only for positive Yalues of Ig and Ic, FIG. 3B shows a schematic of a symmetrical, dual feed interferometer one junction of which carries twice the maxi~um Josephson current of the other junctions; the threshold characteristic of which is shown in FIG. 3A.
~ FIG. 4 shows a schematic of an interferometer circuit simjlar to that ; shown jn FIG. lB except that the symmetrical dual current feed of FIG. 3B
is utilized and connected ~n such a way as to insure the same phase dif-ference, ~, across all the junctions~
FIG. 5 shows a perspective representation of the symmetrical, dual feed interferometer the threshold characteristic of which and the schem~-tic equiYalent circuit of which are shown in FIGS. 3~, 3B, respect~velY.
106()958 1 The arrangement shown may be utlized for both latching and non-latching logic operations.
FIG. 6 shows a schematic of another embodiment of a multiple junc- -tion interferometer in accordance with the teaching of the present inven-tion which incorporates four junc'cions and is symmetrically fed so that with zero control field, the phase difference, p, is always the same in each of the junctions prior to switching. lhe symmetrical dual current feed provides for enhanced gain and operating margins even though all the junctions carry the same maximum Josephson current.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
As has been indicated hereinabove, in the discussion of the prior art, both asymmetric and center-fed triple junction interferometers where-in all the junctions are of the same size and carry the same current are well known. To more fully develop the present contribution, a compari-son between the prior art arrangements and the circuits of the present invention is believed to be in order. Accordingly, in the discussion which follows, a center-fed interferometer with junctions of the same size, a center-fed interferometer wherein the center junction of three is twice the size of the remaining junctions, and a symmetric dual-feed three junc-tion interferometer wherein the center junction of three carries twice the maximum Josephson current will be discussed. In addition, three and four junction interferometer circuits having symmetrical dual current feed means and the same maximum Josephson current through all the junc-tons will be discussed.
Referring now to FIG. lA, there is shown the threshold character-istic, Ig vs. Ic, for a center-fed Prior art interferometer comprising three junctions all of which are the same size and carry the same maximum Josephson current, Io~ While it should be appreciated that a similar characteristic exists for negative yalues of Ig and Ic, only the threshold characterlstic for positiye values of Ig and Ic have been shown for pur poses of clarity and simplification. The threshold characteristic of FIG. lA shoùld be considered with FIG. lB which shows a schematic of a - ~060958 1 center-fed interferometer, all the junctions of which carry the same maxi- -mum Josephson current.
The threshold characteristic of FIG. lA is obtained by applying gate current, Ig, to the device of FIG. lB and determining the points at which the device of FIG. lB switches to the voltage state as the gate current, Ig, is varied while the control current, Ic, is held constant, or vice versa. Thus, in FIG. lA threshold curve 1 shows the switching threshold for the 0,0 vortex mode while curves 2 and 3 show the switching threshold for the 1,0 and 1,1 vortex modes, respectively. Thus, any time the applied gate current exceeds the switching thresholds indicated by the envelope of curves 1,2,3, the device of FIG. lB switches from the zero voltage state to the voltage state. In those regions where curves 1,2,3 overlap, the boundaries of these curves in the overlapping regions are determined by detecting the change in state between vortex modes. These changes in state are detected by measuring the current pulse which is due to the trapping or expulsion of flux quanta from the device of FIG. lB.
~ In FIG. lB, junctions Jl, J2 and J3 are all of the same size and, - as a consequence, all other things being equal, carry the same maximum Josephson current, Io~ These junctions in conjunction with inductances 4 and centrally disposed gate current feed line 5 and control line 6 form interferometer device 7 which has the threshold characteristics shown in FIG. lA.
Using device 7 and its associated threshold characteristic shown in FIG. 1~ as a criterion, it can be seen that a cross-hatched area otherwise indicated as "OPERATING RANGE" is obtained. Using for gain the ratio of Ig to Ic as a very rough approximation for gain, jt can be see from FIG. lA that only with tightly controlled margins and extremely good regulation of current can decent gains be obtained, At this point, it should be appreciated that the arrangement of FIG. lB represented an improyement over two junction interferometers to - the extent that the addition of the third junction moved the lobes apart.
Y09-74-040 _ 9 _ '',, ' -. ~ : ' ' ~
106095~
1 However, while movin~ the lobes apart, the gain was not substantially increased nor was the operating range enhanced to the extent that very tight control of Ig and Ic could be relaxed. Also, it should be clear from FIG. lB
that, though the currents through junctions Jl,J2,J3 are normally equal to Io sin 0, the current through junction J2 is different from the currents through Jl and J3 because the current through J2 encounters a lower impedance path. As a result, the phase difference, 0, across the junction is not the same at zero field prior to switching.
To overcome the gain and margin problems associated with device 7 of FIG. lB, the maximum Josephson current Io Of device 7 was increased by permitting a current, 210, to be carried by the center leg of device 7 of FIG. lB. The resulting interferometer device 8 is schematically shown in FIG. 2B with junction J2 being schematically indicated by a larger X than junctions Jl and J3. Device 8 is center fed by gate current feed line 5 and controlled by control line 6. Inductances 4 have the same value and are disposed in a similar manner to that shown in FIG. lB.
FIG. 2A, which is obtained in a manner similar to that described in connection with FIG. lA, shows the threshold characteristics of device 8 of FIG. 2B. As can be observed from a consideration of FIG. 2A, the amplitude of the main and side lobes 1,2,3 of the threshold characteris-tic has been increased over the amplitude of those shown in FIG. lA.
This indicates that the gain of device 8 has been increased oVer the gain of device 7. It should also be noted, howeYer, that the amplitude of curve 2 in FIG. 2A has also been increased, again subjecting devices similar to deYice 8 to margin problems which relate to the preciseness with which gate current and control current must be applied and to the ability to closely regulate the current applied. At this point, it should be appreciated that the problem being overcome by the teaching of the present application deals with practical problems which, considerin3 the present state of the art, cannot be oVercome by simply applying Yery large gate currents and yery small control currents with all the attendant impli-cations of very high theoretical gain. All the theoretical possibjlities 10609t~8 1 notwithstanding, it is simply not enough to be able to pinpoint values ofgate current and control current which will provide one with large gain.
The practical lTmitations on all the parameters inyolyed in providing a circuit or device which operates in the real world require that the deyice or circuit be still operable when a number of parameters change from their nominal values. Accordingly, such devices or circuits should have the ability to operate over a relatively wide range of parameter variation without sacrificing, for example, gain. In this respect, the circuit of FIG. 2B, while providing good gain characteristics, and improved "OPERATING RANGE" as indicated by the cross-hatched area in FIG. 2B, still requires relatively tight control over the parameters Ig and Ic because the amplitude of side lobe 2 has also increased slightly from the amplitude of side lobe 2 shown in FIG. lA. Thus, while the gain and operating range have increased, the operating range of the circuit of FIG. 2B still leaves something to be desired. While the current through junction J2 has been indicated as being twice the current through junctions ; Jl,J3, it should be appreciated that as soon as the maximum Josephson current.through junction J2 was increased from Io, an improvement in gain and operating margins was noted. It should be noted in FIG. 2B that the same condition with respect to the phase difference, 0, discussed herein-~; above in connection with FIG. lB also pertains to the arrangement of FIG. 2B.
Referring now to FIGS. 3A and 3B, there is shown therein the threshold ~` characteristic for a three junction interferometer the center one of which carries twice the maximum Josephson current of the others and is provided with a symmetric dual feed for the application of gate current. FIG. 38 shows a schematic diagram of interferometer device 9 which is similar in all respects to the arrangement of FIG. 2B except that the gate current is fed yia inductances la, otherwise identified in FIG. 3B as Lp, to the center point of inductances 4, otherwise identified in FIG. 3B as L, to junctions Jl, J2 and J3, As in FIG. 2B? the center junction J2 is, for ; example, twice the size of junctions Jl, J3. Control line 6 is inductively 1 coupled to inductances 4 and to the loops formed, on one hand, by an induc-tance 4, junctions Jl,J2 and the interconnection therebetween and, on the other hand, by an inductance 4, ~unctions J2, J3 and the interconnection therebetween. A consideration of the threshold characteristic of FIG. 3A
shows that device 9 of FIG. 3B has undergone a considerab1e improvement both in gain and operating range as a result of providing the symmetrical dual feed and a junction capable of carrying twice the maximum Josephson current as the other junctions of device 9. FIG. 3A clearly shows that the amplitude of main lobe 1 has peaked up to a larger amplitude value than the main lobe 1 of FIG. 2A and 2B. In addition, main lobe 1 is con-siderably narrower near the top providing, using the rough approximation of the ratio of gate current to control current, gains in excess of 3.
` In addition, because the amplitude of side lobe 2 has now been consider-ably diminished, the extremely tight tolerances on gate and control cur-rents for the device of FIG. lB and the somewhat less restrictive toler-ances on the currents applied to the device of FIG. 2B are no longer neces-sary because of the availability of a relatively wide operating range available between main lobe 1 and side lobe 3 of FIG. 3B. The cross-hatched area identified as "OPERATING RANGE" in FIG. 3B shows the improvement at a glance. In FIG. 3B which shows the preferred embodiment of the present invention, inductances 10 have a value of inductance equal to three times the value of inductance 4. The inductance of inductance 10 may vary pre-ferably over a range of from two to five times the inductance of induc-tance 4. All of these values of inductance in the range mentioned provide improved gain and operating range over the arrangement shown in FIG. lB.
Also, while the inductances 10 in FIG. 3B have been shown as being con-nected to the midpoints of inductances 4, it should be appreciated that connections to inductances 4 can be connected at points other than the mid-point of inductances 4, The major criterion to be adhered to in providin~
multiple junction interferometers with high ~ain and wide operating range is that current should be fed in so that the phase dlfference, ~, across the junctions at zero applied field tS always the same just prior to switching.
Y09-74-0~0 - 12 -106'0958 1 This criterion applies regardless of the n~mber of junctions oYer two beinsutilized. Accordingly, eyen prior art arrangemen~s stmilar to that shown in FIG. lB can haYe higher gain and an improved operating range by making sure that the phase difference, 0, is the same across all the junctions.
This can be accomplished as shown in the schematic of FIG. 4 by adjusting the symmetrical dual current feed so that inductances 10 are connected to inductances 4 in such a way as to d~vide them in the L/3, 2L/3 ratio shown.
Thus, depending on the number of junctions being utilized, the symmetrical dual current feed of the present invention can be utilized in multiple junction interferometers both where the maximum Josephson current through one of the junctions is larger than through the others and where the maxi-mum Josephson current through all the junctions is the same. It should ~ be clear from what has gone before that any number of junctions may be- utilized and that if the phase difference is properly controlled by ad-justing the values of inductance encountered by the gate current, inter-ferometer circuits of high gain and improved operating margins can be achieved.
Referring now to FIG. 5 there is shown therein a perspective repre-sentation of the symmetrical, dual feed interferometer device 9, the threshold characteristic of which and the schematic equivalent circuit of which are shown in FIGS. 3A,3B, respectively. Interferometer device 9 comprises a ground plane 11 of superconducting material such as niobium.
A thin layer 12 of oxide such a niobium oxide (Nb205) separates ground ~
plane 11 from the next layer, portions of which form the base electrodes ~ -of junctions Jl, J2 and J3. The inductances L are formed by lead alloy superconductors which form base electrode 13 and counterelectrode 14. The inductances result from spacing layers 13 and 14 with a layer 15 of an oxide such as silicon oxide which is much thicker than the oxide between those portions of counterelectrode layer 14, which dip towar4 base electrode 13 yia holes in oxide layer 15, and base electrode 13 to form junctfons Jl,J2,J3. Two Tnsulated control llnes 16 are dispQsed in over- -lying relationship with counterelectrode 14 and are spaced therefrom by ~,' .
106095~3 1 an insulating layer (not shown). Control current, Ic, is applie~ via con-trol ~ines 16 while gate current, Ig, is applied to an extension 17 of counterelectrode 14 and exits from the device via an extension 18 of base electrode 13 as shown in FIG. 5. The arrangement of FIG. 5 provides for the feeding of gate current, Ig, via two branches 19 which are spaced from base electrode 13 by oxide 15 and provide inductances, Lp, which are equal in value to 3L. Branches 19 form the symmetrical dual feeds which are con-nected to counterelectrode 14 which, when it is spaced from base electrode 13 by oxide layer 15, forms inductances of value L. Branches 19 are so constructed that they effectively feed the midpoints of inductances L
which have been otherwise referred to as inductances 4 in FIG. 3B. In-ductances Lp have been otherwise referred to as inductances 10 in FIG. 3B.
- Control lines 16, of course, are coupled electromagnetically to the loops formed by devices Jl,J2,J3, inductances L, the base and counter electrodes and their associated metallization. Because control lines 16 are coupled to the loops as indicated, various logic functions such as AND, OR, etc., can be carried out. For example, for the AND function both control lines 16 must be energized before circuit arrangement 9 switches. For an OR
operation, where one or the other of control l;nes 16 is energized, arrangement 9 switches. Any number of control lines 16 may be utilized limited only by the ability to properly position them.
While no mention has been made until this point of the characteris-tics of junctions Jl, J2 and J3, it should be noted that these junctions are formed in the usual manner by forming a thin oxide of between 10 and 30 angstroms to form a tunnel barrier between base and counter electrodes which, as has been indicated, are of superconducting material. Thus, junction J2, for example, in the perspective View of FIG. 5 has a thin oxide layer 20 which forms the tunnel barrier between base electrode 13 and counterelectrode 14. In order to fulfill the requirement of carrying twice the maximum Josephson current as junctions Jl, J3, junction J2 is twice as long as junctions Jl,J3. Because of the need to form inductances 4 and 10, the simplest approach to causing junction J2 to carry twice the 10~)9S~3 1 maximum Josephson current was to make the area of junction J2 twice as large as iunctions Jl,J3. It should be appreciated, howeYer, that any other technique for increasing the maximum Josephson current in one of the junc-tions such as providing a different work function for one of the electrodes may be utilized. In another instance, the thickness of the tunneling oxide may be adjusted to control the maximum Josephson current. It should also be appreciated that, in addition to the well-known Josephson structures which incorporate tunneling oxides, well-known weak link arrangements may be substituted for the Josephson devices which incorporate tunnel barriers without departing from the spirit of the present invention. In the weak link environment, the maximum Josephson current value may be controlled by adjusting the cross-section of the constriction, the shape of the constric-tion or the length and width of the constriction.
- In addition to the usual Josephson junction device which incorporates a tunnel barrier and weak links, it should be appreciated that a normal metal may be substituted for the tunnel barrier or a vacuum may be utilized where one can be appropriately incorporated. The former of the devices indicated are well known in the prior art as S-N-S (Superconducting Metal - Normal Metal - Superconducting Metal) devices. In these devices as in all the arrangements suggested, any approach for controlling the -maximum Josephson current may be utilized to provide a different maximum Josephson current in at least one of the junctions which make up the inter-ferometer devices of the present invention.
Returning now to FIG. 5, interferometer device 9 may be fabricated in accordance with fabrication techniques well known to those skilled in the semiconductor and Josephson technologies. Thus, the metallic layers are formed by well-known vacuum deposition techniques; junction oxides are formed and their thickness controlled by a sputtering technique taught in U.S. patent 3,849,276 Which issued Noyember 19, 1974 in the name of J. Greiner to the same assignee as the assignee of the present inyen-tion; other oxides are formed by well-known evaporation techniques and the latter along with the various metal layers are delineated using well-known Y09-74-040 _ ~ _ photolithographic masking and etching techniques. Since the fabrication technique forms no part of the present invention, it is believed that the foregoing description, which invokes well-known prior art techniques and .:
patents, is sufficient for one skilled in the art to fabricate devices of the character described hereinabove.
Device 9 of FIG. 5, when fabricated, can have the following repre-sentative parameters. Using a ground plane 11 of niobium, base electrode 13 is spaced therefrom by 500 A thick layer 12 of niobium oxide. The inductances L which are formed by layers 13,14 of lead alloy supercon-ductors are separated from each other by 4000 A thick layer 15 of silicon oxide. Under such circumstances, the inductances L have values of approxi-`- mately 1.3 picohenrys. The main portion of counterelectrode 14, which does not include extension 17 or branches 19, has a size of 51 x 269 ym, and forms junctions with base electrode 13 through slots in SiO layer 15.
Junctions Jl and J3 have an area of approximately 9 x 11.5 ym2, the cen-ter junction J2 being twice as long. Two insulated 13,~m wide control lines 16 are disposed in overlying relationship with counterelectrode 14. The inductances Lp formed by branches 19 and oxide spaced base electrode 13 have values of approximately 3.9 picohenrys.
Interferometer 9 has an I-V characteristic similar to that of other ' Josephson devices. It has a zero field threshold current (Imo = 410 = 0.7mA). Device 9 operates at low current levels in essen-tially the same way as well-known Josephson devices. The dissipation is approximately 1.5 microwatts in continuous operation with an appropriate load. Where device 9 operates in a latching mode, a pulsed power source is required to ensure resetting after each logic cycle. Thus, by apply-ing a control current which generates a magnetic field which, in turn, is magnetically coupled to deyice 9, the maximum value of Josephson - threshold current at which deyice 9 switches is reduced and deYices Jl - J3 swltch to the voltage state delivering essentially all of the gate current into a properly chosen load which is connected in parallel with deyice 9. The connection of load 21 shown schematically in FIG. 3B
106~958 l is made in the usual manner via interconnecting transmission lines and may haye an impedance, ZO' which is equal to the characteristic impedance of the interconnecting transmission 1ines. Load 21, in an alternative modes of connection to device 9 may be connected in parallel with any of the devices Jl,J2,J3 Device 9 is not limited to operating in the latching mode just des-cribed. It may also be operated in a non-latching mode. The minimum current at which a Josephson junction switches from the voltage state back to its zero voltage state can be increased by connecting a small resistive load in parallel with the device. It is well known that the hysteresis of the voltage state of Josephson junctions becomes negli-gible if B ~ 2~CR2Im/00 ~ 2, where C is the junction capacitance, Im is the maximum Josephson threshold current, R is the value of a resistive load, ~O is a flux quantum and ~ is a damping constant. With a load of appropriate resistance, the Josephson oscillations of device 9 have a voltage amplitude which is of the same order as the mean d.c. junction voltage. The amplitude of these oscillations increases as the control current decreases and self resetting can occur when the junction voltage is momentarily zero during the negative swing of such an oscillation.
In the usual Josephson junction, the capacitance of such junctions is generally so large that non-latching operation requires unreasonably low output line impedances. In interferometers, however, both C and -~ Im can be made small. Thus, using interferometers of the character of device 9, self resetting operatjon occurs at higher impedances. Non-latching operation of interferometer device 9 may be achieved with an external load resistance > 0.15 ~. In the usual circuit application, the terminated transmission lines may control a succeeding deyice.
Referring now to FIG. 6 there is shown therein a multiple junction interferometer 22 having four junctions and including a symmetrical dual current feed arrangement which insures that the phase difference is al-ways the same across each junctiDn prior to swttching at zero applied fjeld. FIG. 6 is simllar to FIG. 3B except that it incorporates an . ~
106095~3 1 additional j~nction J4 and current through all the junctions is the same.
Under the conditions shown in FIG. 6, the incoming current encounters symmetrical feed impedances and because the currents through devices - Jl - J4 are the same, the phase difference across all the junctions is the same and the relationship of current and inductance is linear. If, however, one or the other of these values is changed, for example, if the current through junction J3 is increased, the values of inductance will have to be changed to insure that the phase difference across all the junctions is the same. These values can be mathematically deter-mined and such capability is within the skill of a person skilled in the Josephson art.
From all the foregoing, it should not be implied that the limit of the maximum Josephson current in any device is two. The maximum Josephson current may have any value limited only by practical considera-tion such as three, four, five, etc. In any given circuit arrangement, the maximum Josephson current need only be larger by a fractional amount in one junction to achieve some improvement. Also, it should be appre-ciated that the maximum Josephson current can be larger in more than one junction and improvement in gain and operating range achieved as long as the phase difference across all junctions is the same. Independent ad-justment of inductance or adjustment of current through the junctions, as indicated hereinabove, may be utilized to achieve this end. Finally, it should be appreciated that the circuits disclosed herein are susceptible of scaling. As long as the relative values of current through the junc-tions remain the same, the same circuit arrangement can be utilized with-out departing from the teaching of the present invention.
While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departin~ from the spirit and scope of the inyention.
BACKGROUND OF THE INVENTION
. Field of the Invention This invention relates generally to ~Dsephson tunnelling interfero-meter devices which have application as logic devices in Josephson tunnel-ling circuits. More specifically it relates to Josephson tunnelling inter-ferometer devices, which, in contrast to a simple junction, are capable of operating with high current gains at low operating currents and have a threshold characteristic with large lobe separation. This latter fea-ture either maintains or increases the operating margins of the resulting logic devices. Still more specifically, it relates to a Josephson junc-tion interferometer device which contains more than two junctions; pre-ferably three, wherein the maximum Josephson current, Im, is greater and preferably twice as large in the center one of three junctions than the maximum Josephson current in the remaining junctions. In a preferred arrangement, gate current is fed into the interferometer device in a sym-metrical manner such that the gate current is applied at the centre of an inductance L disposed between the centre junction and the outer junctions via inductances which have a value of inductance which can be three times the value of the inductance, L. Because there are such a large number of arrangements which include a plurality of junctions, an equally large num-ber of current feed arrangements are required which can be encompassed by adhering to the following criterion: The current should be fed in so that, with zero control field, the phase difference, 0, across the junctions is the same (~ /2) just prior to switching, that is, all junctions in the interferometer switch simultaneously. While three or more junctions can be utilized to form an ;nterferometer having the desired operating margins and current gains, the small size of the three junction interferometer is most attractive from a practical standpoint. The fact that the interfero-meter deyices of the Present application can be operated in both latching and non-latching modes permits them to be utilized in a wtde variety of .
~06095~
1 circuit applications.
~ E~on~ of the prior Art Josephson junction devices are well known in the prior art for use as both memory devices and as switching devices for use in ultra-high speed 10gic circuits. The characteristics of a typical Josephson device is described in detail in a publication entitled "The Tunneling ~ryotron --A Superconductiye Logic Element Based on Electron Tunneling" by J. Mat;soo which appeared in the Proceedings of the IEEE, February 1967, Yol.55, No.2, pp.l72-180. A typical logic device of the character described in the - 10 article consists of a gate and a control line which are positioned above but insulated from the gate. The control line is generally made of a superconductor such as niobium, tin or lead. The Josephson junction de-vice itself consists of two strips of superconducting material which over-lap. In the region of the overlap, the two strips of superconductive material are separated from each other by a tunnel barrier which may be ~ formed of an oxide of one of the superconductor strips. The oxide barrier - usually has a thickness of the order of 10-30 angstroms. The gate and con-trol line are normally placed on a superconducting ground plane and insu-lated from it.
Gate current, Ig, is fed through the junction which, being in the zero voltage state, shorts an output impedance, Z0. If the linear sum of the input currents, Ic, reduces the Josephson Threshold current, Im~ below Ig, the current switches to a voltage equal to or less than 2 ~/e (2 a/e = 2.5mV for lead junctions). After switching, the voltage Vg pro-duces a current Ir equal to Yg/Z0 in the output impedance. The result-jng current may be utilized to control other circuits. In most instances, the switched junction remains locked in the voltage state and must be reset to the zero voltage state by a momentary decrease in Ig. However, d.c. powered non-latching c7rcuits haYe been proposed by W. Bae~htold, Digest of Technical papers~ I.S.5.C.C , Philadelphia, 146~1975~.
Quantum interference between two parallel Josephson junctions, also called interferometers, has been described by R.C. Jakleyic, J. Lambe . .
1 J.E. ~ercereau, A.H. Silver, physical Review, 140, A1628, Noyember 1965.
IBM* Technical Disclosu~ Bulletin, yOl, 17, No. 3, August 1974, pp. 901-902, in an article entitled "Single Flux Quantum Memory Cell for NDRO" by W.W. Jutzi shows a centre fed triple junction interferometer wherein all the junctions are of the same size and carry the same currents. In this arrangement, however, the effort was directed not to increasing the sepa-ration between lobes but rather to having a region of overlap where three energy states are possible. The TDB arrangement is rea11y not concerned with devices that switch to the voltage state nor is it concerned with having a large operating range for devices with high gain.
An article entitled "Three Junction Interferometer" by Stuelm and Wilmsen, in Applied Physics Letters, Vol. 20, No. 11, June 1972, pp. 458-460, shows an asymmetrically fed triple Josephson junction arrangement in which all the junctions are the same size. This article apparently recognizes that the spacing between the lobes of a ~osephson junction threshold curve may be increased by adding an additional junction to the known two junction interferometer. However, while it increases magnetic field sensitivity over the known two junction interferometer, this asymmetrically fed three Josephson junction interferometer does not have the maximum Josephson zero voltage current through it at zero applied magnetic field. The article, however, does indicate that zero applied magnetic field coincides with the maximum current through the interfero-meter for a symmetrically fed device similar to that shown in the IBM*
Technical Disclosure Bulletin. Thus, while it has been recognized that the magnetic field sensitivlty can be improved in both the two and three junction interferometers, all of these arrangements are concerned with enhancing the aforementioned magnetic field sensitivity and not with achieving high current gains while simultaneously improving the operating margins of devices Which are to be used in the logic environment.
SUMMA~Y F THE INVENTION
In accordance w1th the broadest aspect of the present i~Vention a *Registered Trade Mark 1 multiple junction interferometer circuit is provided whiCh co~prises at least three junctions capable of carrying Josephson current connected in parallel , at least one of which carries at least the same maximum Josephson current as the others and means connected to the junctjons for feeding current thereto so that, with zero control field, the phase difference across the junctions is the same prior to switching.
In accordance with the broader aspects of the present invention, a multiple junction interferometer circuit is provided which comprises at least three junctions capable of carrying Josephson current connected in parallel and means integral with at least one of the junctions for car-rying a larger maximum Josephson current than the remaining junctions.
In accordance with the broader aspects of the invention, a multiple junction interferometer is provided wherein the means for carrying a larger maximum Josephson current includes means for carrying a maximum Josephson current which is twice as large as the maximum Josephson cur-rent in the remaining junctions.
In accordance with the broader aspects of the invention, the multiple junction interferometer is provided which further includes means connected to the interferometer for applying current to the junctions.
In accordance with the broader aspects of the present invention, a multiple junction interferometer circuit is provided which comprises at least three junctions capable of carrying Josephson current connected in parallel at least one of which carries at least the same amount of maxi-mum Josephson current as the others and dual current feed means connected to sa;d at least three junctions~
In accordance with broader aspects of the present inYention~ a multi-ple junction interferometer is provided which further includes at least a single control element disposed in insulating spaced relationship with - at least one of the inductive loops co~prising the deYi;ce and further includes output means connected in parallel with the interferQmeter.
In accordance with still broader asPects of the present inYention, the means integral with at least one of the junctlons for carrylng a ~0609S8 1 larger maximum Josephson current includes a junction of larger s~ze; a tun-nel barrier having a thickness different from the tunnel barrier thickness of the remaining junctions; at least one electrode of one of the junctions of conductive material having a work function different from the work function of at least one electrode of the remaining junctions.
In accordance with a more particular aspect of the present inven-tion, the means connected to the interferometer for applying current to said junctions includes at least two inductances connected to the center point of inductive elements disposed between a centrally disposed junc-tion and a pair of outer junctions, said inductances each having a value three times the inductance of the inductances disposed between the cen-trally disposed junction and a pair of outer junctions.
It is, therefore, an object of this invention to provide a multiple junction interferometer circuit which has high current gain and consider-ably increased operating margins.
Another object is to provide a multiple junction interferometer wherein the device consists of three junctions the center one of which is designed to carry a maximum Josephson current which is twice the current in each of the other junctions.
Still another object is to provide a multiple junction interfero-meter circuit wherein the current feed configuration to the interfero-meter provides a circuit with improved gain and operating margins over those of prior art circuits.
Still another object is to provide a multiple junction logic cir-cuit which is capable of being operated in both a latching and non-latching mode.
Still another object is to provide a multiple junction interfero-meter for use in logic circuits which has very low poWer djssipatjon and yery high speed switching.
The foregoing and other objects, features and adyantages of the in-vention wi:ll become apparent from the following more particular descrip-tion of the preferred embodiment of the Invention as illustrated in the 1 accompanyi~ng drawings.
BRIEF DESCRIPTION OF TH~ DRAWINGS
FIG. lA shows the threshold characteristic, Ig ys. Ic, for a center fed prior art interferometer comprising three junctions all of which are the same size and carry the sa~e maximum Josephson current, Io. The figure shows only the threshold characteristic for positive Yalues of Ig and Ic.
FIG. lB shows a schematic of a center fed interferometer, all the junctions of which carry the same maximum Josephson current, the threshold characteristic of which is shown in FIG. lA.
FIG. 2A shows the threshold characteristic, Ig YS. Ic, for a cen-ter fed interferometer comprising three junctions the center one of which carries twice as much current, 210, as the remaining junctions. The threshold characteristic is shown only for positive values of Ig and Ic.
FIG. 2B shows a schematic of a center fed interferometer, one junc-tion of which carries twice the maximum Josephson current of the remain-ing junctions; the threshold characteristic of which is shown in FIG. 2A.
FIG. 3A shows the threshold characteristic, Ig vs. Ic, for a sym-: metrically disposed, dual feed three junction interferometer wherein the : 20 center junction carries twice the maximum Josephson current of the other junctions. The threshold characteristic is shown only for positive Yalues of Ig and Ic, FIG. 3B shows a schematic of a symmetrical, dual feed interferometer one junction of which carries twice the maxi~um Josephson current of the other junctions; the threshold characteristic of which is shown in FIG. 3A.
~ FIG. 4 shows a schematic of an interferometer circuit simjlar to that ; shown jn FIG. lB except that the symmetrical dual current feed of FIG. 3B
is utilized and connected ~n such a way as to insure the same phase dif-ference, ~, across all the junctions~
FIG. 5 shows a perspective representation of the symmetrical, dual feed interferometer the threshold characteristic of which and the schem~-tic equiYalent circuit of which are shown in FIGS. 3~, 3B, respect~velY.
106()958 1 The arrangement shown may be utlized for both latching and non-latching logic operations.
FIG. 6 shows a schematic of another embodiment of a multiple junc- -tion interferometer in accordance with the teaching of the present inven-tion which incorporates four junc'cions and is symmetrically fed so that with zero control field, the phase difference, p, is always the same in each of the junctions prior to switching. lhe symmetrical dual current feed provides for enhanced gain and operating margins even though all the junctions carry the same maximum Josephson current.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
As has been indicated hereinabove, in the discussion of the prior art, both asymmetric and center-fed triple junction interferometers where-in all the junctions are of the same size and carry the same current are well known. To more fully develop the present contribution, a compari-son between the prior art arrangements and the circuits of the present invention is believed to be in order. Accordingly, in the discussion which follows, a center-fed interferometer with junctions of the same size, a center-fed interferometer wherein the center junction of three is twice the size of the remaining junctions, and a symmetric dual-feed three junc-tion interferometer wherein the center junction of three carries twice the maximum Josephson current will be discussed. In addition, three and four junction interferometer circuits having symmetrical dual current feed means and the same maximum Josephson current through all the junc-tons will be discussed.
Referring now to FIG. lA, there is shown the threshold character-istic, Ig vs. Ic, for a center-fed Prior art interferometer comprising three junctions all of which are the same size and carry the same maximum Josephson current, Io~ While it should be appreciated that a similar characteristic exists for negative yalues of Ig and Ic, only the threshold characterlstic for positiye values of Ig and Ic have been shown for pur poses of clarity and simplification. The threshold characteristic of FIG. lA shoùld be considered with FIG. lB which shows a schematic of a - ~060958 1 center-fed interferometer, all the junctions of which carry the same maxi- -mum Josephson current.
The threshold characteristic of FIG. lA is obtained by applying gate current, Ig, to the device of FIG. lB and determining the points at which the device of FIG. lB switches to the voltage state as the gate current, Ig, is varied while the control current, Ic, is held constant, or vice versa. Thus, in FIG. lA threshold curve 1 shows the switching threshold for the 0,0 vortex mode while curves 2 and 3 show the switching threshold for the 1,0 and 1,1 vortex modes, respectively. Thus, any time the applied gate current exceeds the switching thresholds indicated by the envelope of curves 1,2,3, the device of FIG. lB switches from the zero voltage state to the voltage state. In those regions where curves 1,2,3 overlap, the boundaries of these curves in the overlapping regions are determined by detecting the change in state between vortex modes. These changes in state are detected by measuring the current pulse which is due to the trapping or expulsion of flux quanta from the device of FIG. lB.
~ In FIG. lB, junctions Jl, J2 and J3 are all of the same size and, - as a consequence, all other things being equal, carry the same maximum Josephson current, Io~ These junctions in conjunction with inductances 4 and centrally disposed gate current feed line 5 and control line 6 form interferometer device 7 which has the threshold characteristics shown in FIG. lA.
Using device 7 and its associated threshold characteristic shown in FIG. 1~ as a criterion, it can be seen that a cross-hatched area otherwise indicated as "OPERATING RANGE" is obtained. Using for gain the ratio of Ig to Ic as a very rough approximation for gain, jt can be see from FIG. lA that only with tightly controlled margins and extremely good regulation of current can decent gains be obtained, At this point, it should be appreciated that the arrangement of FIG. lB represented an improyement over two junction interferometers to - the extent that the addition of the third junction moved the lobes apart.
Y09-74-040 _ 9 _ '',, ' -. ~ : ' ' ~
106095~
1 However, while movin~ the lobes apart, the gain was not substantially increased nor was the operating range enhanced to the extent that very tight control of Ig and Ic could be relaxed. Also, it should be clear from FIG. lB
that, though the currents through junctions Jl,J2,J3 are normally equal to Io sin 0, the current through junction J2 is different from the currents through Jl and J3 because the current through J2 encounters a lower impedance path. As a result, the phase difference, 0, across the junction is not the same at zero field prior to switching.
To overcome the gain and margin problems associated with device 7 of FIG. lB, the maximum Josephson current Io Of device 7 was increased by permitting a current, 210, to be carried by the center leg of device 7 of FIG. lB. The resulting interferometer device 8 is schematically shown in FIG. 2B with junction J2 being schematically indicated by a larger X than junctions Jl and J3. Device 8 is center fed by gate current feed line 5 and controlled by control line 6. Inductances 4 have the same value and are disposed in a similar manner to that shown in FIG. lB.
FIG. 2A, which is obtained in a manner similar to that described in connection with FIG. lA, shows the threshold characteristics of device 8 of FIG. 2B. As can be observed from a consideration of FIG. 2A, the amplitude of the main and side lobes 1,2,3 of the threshold characteris-tic has been increased over the amplitude of those shown in FIG. lA.
This indicates that the gain of device 8 has been increased oVer the gain of device 7. It should also be noted, howeYer, that the amplitude of curve 2 in FIG. 2A has also been increased, again subjecting devices similar to deYice 8 to margin problems which relate to the preciseness with which gate current and control current must be applied and to the ability to closely regulate the current applied. At this point, it should be appreciated that the problem being overcome by the teaching of the present application deals with practical problems which, considerin3 the present state of the art, cannot be oVercome by simply applying Yery large gate currents and yery small control currents with all the attendant impli-cations of very high theoretical gain. All the theoretical possibjlities 10609t~8 1 notwithstanding, it is simply not enough to be able to pinpoint values ofgate current and control current which will provide one with large gain.
The practical lTmitations on all the parameters inyolyed in providing a circuit or device which operates in the real world require that the deyice or circuit be still operable when a number of parameters change from their nominal values. Accordingly, such devices or circuits should have the ability to operate over a relatively wide range of parameter variation without sacrificing, for example, gain. In this respect, the circuit of FIG. 2B, while providing good gain characteristics, and improved "OPERATING RANGE" as indicated by the cross-hatched area in FIG. 2B, still requires relatively tight control over the parameters Ig and Ic because the amplitude of side lobe 2 has also increased slightly from the amplitude of side lobe 2 shown in FIG. lA. Thus, while the gain and operating range have increased, the operating range of the circuit of FIG. 2B still leaves something to be desired. While the current through junction J2 has been indicated as being twice the current through junctions ; Jl,J3, it should be appreciated that as soon as the maximum Josephson current.through junction J2 was increased from Io, an improvement in gain and operating margins was noted. It should be noted in FIG. 2B that the same condition with respect to the phase difference, 0, discussed herein-~; above in connection with FIG. lB also pertains to the arrangement of FIG. 2B.
Referring now to FIGS. 3A and 3B, there is shown therein the threshold ~` characteristic for a three junction interferometer the center one of which carries twice the maximum Josephson current of the others and is provided with a symmetric dual feed for the application of gate current. FIG. 38 shows a schematic diagram of interferometer device 9 which is similar in all respects to the arrangement of FIG. 2B except that the gate current is fed yia inductances la, otherwise identified in FIG. 3B as Lp, to the center point of inductances 4, otherwise identified in FIG. 3B as L, to junctions Jl, J2 and J3, As in FIG. 2B? the center junction J2 is, for ; example, twice the size of junctions Jl, J3. Control line 6 is inductively 1 coupled to inductances 4 and to the loops formed, on one hand, by an induc-tance 4, junctions Jl,J2 and the interconnection therebetween and, on the other hand, by an inductance 4, ~unctions J2, J3 and the interconnection therebetween. A consideration of the threshold characteristic of FIG. 3A
shows that device 9 of FIG. 3B has undergone a considerab1e improvement both in gain and operating range as a result of providing the symmetrical dual feed and a junction capable of carrying twice the maximum Josephson current as the other junctions of device 9. FIG. 3A clearly shows that the amplitude of main lobe 1 has peaked up to a larger amplitude value than the main lobe 1 of FIG. 2A and 2B. In addition, main lobe 1 is con-siderably narrower near the top providing, using the rough approximation of the ratio of gate current to control current, gains in excess of 3.
` In addition, because the amplitude of side lobe 2 has now been consider-ably diminished, the extremely tight tolerances on gate and control cur-rents for the device of FIG. lB and the somewhat less restrictive toler-ances on the currents applied to the device of FIG. 2B are no longer neces-sary because of the availability of a relatively wide operating range available between main lobe 1 and side lobe 3 of FIG. 3B. The cross-hatched area identified as "OPERATING RANGE" in FIG. 3B shows the improvement at a glance. In FIG. 3B which shows the preferred embodiment of the present invention, inductances 10 have a value of inductance equal to three times the value of inductance 4. The inductance of inductance 10 may vary pre-ferably over a range of from two to five times the inductance of induc-tance 4. All of these values of inductance in the range mentioned provide improved gain and operating range over the arrangement shown in FIG. lB.
Also, while the inductances 10 in FIG. 3B have been shown as being con-nected to the midpoints of inductances 4, it should be appreciated that connections to inductances 4 can be connected at points other than the mid-point of inductances 4, The major criterion to be adhered to in providin~
multiple junction interferometers with high ~ain and wide operating range is that current should be fed in so that the phase dlfference, ~, across the junctions at zero applied field tS always the same just prior to switching.
Y09-74-0~0 - 12 -106'0958 1 This criterion applies regardless of the n~mber of junctions oYer two beinsutilized. Accordingly, eyen prior art arrangemen~s stmilar to that shown in FIG. lB can haYe higher gain and an improved operating range by making sure that the phase difference, 0, is the same across all the junctions.
This can be accomplished as shown in the schematic of FIG. 4 by adjusting the symmetrical dual current feed so that inductances 10 are connected to inductances 4 in such a way as to d~vide them in the L/3, 2L/3 ratio shown.
Thus, depending on the number of junctions being utilized, the symmetrical dual current feed of the present invention can be utilized in multiple junction interferometers both where the maximum Josephson current through one of the junctions is larger than through the others and where the maxi-mum Josephson current through all the junctions is the same. It should ~ be clear from what has gone before that any number of junctions may be- utilized and that if the phase difference is properly controlled by ad-justing the values of inductance encountered by the gate current, inter-ferometer circuits of high gain and improved operating margins can be achieved.
Referring now to FIG. 5 there is shown therein a perspective repre-sentation of the symmetrical, dual feed interferometer device 9, the threshold characteristic of which and the schematic equivalent circuit of which are shown in FIGS. 3A,3B, respectively. Interferometer device 9 comprises a ground plane 11 of superconducting material such as niobium.
A thin layer 12 of oxide such a niobium oxide (Nb205) separates ground ~
plane 11 from the next layer, portions of which form the base electrodes ~ -of junctions Jl, J2 and J3. The inductances L are formed by lead alloy superconductors which form base electrode 13 and counterelectrode 14. The inductances result from spacing layers 13 and 14 with a layer 15 of an oxide such as silicon oxide which is much thicker than the oxide between those portions of counterelectrode layer 14, which dip towar4 base electrode 13 yia holes in oxide layer 15, and base electrode 13 to form junctfons Jl,J2,J3. Two Tnsulated control llnes 16 are dispQsed in over- -lying relationship with counterelectrode 14 and are spaced therefrom by ~,' .
106095~3 1 an insulating layer (not shown). Control current, Ic, is applie~ via con-trol ~ines 16 while gate current, Ig, is applied to an extension 17 of counterelectrode 14 and exits from the device via an extension 18 of base electrode 13 as shown in FIG. 5. The arrangement of FIG. 5 provides for the feeding of gate current, Ig, via two branches 19 which are spaced from base electrode 13 by oxide 15 and provide inductances, Lp, which are equal in value to 3L. Branches 19 form the symmetrical dual feeds which are con-nected to counterelectrode 14 which, when it is spaced from base electrode 13 by oxide layer 15, forms inductances of value L. Branches 19 are so constructed that they effectively feed the midpoints of inductances L
which have been otherwise referred to as inductances 4 in FIG. 3B. In-ductances Lp have been otherwise referred to as inductances 10 in FIG. 3B.
- Control lines 16, of course, are coupled electromagnetically to the loops formed by devices Jl,J2,J3, inductances L, the base and counter electrodes and their associated metallization. Because control lines 16 are coupled to the loops as indicated, various logic functions such as AND, OR, etc., can be carried out. For example, for the AND function both control lines 16 must be energized before circuit arrangement 9 switches. For an OR
operation, where one or the other of control l;nes 16 is energized, arrangement 9 switches. Any number of control lines 16 may be utilized limited only by the ability to properly position them.
While no mention has been made until this point of the characteris-tics of junctions Jl, J2 and J3, it should be noted that these junctions are formed in the usual manner by forming a thin oxide of between 10 and 30 angstroms to form a tunnel barrier between base and counter electrodes which, as has been indicated, are of superconducting material. Thus, junction J2, for example, in the perspective View of FIG. 5 has a thin oxide layer 20 which forms the tunnel barrier between base electrode 13 and counterelectrode 14. In order to fulfill the requirement of carrying twice the maximum Josephson current as junctions Jl, J3, junction J2 is twice as long as junctions Jl,J3. Because of the need to form inductances 4 and 10, the simplest approach to causing junction J2 to carry twice the 10~)9S~3 1 maximum Josephson current was to make the area of junction J2 twice as large as iunctions Jl,J3. It should be appreciated, howeYer, that any other technique for increasing the maximum Josephson current in one of the junc-tions such as providing a different work function for one of the electrodes may be utilized. In another instance, the thickness of the tunneling oxide may be adjusted to control the maximum Josephson current. It should also be appreciated that, in addition to the well-known Josephson structures which incorporate tunneling oxides, well-known weak link arrangements may be substituted for the Josephson devices which incorporate tunnel barriers without departing from the spirit of the present invention. In the weak link environment, the maximum Josephson current value may be controlled by adjusting the cross-section of the constriction, the shape of the constric-tion or the length and width of the constriction.
- In addition to the usual Josephson junction device which incorporates a tunnel barrier and weak links, it should be appreciated that a normal metal may be substituted for the tunnel barrier or a vacuum may be utilized where one can be appropriately incorporated. The former of the devices indicated are well known in the prior art as S-N-S (Superconducting Metal - Normal Metal - Superconducting Metal) devices. In these devices as in all the arrangements suggested, any approach for controlling the -maximum Josephson current may be utilized to provide a different maximum Josephson current in at least one of the junctions which make up the inter-ferometer devices of the present invention.
Returning now to FIG. 5, interferometer device 9 may be fabricated in accordance with fabrication techniques well known to those skilled in the semiconductor and Josephson technologies. Thus, the metallic layers are formed by well-known vacuum deposition techniques; junction oxides are formed and their thickness controlled by a sputtering technique taught in U.S. patent 3,849,276 Which issued Noyember 19, 1974 in the name of J. Greiner to the same assignee as the assignee of the present inyen-tion; other oxides are formed by well-known evaporation techniques and the latter along with the various metal layers are delineated using well-known Y09-74-040 _ ~ _ photolithographic masking and etching techniques. Since the fabrication technique forms no part of the present invention, it is believed that the foregoing description, which invokes well-known prior art techniques and .:
patents, is sufficient for one skilled in the art to fabricate devices of the character described hereinabove.
Device 9 of FIG. 5, when fabricated, can have the following repre-sentative parameters. Using a ground plane 11 of niobium, base electrode 13 is spaced therefrom by 500 A thick layer 12 of niobium oxide. The inductances L which are formed by layers 13,14 of lead alloy supercon-ductors are separated from each other by 4000 A thick layer 15 of silicon oxide. Under such circumstances, the inductances L have values of approxi-`- mately 1.3 picohenrys. The main portion of counterelectrode 14, which does not include extension 17 or branches 19, has a size of 51 x 269 ym, and forms junctions with base electrode 13 through slots in SiO layer 15.
Junctions Jl and J3 have an area of approximately 9 x 11.5 ym2, the cen-ter junction J2 being twice as long. Two insulated 13,~m wide control lines 16 are disposed in overlying relationship with counterelectrode 14. The inductances Lp formed by branches 19 and oxide spaced base electrode 13 have values of approximately 3.9 picohenrys.
Interferometer 9 has an I-V characteristic similar to that of other ' Josephson devices. It has a zero field threshold current (Imo = 410 = 0.7mA). Device 9 operates at low current levels in essen-tially the same way as well-known Josephson devices. The dissipation is approximately 1.5 microwatts in continuous operation with an appropriate load. Where device 9 operates in a latching mode, a pulsed power source is required to ensure resetting after each logic cycle. Thus, by apply-ing a control current which generates a magnetic field which, in turn, is magnetically coupled to deyice 9, the maximum value of Josephson - threshold current at which deyice 9 switches is reduced and deYices Jl - J3 swltch to the voltage state delivering essentially all of the gate current into a properly chosen load which is connected in parallel with deyice 9. The connection of load 21 shown schematically in FIG. 3B
106~958 l is made in the usual manner via interconnecting transmission lines and may haye an impedance, ZO' which is equal to the characteristic impedance of the interconnecting transmission 1ines. Load 21, in an alternative modes of connection to device 9 may be connected in parallel with any of the devices Jl,J2,J3 Device 9 is not limited to operating in the latching mode just des-cribed. It may also be operated in a non-latching mode. The minimum current at which a Josephson junction switches from the voltage state back to its zero voltage state can be increased by connecting a small resistive load in parallel with the device. It is well known that the hysteresis of the voltage state of Josephson junctions becomes negli-gible if B ~ 2~CR2Im/00 ~ 2, where C is the junction capacitance, Im is the maximum Josephson threshold current, R is the value of a resistive load, ~O is a flux quantum and ~ is a damping constant. With a load of appropriate resistance, the Josephson oscillations of device 9 have a voltage amplitude which is of the same order as the mean d.c. junction voltage. The amplitude of these oscillations increases as the control current decreases and self resetting can occur when the junction voltage is momentarily zero during the negative swing of such an oscillation.
In the usual Josephson junction, the capacitance of such junctions is generally so large that non-latching operation requires unreasonably low output line impedances. In interferometers, however, both C and -~ Im can be made small. Thus, using interferometers of the character of device 9, self resetting operatjon occurs at higher impedances. Non-latching operation of interferometer device 9 may be achieved with an external load resistance > 0.15 ~. In the usual circuit application, the terminated transmission lines may control a succeeding deyice.
Referring now to FIG. 6 there is shown therein a multiple junction interferometer 22 having four junctions and including a symmetrical dual current feed arrangement which insures that the phase difference is al-ways the same across each junctiDn prior to swttching at zero applied fjeld. FIG. 6 is simllar to FIG. 3B except that it incorporates an . ~
106095~3 1 additional j~nction J4 and current through all the junctions is the same.
Under the conditions shown in FIG. 6, the incoming current encounters symmetrical feed impedances and because the currents through devices - Jl - J4 are the same, the phase difference across all the junctions is the same and the relationship of current and inductance is linear. If, however, one or the other of these values is changed, for example, if the current through junction J3 is increased, the values of inductance will have to be changed to insure that the phase difference across all the junctions is the same. These values can be mathematically deter-mined and such capability is within the skill of a person skilled in the Josephson art.
From all the foregoing, it should not be implied that the limit of the maximum Josephson current in any device is two. The maximum Josephson current may have any value limited only by practical considera-tion such as three, four, five, etc. In any given circuit arrangement, the maximum Josephson current need only be larger by a fractional amount in one junction to achieve some improvement. Also, it should be appre-ciated that the maximum Josephson current can be larger in more than one junction and improvement in gain and operating range achieved as long as the phase difference across all junctions is the same. Independent ad-justment of inductance or adjustment of current through the junctions, as indicated hereinabove, may be utilized to achieve this end. Finally, it should be appreciated that the circuits disclosed herein are susceptible of scaling. As long as the relative values of current through the junc-tions remain the same, the same circuit arrangement can be utilized with-out departing from the teaching of the present invention.
While the invention has been particularly shown and described with reference to preferred embodiments thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departin~ from the spirit and scope of the inyention.
Claims (8)
1. A multiple junction interferometer circuit comprising at least three junc-tions capable of carrying Josephson current connected in parallel forming a plurality of superconducting loops, means integral with at least one of said junctions for carrying a larger maximum Josephson current than the remaining junctions, and, at least a single control element electromagnetically coupled to at least one of said loops.
2. A multiple junction interferometer circuit according to claim 1 further including dual gate current feed means connected to said at least three junc-tions.
3. A multiple junction interferometer circuit according to claim 2 further including output means connected in parallel with said junctions.
4. A multiple junction interferometer circuit according to claim 2 wherein said dual gate current means includes two branches each of which has an induc-tance of value Lp and being connected to an inductive element the latter being disposed between said at least one of said junctions and one of said remaining junctions and between said at least one of said junctions and the other of said remaining junctions each of said inductive elements having an inductance of value L and wherein Lp has a value of inductance in a range of two to five times the value of L.
5. A multiple junction interferometer circuit according to claim 3 wherein said output means includes a pair of transmission lines and an impedance equal to twice the characteristic impedance of said transmission lines.
6. A multiple junction interferometer according to claim 3 wherein said out-put means is an impedance having a value sufficient to operate said interfero-meter circuit in a non-latching mode.
7. A multiple junction interferometer according to claim 3 wherein said out-put means is an impedance having a value sufficient to operate said interfero-meter circuit in a latching mode.
8. A multiple junction interferometer circuit according to claim 4 wherein said each of said branches is connected to the midpoint of an inductive ele-ment, Lp has a value of inductance three times the value of L and, said maxi-mum Josephson current is twice as large as the currents in said remaining junctions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA305,240A CA1060958A (en) | 1975-06-30 | 1978-06-12 | Quantum interference josephson logic devices |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/592,000 US3978351A (en) | 1975-06-30 | 1975-06-30 | Quantum interference josephson logic devices |
| CA254,966A CA1044768A (en) | 1975-06-30 | 1976-06-16 | Quantum interference josephson logic devices |
| CA305,240A CA1060958A (en) | 1975-06-30 | 1978-06-12 | Quantum interference josephson logic devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1060958A true CA1060958A (en) | 1979-08-21 |
Family
ID=27164519
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA305,240A Expired CA1060958A (en) | 1975-06-30 | 1978-06-12 | Quantum interference josephson logic devices |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1060958A (en) |
-
1978
- 1978-06-12 CA CA305,240A patent/CA1060958A/en not_active Expired
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