CA1053380A - Lateral bipolar transistor - Google Patents
Lateral bipolar transistorInfo
- Publication number
- CA1053380A CA1053380A CA261,548A CA261548A CA1053380A CA 1053380 A CA1053380 A CA 1053380A CA 261548 A CA261548 A CA 261548A CA 1053380 A CA1053380 A CA 1053380A
- Authority
- CA
- Canada
- Prior art keywords
- emitter
- conductivity type
- zone
- emitter zone
- epitaxial layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000005036 potential barrier Methods 0.000 claims abstract description 22
- 239000004065 semiconductor Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 239000002800 charge carrier Substances 0.000 claims abstract description 16
- 150000002500 ions Chemical class 0.000 claims description 35
- 238000009792 diffusion process Methods 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 13
- 229910052698 phosphorus Inorganic materials 0.000 claims description 12
- 239000011574 phosphorus Substances 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 238000011282 treatment Methods 0.000 claims description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 8
- 238000009826 distribution Methods 0.000 claims description 8
- 230000000873 masking effect Effects 0.000 claims description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 6
- -1 phosphorus ions Chemical class 0.000 claims description 4
- 230000001133 acceleration Effects 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 239000002245 particle Substances 0.000 claims 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 239000000969 carrier Substances 0.000 abstract description 3
- 238000002513 implantation Methods 0.000 description 11
- 238000002347 injection Methods 0.000 description 10
- 239000007924 injection Substances 0.000 description 10
- 238000000407 epitaxy Methods 0.000 description 7
- 230000035515 penetration Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 3
- 238000003199 nucleic acid amplification method Methods 0.000 description 3
- 238000010276 construction Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000035876 healing Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000002045 lasting effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 230000002311 subsequent effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/735—Lateral transistors
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
Abstract of the Disclosure A lateral bipolar transistor has a semiconductor substrate of first conductivity type with an epitaxial layer arranged thereon of second conductivity type. Collector and emitter zones of first con-ductivity type are laterally arranged in the epitaxial layer. A base terminal contact zone connects with the epitaxial layer and a buried layer of second conductivity type is placed in the epitaxial layer below the emitter and collector zones. The buried layer has a doping concentration higher than the epitaxial layer so that a minority carrier current emanating from the emitter zone in a vertical direction is minimized. A doping profile of the emitter zone and portions of the base adjacent thereto is provided such that an additional potential barrier is created adjacent to and directly beneath the emitter zone in order to further minimize minority charge carriers emanating at a vertical direction from the emitter zone. The doping profile does not create any additional potential barrier in a lateral direction with respect to the emitter zone and the emanation of minority carriers from the emitter zone in a lateral direction is substantially uneffected.
Description
~L~533~
me invention relates to a lateral, bipolar transistor.
sipolar integrated circuits employ not only npn transistors of vertical construction, but also lateral, bipolar pnp transistors. For ;
many applicationsg however, lateral pnp transistors exhibit koo low a current amplification. This partly results since with a usual geometric arrangement the emitter injects charge carriers not only in th~ lateral direction towards the collector but also in the vertical direction. An undesired injection of this type leads to a higher base current and ;
consequently to a ~ower current amplification.
It is kno~n to reduce the vertical injection of charge carriers by the use of a buried layer with its associated electric field. In the publication "Schottky diodes make IC scenet', Electronics July 21, 1969, p. 74 - 8~, on page 79 a lateral pnp transistor of this type with a buried layer is illustrated. However, e~en with these transistors, the problem of the injection of charge carriers in the vertical direction remains~
It is an object of the invention to provide a lateral, bipolar tr~nsistor in which there is no injection of charge carriers in a vertical direction from the emitter.
This object is realized by a lateral, bipolar transistor in which a doping profile within and through the emitter zone creates a potential barrier for minority charge carriers emanating from the emitter zone in a vertical direction, yet has no effect upon and does not create an additional potential barrier for minority charge carriers emanating ~`
from the emitter zone in a lateral direction. me potential barrier is created by an ion impIantation and temperature treatment of donor ions .
introduced into the emi~ter zone such that a region of conductivity type which is the same as the base region but of higher concentration lS
created directly beneath the emitter zone. By preventing the donor ions . - ~
:
.
-~ 33f~
from diffusing laterally outside of the emitter zone, an additional potential ;
barrier is not created ~or minority carriers emanating laterally from the emitter zone.
It is a fundamental advantage of the transistors of this invention in that they exhibit a higher current amplification than corresponding transistors of the prior art. ;
Preferably the diffusion and ion implantation steps necessary for ;
the production of a transistor in accordance with the inven~ion are carried out through the same masking window.
Thus, in accordance with one aspect of the invention there is provided a lateral bipolar transistor, comprising:
a) a semiconductor substrate of first conductivity type;
b) an epitaxial layer of second conductivity type opposite to the first conductivity type arranged on the substrate;
c) collector and emitter zones of first conductivity type laterall~
arranged in the epitaxial layer, d) a base terminal contact zone on the epitaxial layer;
e) a buried layer of second conductivity type in said epitaxial layer beneath said emitter and collector zones and having a doping concentration 0 higher than the epitaxial layer; and f) a doping profile of said emitter zone and adjacent portions of said epitaxial layer to said emitter zone providing no additional potential barrier in a lateral direction from the emitter zone and in the vertical . ', ' .~'. .
direction providing an additional potential barrier for minority charge carriers emanating from the emitter zone in a vertical direction.
In accordance with another aspect of the invention there is pro-vided a method for producing a lateral bipolar transistor having a semi-conductor substrate of first conductivity type, an epitaxial layer arranged thereon of a second opposite conductivity type, lateral base and emitter , - .
~ ~ -2-5 ~533~
zones in said epitaxial layer, and a buried layer of second conductivity type benea-th said base and emitter zones in said epitaxial layer, comprising the steps of:
a) ion implanting acceptor or donor ions down into the emitter zone;
b) temperature treating the implanted ions to cause diffusion extend-ing beyond the emitter zone in the vertical direction and not beyond the emitter zone in the lateral direction..
The invention will now be further described in conjunction with the accompanying drawings, in which:
Figure 1 is a side cross-sectional view of a lateral pnp transistor of the prior art;
Figure 2 illustrates doping profiles at the emitter in accordance with the invention in the lateral direction;
Figure 3 illustrates doping profiles at the emitter in accordance with the invention in the vertical direction, and Figure 4 illustrates a comparison between the doping profile at and between the emitter without implantation, and the doping profile in accordance with the invention with deep implantation in the vertical direction.
In the following, the construction of a lateral bipolar pnp trans-istor known in the prior art will first be described with refercnce to Figure 1. On the p~substrate 1, which is preferably a substrate consisting of silicon, an n-conducting epitaxy layer 2 is applied in which isolation diffusions 3 are arranged in order to electrically insulate individual transistors from one anotherO Preferably these separating diffusions are p doped wi~hin the n-conducting epitaxy layer 2~ Arranged in the epitaxy layer 2 are the preferably p doped collector zone 4 with the terminal 41, the preferably p+ doped emitter zone S with the terminal 51, and the preer-ably n doped base contact 6 with the terminal 61. As " . ~
~,~
-2a-3~lO
shown in the Figure, for example, the collector zone 4 is arranged in the shape of a ring around the emitter ~one 5. me preferably n+ doped buried layer 7 is arranged beneath the zones 4, 5 and 6, between the epitaxy layer -
me invention relates to a lateral, bipolar transistor.
sipolar integrated circuits employ not only npn transistors of vertical construction, but also lateral, bipolar pnp transistors. For ;
many applicationsg however, lateral pnp transistors exhibit koo low a current amplification. This partly results since with a usual geometric arrangement the emitter injects charge carriers not only in th~ lateral direction towards the collector but also in the vertical direction. An undesired injection of this type leads to a higher base current and ;
consequently to a ~ower current amplification.
It is kno~n to reduce the vertical injection of charge carriers by the use of a buried layer with its associated electric field. In the publication "Schottky diodes make IC scenet', Electronics July 21, 1969, p. 74 - 8~, on page 79 a lateral pnp transistor of this type with a buried layer is illustrated. However, e~en with these transistors, the problem of the injection of charge carriers in the vertical direction remains~
It is an object of the invention to provide a lateral, bipolar tr~nsistor in which there is no injection of charge carriers in a vertical direction from the emitter.
This object is realized by a lateral, bipolar transistor in which a doping profile within and through the emitter zone creates a potential barrier for minority charge carriers emanating from the emitter zone in a vertical direction, yet has no effect upon and does not create an additional potential barrier for minority charge carriers emanating ~`
from the emitter zone in a lateral direction. me potential barrier is created by an ion impIantation and temperature treatment of donor ions .
introduced into the emi~ter zone such that a region of conductivity type which is the same as the base region but of higher concentration lS
created directly beneath the emitter zone. By preventing the donor ions . - ~
:
.
-~ 33f~
from diffusing laterally outside of the emitter zone, an additional potential ;
barrier is not created ~or minority carriers emanating laterally from the emitter zone.
It is a fundamental advantage of the transistors of this invention in that they exhibit a higher current amplification than corresponding transistors of the prior art. ;
Preferably the diffusion and ion implantation steps necessary for ;
the production of a transistor in accordance with the inven~ion are carried out through the same masking window.
Thus, in accordance with one aspect of the invention there is provided a lateral bipolar transistor, comprising:
a) a semiconductor substrate of first conductivity type;
b) an epitaxial layer of second conductivity type opposite to the first conductivity type arranged on the substrate;
c) collector and emitter zones of first conductivity type laterall~
arranged in the epitaxial layer, d) a base terminal contact zone on the epitaxial layer;
e) a buried layer of second conductivity type in said epitaxial layer beneath said emitter and collector zones and having a doping concentration 0 higher than the epitaxial layer; and f) a doping profile of said emitter zone and adjacent portions of said epitaxial layer to said emitter zone providing no additional potential barrier in a lateral direction from the emitter zone and in the vertical . ', ' .~'. .
direction providing an additional potential barrier for minority charge carriers emanating from the emitter zone in a vertical direction.
In accordance with another aspect of the invention there is pro-vided a method for producing a lateral bipolar transistor having a semi-conductor substrate of first conductivity type, an epitaxial layer arranged thereon of a second opposite conductivity type, lateral base and emitter , - .
~ ~ -2-5 ~533~
zones in said epitaxial layer, and a buried layer of second conductivity type benea-th said base and emitter zones in said epitaxial layer, comprising the steps of:
a) ion implanting acceptor or donor ions down into the emitter zone;
b) temperature treating the implanted ions to cause diffusion extend-ing beyond the emitter zone in the vertical direction and not beyond the emitter zone in the lateral direction..
The invention will now be further described in conjunction with the accompanying drawings, in which:
Figure 1 is a side cross-sectional view of a lateral pnp transistor of the prior art;
Figure 2 illustrates doping profiles at the emitter in accordance with the invention in the lateral direction;
Figure 3 illustrates doping profiles at the emitter in accordance with the invention in the vertical direction, and Figure 4 illustrates a comparison between the doping profile at and between the emitter without implantation, and the doping profile in accordance with the invention with deep implantation in the vertical direction.
In the following, the construction of a lateral bipolar pnp trans-istor known in the prior art will first be described with refercnce to Figure 1. On the p~substrate 1, which is preferably a substrate consisting of silicon, an n-conducting epitaxy layer 2 is applied in which isolation diffusions 3 are arranged in order to electrically insulate individual transistors from one anotherO Preferably these separating diffusions are p doped wi~hin the n-conducting epitaxy layer 2~ Arranged in the epitaxy layer 2 are the preferably p doped collector zone 4 with the terminal 41, the preferably p+ doped emitter zone S with the terminal 51, and the preer-ably n doped base contact 6 with the terminal 61. As " . ~
~,~
-2a-3~lO
shown in the Figure, for example, the collector zone 4 is arranged in the shape of a ring around the emitter ~one 5. me preferably n+ doped buried layer 7 is arranged beneath the zones 4, 5 and 6, between the epitaxy layer -
2 and the substrate 1. The function of this layer is to reduce an injection ~ ;
of charge carriers emanating from the emitter zone 5 in the vertical direction into the substrate 1.
The following observation led to the invention. When voltages are connected, a specific hole concentration occurs at the edge of the emitter-base junction~ that is the junction between the zone 5 and the epitaxy layer 2 me current flow basically occurs by diffusion in accordance with the concentration gradient in the epitaxy layer. Normally this gradient is ;
greatestin the actual base zone between the emitter zone 5 and the collector zone 4, and therefore in the lateral direction In the vertical direction, the gradient is determined by the recombination in the epitaxy layer 2 and in the buried layer 7, and by the electric field which has formed as a result of the buried layer. The vertical overall current also becomes significant ~-since the injecting area 53 of the zone 5 is considerably larger than the area 52 which governs the lateral injection from the zone 5. In accordance `;
with the invention, it is now proposed that the vertical gradient be reduced ~`~
by increasing the potential barrier below the emitter zone.
Figures 2 and 3 illustrate doping concentration curves corresponding to the invention in the lateral and the vertical direction. Here the curves 8 and 81 relate to the p doping of the emitter, which is preferably a boron doping, and curves 9 and 91 relate to the implanted n-type donor atoms which are preferably phosphorus atoms. As can be seen from these curves 9 and 91, the doping process of the invention produces a higher potential barrier for `~- `
the vertical injection than for the lateral injection. As a result, the ;
injection of minority carriers through the higher potential barrier in the ~ -vertical direction is impeded. Preferably~ in the doping process of the ~_ ~,. ' ~533~
invention, the potential barriers shown in Figures 2 and 3 are produced in that donor ions, for example phosphorus ions, are implanted into the emitter zone 5 with the aid of the ion implantation process with sufficiently high energy so that the maximum point of the implantation distribution lies inside the semiconductor at a predetermo~led dist~nce from the surface. The temper-ature treatmen~s which follow in the remainder of the production process are selected to be such that the diffusion fronts of the implantation clearly move further away from the surface in the vertical direction than they do in the lateral direction from the edges 54 of the masking oxide. This ensures that in the vertical direction the implantation diffuses beyond the emitter diffusion front which has diffused through the same oxide window, whereas in the la~eral direction the implantation does not diffuse beyond the emitter diffusion front which has diffused through the oxide window. Thus the doping process in accordance with the invention results in a higher potential barrier only for the vertical injection. Figure 2 shows that the doping profile 9 is located within the doping profile 8 which represents the emitter zone 5.
Figure 3 on the other hand indicates that in the vertical direction the doping profile 91 e~tends beyond the doping profile 81 which represents the emitter ~one in the vertical direction, so that a potential barrier is formed in the vertical direction below the emitter zone.
me implantation can be effected, for example, with phosphorus at an acceleration voltage of approx. 400 kV. mis leads to a penetration depth of 0.5 ~ m before the succeeding temperature treatments.
As an illustration of the process in accordance with the invention, Figure 4 shows the entire doping profile in the vertical direction. Com-mencing from the surface of the emitter zone 5, first the p-type doping concentration represented by the curve 81 prevails i.e. the concentration +
of the p doped zone 5. In con~entional transistors, this concentration 81 -- is followed by the doping concentration, represented by the curve arms 92 .
~ ::
~0~33~0 and 93, of the n-epitaxial layer 2. The process in accordance with the invention alters the doping profile 92 in such manner that it is replaced by the doping profile 94 which, within the n~epitaxial layer 2, extends in front of the p-doped emitter zone 5, and supplies a potential barrier produced by the high n-concentration.
In the production of a lateral bipolar npn transistor in accordance with the invention, charge carriers of the opposite type to those in the case of the above described pnp transistor are introduced into the corresponding zones of the transistor.
In the following an exemplary embodiment for the production of a -lateral pnp transistor will be described.
First, n-type donor ions, preferably phosphorus ions in a dose of approximately 10 /cm 2, are implanted into the opening 54 of the arrangement in Figure 1 at an acceleration voltage of approx. 400 kV. The remaining ~ones `~
of the arrangement are covered by a mask. The penetration depth of the phosphorus ions amounts to approx. 0~5 ~Im. After the implantation~ a tem-perature treatment is carried out at, for example, 1150 C, for a time duration of approximately 30 minutes for purposes of healing and driving in further the phosphorus implantation. With the aid of this temperature step it is ensured that, together with succeeding temperature steps, the requisite pen-etration depth for the phosphorus implantation is reached. ~ `
Then, the emitter zone 5 and the collector zone 4 are produced in known manner by diffusion. For this purpose, the surfaces of the zone 5 and of the zone 4 are covered with boron using a masking technique. In the sub-sequent temperat~re treatment at approximately 1100 C lasting for approximate ly 45 minutes, boron diffuses out of the boron coating into the zones 4 and 5, whereby the emitter zone and the collector zone are formed~ The production by diffusion of the base terminal zone 6 is correspondingly effected by cover- -- ing the surface of the zone 6 with phosphorus and a subsequent temperature _5_ ,'~
1~:?533t~
treatment at approximately 1000 C, for a duration of approximately 60 minutes.
When the surface of the zone 6 is covered with phosphorus, the surface of the remaining semiconductor arrangement is protected by a mask. Correspond-ingly, when the surfaces of the zones 4 and 5 are covered with boron, the remainder of the semiconductor arrangement is protected by a mask.
In the described process, the emitter zone and the collector zone have a thickness of approximately 1.3 /um. As a result of the temperature treatments carried out in the production of these two zones, the penetration depth for the phosphorus implantation is up to approximately 1.5 ~ m. in the z-direction.
Although various minor modifications may be suggested by those `~
versed in the art, it should be understood that I wish to embody within the scope of the patent warranted hereon, all such embodiments as reasonably and properly come within the scope of my contribution to the art.
of charge carriers emanating from the emitter zone 5 in the vertical direction into the substrate 1.
The following observation led to the invention. When voltages are connected, a specific hole concentration occurs at the edge of the emitter-base junction~ that is the junction between the zone 5 and the epitaxy layer 2 me current flow basically occurs by diffusion in accordance with the concentration gradient in the epitaxy layer. Normally this gradient is ;
greatestin the actual base zone between the emitter zone 5 and the collector zone 4, and therefore in the lateral direction In the vertical direction, the gradient is determined by the recombination in the epitaxy layer 2 and in the buried layer 7, and by the electric field which has formed as a result of the buried layer. The vertical overall current also becomes significant ~-since the injecting area 53 of the zone 5 is considerably larger than the area 52 which governs the lateral injection from the zone 5. In accordance `;
with the invention, it is now proposed that the vertical gradient be reduced ~`~
by increasing the potential barrier below the emitter zone.
Figures 2 and 3 illustrate doping concentration curves corresponding to the invention in the lateral and the vertical direction. Here the curves 8 and 81 relate to the p doping of the emitter, which is preferably a boron doping, and curves 9 and 91 relate to the implanted n-type donor atoms which are preferably phosphorus atoms. As can be seen from these curves 9 and 91, the doping process of the invention produces a higher potential barrier for `~- `
the vertical injection than for the lateral injection. As a result, the ;
injection of minority carriers through the higher potential barrier in the ~ -vertical direction is impeded. Preferably~ in the doping process of the ~_ ~,. ' ~533~
invention, the potential barriers shown in Figures 2 and 3 are produced in that donor ions, for example phosphorus ions, are implanted into the emitter zone 5 with the aid of the ion implantation process with sufficiently high energy so that the maximum point of the implantation distribution lies inside the semiconductor at a predetermo~led dist~nce from the surface. The temper-ature treatmen~s which follow in the remainder of the production process are selected to be such that the diffusion fronts of the implantation clearly move further away from the surface in the vertical direction than they do in the lateral direction from the edges 54 of the masking oxide. This ensures that in the vertical direction the implantation diffuses beyond the emitter diffusion front which has diffused through the same oxide window, whereas in the la~eral direction the implantation does not diffuse beyond the emitter diffusion front which has diffused through the oxide window. Thus the doping process in accordance with the invention results in a higher potential barrier only for the vertical injection. Figure 2 shows that the doping profile 9 is located within the doping profile 8 which represents the emitter zone 5.
Figure 3 on the other hand indicates that in the vertical direction the doping profile 91 e~tends beyond the doping profile 81 which represents the emitter ~one in the vertical direction, so that a potential barrier is formed in the vertical direction below the emitter zone.
me implantation can be effected, for example, with phosphorus at an acceleration voltage of approx. 400 kV. mis leads to a penetration depth of 0.5 ~ m before the succeeding temperature treatments.
As an illustration of the process in accordance with the invention, Figure 4 shows the entire doping profile in the vertical direction. Com-mencing from the surface of the emitter zone 5, first the p-type doping concentration represented by the curve 81 prevails i.e. the concentration +
of the p doped zone 5. In con~entional transistors, this concentration 81 -- is followed by the doping concentration, represented by the curve arms 92 .
~ ::
~0~33~0 and 93, of the n-epitaxial layer 2. The process in accordance with the invention alters the doping profile 92 in such manner that it is replaced by the doping profile 94 which, within the n~epitaxial layer 2, extends in front of the p-doped emitter zone 5, and supplies a potential barrier produced by the high n-concentration.
In the production of a lateral bipolar npn transistor in accordance with the invention, charge carriers of the opposite type to those in the case of the above described pnp transistor are introduced into the corresponding zones of the transistor.
In the following an exemplary embodiment for the production of a -lateral pnp transistor will be described.
First, n-type donor ions, preferably phosphorus ions in a dose of approximately 10 /cm 2, are implanted into the opening 54 of the arrangement in Figure 1 at an acceleration voltage of approx. 400 kV. The remaining ~ones `~
of the arrangement are covered by a mask. The penetration depth of the phosphorus ions amounts to approx. 0~5 ~Im. After the implantation~ a tem-perature treatment is carried out at, for example, 1150 C, for a time duration of approximately 30 minutes for purposes of healing and driving in further the phosphorus implantation. With the aid of this temperature step it is ensured that, together with succeeding temperature steps, the requisite pen-etration depth for the phosphorus implantation is reached. ~ `
Then, the emitter zone 5 and the collector zone 4 are produced in known manner by diffusion. For this purpose, the surfaces of the zone 5 and of the zone 4 are covered with boron using a masking technique. In the sub-sequent temperat~re treatment at approximately 1100 C lasting for approximate ly 45 minutes, boron diffuses out of the boron coating into the zones 4 and 5, whereby the emitter zone and the collector zone are formed~ The production by diffusion of the base terminal zone 6 is correspondingly effected by cover- -- ing the surface of the zone 6 with phosphorus and a subsequent temperature _5_ ,'~
1~:?533t~
treatment at approximately 1000 C, for a duration of approximately 60 minutes.
When the surface of the zone 6 is covered with phosphorus, the surface of the remaining semiconductor arrangement is protected by a mask. Correspond-ingly, when the surfaces of the zones 4 and 5 are covered with boron, the remainder of the semiconductor arrangement is protected by a mask.
In the described process, the emitter zone and the collector zone have a thickness of approximately 1.3 /um. As a result of the temperature treatments carried out in the production of these two zones, the penetration depth for the phosphorus implantation is up to approximately 1.5 ~ m. in the z-direction.
Although various minor modifications may be suggested by those `~
versed in the art, it should be understood that I wish to embody within the scope of the patent warranted hereon, all such embodiments as reasonably and properly come within the scope of my contribution to the art.
Claims (14)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A lateral bipolar transistor, comprising:
a) a semiconductor substrate of first conductivity type;
b) an epitaxial layer of second conductivity type opposite to the first conductivity type arranged on the substrate;
c) collector and emitter zones of first conductivity type laterally arranged in the epitaxial layer;
d) a base terminal contact zone on the epitaxial layer;
e) a buried layer of second conductivity type in said epitaxial layer beneath said emitter and collector zones and having a doping concentration higher than the epitaxial layer; and f) a doping profile of said emitter zone and adjacent portions of said epitaxial layer to said emitter zone providing no additional potential barrier in a lateral direction from the emitter zone and in the vertical direction providing an additional potential barrier for minority charge carriers emanating from the emitter zone in a vertical direction.
a) a semiconductor substrate of first conductivity type;
b) an epitaxial layer of second conductivity type opposite to the first conductivity type arranged on the substrate;
c) collector and emitter zones of first conductivity type laterally arranged in the epitaxial layer;
d) a base terminal contact zone on the epitaxial layer;
e) a buried layer of second conductivity type in said epitaxial layer beneath said emitter and collector zones and having a doping concentration higher than the epitaxial layer; and f) a doping profile of said emitter zone and adjacent portions of said epitaxial layer to said emitter zone providing no additional potential barrier in a lateral direction from the emitter zone and in the vertical direction providing an additional potential barrier for minority charge carriers emanating from the emitter zone in a vertical direction.
2. The transistor of claim 1 in which the emitter zone includes ion implanted donor ions of second conductivity type, the doping concentration of these donor ions not extending in the direction of the collector beyond the edges of a masking oxide surrounding the emitter zone, and in the vertical direction the donor ions extending beyond a bottom edge of the emitter zone to create said additional potential barrier for the minority charge carriers emerging in the vertical direction.
3. The transistor of claim 2, characterized in that the substrate is a p-doped silicon substrate, that the epitaxial layer is n-doped, that the buried layer is n+ doped, that the base contact is n+ doped, that the collector zone and the emitter zone are p+ doped, and that n-type phosphorus ions are introduced as said donor ions.
4. A lateral bipolar transistor, comprising:
a) a semiconductor substrate of first conductivity type;
b) a layer of second conductivity type opposite to the first conducti-vity type arranged on the substrate as a base;
c) collector and emitter zones of first conductivity type laterally arranged in an upper face of said layer, a weak potential barrier being formed by the junction of the emitter zone and base for minority charge carriers emanating from said emitter zone;
d) a buried layer of second conductivity type in said layer beneath said collector and emitter zones having a doping concentration higher than te layer; and e) an additional strong potential barrier below and adjacent said emitter zone and above said buried layer for reducing minority charge carrier flow emanating from the emitter zone in a vertical direction, the minority charge carriers emanating in a lateral direction from said emitter zone being substantially uneffected by said additional barrier.
a) a semiconductor substrate of first conductivity type;
b) a layer of second conductivity type opposite to the first conducti-vity type arranged on the substrate as a base;
c) collector and emitter zones of first conductivity type laterally arranged in an upper face of said layer, a weak potential barrier being formed by the junction of the emitter zone and base for minority charge carriers emanating from said emitter zone;
d) a buried layer of second conductivity type in said layer beneath said collector and emitter zones having a doping concentration higher than te layer; and e) an additional strong potential barrier below and adjacent said emitter zone and above said buried layer for reducing minority charge carrier flow emanating from the emitter zone in a vertical direction, the minority charge carriers emanating in a lateral direction from said emitter zone being substantially uneffected by said additional barrier.
5. The transistor of claim 4 in which said additional potential barrier means comprises a region of second conductivity type, and concentration level higher than that of said base, said region being directly adjacent and only below said emitter zone.
6. A method for producing a lateral bipolar transistor having a semiconductor substrate of first conductivity type, an epitaxial layer arranged thereon of a second opposite conductivity type, lateral base and emitter zones in said epitaxial layer, and a buried layer of second conduc-tivity type beneath said base and emitter zones in said epitaxial layer, comprising the steps of:
a) ion implanting donor ions down into the emitter zone;
b) temperature treating the implanted ions to cause diffusion more ver-tically than laterally, a front of the diffusion extending beyond the emitter zone in the vertical direction and not beyond the emitter zone in the lateral direction.
a) ion implanting donor ions down into the emitter zone;
b) temperature treating the implanted ions to cause diffusion more ver-tically than laterally, a front of the diffusion extending beyond the emitter zone in the vertical direction and not beyond the emitter zone in the lateral direction.
7. The method of claim 6, characterized in that the ion implanting is effected through an oxide window through which a diffusion of the emitter zone also occurs.
8. The method of claim 6 including the steps of implanting phosphorus by said step of ion implanting through an oxide window into the emitter zone in a dose of 1012/cm-2 and with an acceleration voltage of 400 kV, that the temperature treating step comprises a temperature treatment at approximately 1150°C for a duration of approximately 30 minutes and that in another process step, the emitter zone and the collector zone are produced by a boron diffu-sion, the remaining surface of the semiconductor arrangement being protected by a mask, that a temperature treatment is then carried out at approximately 1100°C for approximately 45 minutes, that subsequently the base terminal zone is produced with a phosphorus diffusion, the remainder of the surface of the arrangement being protected by a masking layer, and that subsequently a tem-perature treatment is carried out at approximately 1000°C for approximately 60 minutes.
9. The transistor of claim 1 in which the emitter zone includes ion implanted acceptor ions of second conductivity type, the doping concentration of these acceptor ions not extending in the direction of the collector beyond the edges of a masking oxide surrounding the emitter zone, and in the vertical direction the acceptor ions extending beyond a bottom edge of the emitter zone to create said additional potential barrier for the minority charge carriers emerging in the vertical direction.
10. A method for producing a lateral bipolar transistor having a semiconductor substrate of first conductivity type, an epitaxial layer arranged thereon of a second opposite conductivity type, lateral base and emitter zones in said epitaxial layer, and a buried layer of second conduc-tivity type beneath said base and emitter zones in said epitaxial layer, comprising the steps of:
a) ion implanting acceptor ions down into the emitter zone;
b) temperature treating the implanted ions to cause diffusion extending beyond the emitter zone in the vertical direction and not beyond the emitter zone in the lateral direction.
a) ion implanting acceptor ions down into the emitter zone;
b) temperature treating the implanted ions to cause diffusion extending beyond the emitter zone in the vertical direction and not beyond the emitter zone in the lateral direction.
11. A method for producing a lateral bipolar transistor having a semiconductor substrate of first conductivity type, an epitaxial layer arranged thereon of a second opposite conductivity type, lateral base and emitter zones in said epitaxial layer, and a buried layer of second conduc-tivity type beneath said base and emitter zones in said epitaxial layer, comprising the steps of:
a) ion implanting donor ions into the emitter zone producing in the epitaxial layer at a distance from the semiconductor surface a maximum of distribution of said ions;
b) temperature treating to cause this front of the distribution of said ions being more distant from the surface of the layer to be positioned beyond the emitter zone in the vertical direction but not in the lateral direction.
a) ion implanting donor ions into the emitter zone producing in the epitaxial layer at a distance from the semiconductor surface a maximum of distribution of said ions;
b) temperature treating to cause this front of the distribution of said ions being more distant from the surface of the layer to be positioned beyond the emitter zone in the vertical direction but not in the lateral direction.
12. A method for producing a lateral bipolar transistor having a semiconductor substrate of first conductivity type, an epitaxial layer arranged thereon of a second opposite conductivity type, lateral base and emitter zones in said epitaxial layer, and a buried layer of second conduc-tivity type beneath said base and emitter zones in said epitaxial layer, comprising the steps of:
a) ion implanting acceptor ions into the emitter zone producing in the epitaxial layer at a distance from the semiconductor surface a maximum of distribution of said ions;
b) temperature treating to cause this front of the distribution of said ions being more distant from the surface of the layer to be positioned beyond the emitter zone in the vertical direction but not in the lateral direction.
a) ion implanting acceptor ions into the emitter zone producing in the epitaxial layer at a distance from the semiconductor surface a maximum of distribution of said ions;
b) temperature treating to cause this front of the distribution of said ions being more distant from the surface of the layer to be positioned beyond the emitter zone in the vertical direction but not in the lateral direction.
13. The method of producing an emitter and a potential barrier beneath the emitter in a lateral bipolar transistor in a semiconductor body compris-ing the steps of:
a) ion implanting doping particles through a masking window positioned on a surface of said semiconductor body and into a region of said semicon-ductor body, said implanting causing a distribution of said doping particles in said region, said doping particles having a conductivity type which is the same as the conductivity type of the semiconductor body in and around said region;
b) producing the emitter zone by opposite conductivity type doping through said masking window and by temperature caused diffusion whereby a front of the emitter doping is not positioned in a vertical direction beyond a front of the distribution of the implanted particles, and is positioned beyond the front of the implanted particles in a lateral direction.
a) ion implanting doping particles through a masking window positioned on a surface of said semiconductor body and into a region of said semicon-ductor body, said implanting causing a distribution of said doping particles in said region, said doping particles having a conductivity type which is the same as the conductivity type of the semiconductor body in and around said region;
b) producing the emitter zone by opposite conductivity type doping through said masking window and by temperature caused diffusion whereby a front of the emitter doping is not positioned in a vertical direction beyond a front of the distribution of the implanted particles, and is positioned beyond the front of the implanted particles in a lateral direction.
14. The method of claim 13 characterized by the step of temperature treating said semiconductor body to cause broadening of the distribution of the implanted doping particles before producing the emitter zone.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19752541907 DE2541907C3 (en) | 1975-09-19 | 1975-09-19 | Method for manufacturing a lateral transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1053380A true CA1053380A (en) | 1979-04-24 |
Family
ID=5956946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA261,548A Expired CA1053380A (en) | 1975-09-19 | 1976-09-20 | Lateral bipolar transistor |
Country Status (6)
| Country | Link |
|---|---|
| CA (1) | CA1053380A (en) |
| CH (1) | CH610442A5 (en) |
| DE (1) | DE2541907C3 (en) |
| FR (1) | FR2325198A1 (en) |
| GB (1) | GB1559873A (en) |
| IT (1) | IT1070809B (en) |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3766446A (en) * | 1969-11-20 | 1973-10-16 | Kogyo Gijutsuin | Integrated circuits comprising lateral transistors and process for fabrication thereof |
-
1975
- 1975-09-19 DE DE19752541907 patent/DE2541907C3/en not_active Expired
-
1976
- 1976-08-02 GB GB3209576A patent/GB1559873A/en not_active Expired
- 1976-08-23 CH CH1065076A patent/CH610442A5/en not_active IP Right Cessation
- 1976-09-13 FR FR7627473A patent/FR2325198A1/en active Granted
- 1976-09-16 IT IT2724776A patent/IT1070809B/en active
- 1976-09-20 CA CA261,548A patent/CA1053380A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2541907A1 (en) | 1977-03-24 |
| DE2541907B2 (en) | 1978-03-02 |
| GB1559873A (en) | 1980-01-30 |
| IT1070809B (en) | 1985-04-02 |
| DE2541907C3 (en) | 1978-10-26 |
| FR2325198A1 (en) | 1977-04-15 |
| CH610442A5 (en) | 1979-04-12 |
| FR2325198B1 (en) | 1979-09-28 |
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