CA1050606A - Dual mode control logic for a multi-mode copier/duplicator - Google Patents

Abstract

DUAL MODE CONTROL LOGIC FOR A
MULTI-MODE COPIER/DUPLICATOR

Abstract of the Disclosure An automatic reproducing machine includes means for detecting a trailing edge of the document original being scan-ned and generating a trailing edge signal and means responsive to the trailing edge signal for cycling out the copying opera tion of the machine. The machine may also include means for sensing the trailing edge of the copy sheets for copying the document original and means for enabling the machine to cycle out its operation in predetermined intervals of different time duration after detection of the trailing edge signals depend-ing upon the order in which the two trailing edge signals are detected.

Description

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FIELD OF THE INVENTION
This invention relates to a copier/duplicator machine designed to operate in different modes and more particularly, to a control apparatus which enables the machine to change from one mode to another automatically once mode change is started.

BACKGROUND OF THE INVENTION
-. Use of control circuitry for generating signals necessary to operate various devices or control elements in a machine is generally known. For example~ xerographic copier/duplicator machines based on Chester Carlsonls invention in the electro-stato~raphic copying principles usually includes control means for implementing various steps involved in making xerographic copies; for example, means for charging a photosensitive insulat-ing layer, imagewise exposing the layer, developing the image ;- with toner, transferring the image on a sheet of paper, remov-~ ing the sheet, heat fusing the transferred image on the sheet, ::.
~-~ and cleaning the layer for sub~equent use, etc. The means for achieving these steps include certain controlled elements for ` ` 20 implementing the varlous xerographic processing steps, for '.- example, m ans responsive to a signal for actuating the main `~ drive motor of the machine, common generating means or charging the photosensitive insulating layer or transferring the image on the layer onto the transfer sheet or copy paper, magnetic brush means for cleaning the layer~ scanner carriage and optical scanning means for projecting the image of the original onto . ` the photosensi~ive insulating layer, jam detection means, etc.
- The machine is usually provided with a suitable control logic circuitry for generating appropria$e signals requ.ired to actuate ; 30 or energize.
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the various controlled elemen-l~ in a timed sequence so ^that ; th~ xerographic steps are properly implemented.
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Heretofore, generally the copier/duplicator was designed to operate in a single mode in making copies of the original. For example, the -typical machine was designed so that it5 optical scanning arr~ngment moved past an original in a stationary position, or in the alternative, the scanning arrangement was held in a fixed or a s~ationary position while the document original is fed past the scanning arrangement F~ ;' 10 in making copies up to a certain size. Such machines had an ':1 ~ inherent limitation, in that, for example, they were capable `- of making copies only up to certain given size, such as legal size paper (8 1/2" x 14"), but not capable of making copies ; on a sheet which is larger than this given size.
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More recently, however, there has developed a copier/duplicator machine which is capable of operating in more than one mode of operation for making copies of different sizes. An example of such a machine i~ described in detail in the copending case, Canadian application Serial No. 163,550 ~0 iled on Fe~ruary 12, 1973 and U.5. Patent No. 3,900,258 issued August 1~, 1975, both assigned to the same assignee :
~ as the present învention. As described in the application and ;,~ ` patent, the machine is designed so that in a first or base ~`
mode of operation a moving optical scanning means i5 used in ., , scanning a stationary original and in a second or LDC mode of operation the scanning arrangement is stationary and the document original is moved past a scanning ~tation by a docu-- ment feeding means. The machine is designed so thatl in the '~ base mode, it can make copies in normal letter size~ le.g-, 8 1/2'l x 11"~ and up to the legal size (e.g.~ 8 1~2" x 14") and in the LDC mode or Large Document Copy model copies up to ,, ~ ~ 2 -, ~ .

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14" x 18" can be made.
S UMMARY OF TEIIE I NVF.NT I ON
.. In accordance with one aspect of this invention there is provided a reproducing machine for making a copy of an original document on a copy shleet comprising: a photosensitive surface; a plurality of process step implementing means for making a copy including, means for charging said surface, means for exposing said surface to an image of said original document, said ~xposure means including means for moving said document and means for viewing said moving document for project-ing an image thereof onto said photosensitive surface to form a latent electrostatic image thereon, means for developing said .
latent electrostatic image, and means for feeding said copy sheet; a plurality of device control elements associated with said process step implementing means; control means for actuating said plurality of device control elements in a timed manner to implement the machine process steps required for maXing the copies; means for sensing the trailing edge of the moving document original and for generating a signal indicative of the trailing edge; means for sensing the trailing edge of .~: the copy sheet and for generating a signal indicative of the :
copy sheet trailing edge; and means responsive to said document original t~ailing edge signal and said copy sheet trailing edge signal including logic circuit means for enabling said machine `~ . to cycle out and stop its copying operation in predetermined " .
: intervals of different time duration after detection of the document original and copy sheet trailing edge signals depend-~: ing upon the order in which said trailing edge signals are de-tected.

~ 3 ~, This inve~ltion will be ma~ clearer from thc following detailed description of an ill~ls-trative embodiment of the present invention in conjunction wi-th the accompanying drawings, in which:
igure 1 shows a fron~al schematic view o~ a copier/
duplicator in which control cireuitry according to the present invention may be utilized.
Figure 2 shows a schematic top view of an auxiliary doeu-ment original feeder that may be used as an accessory to the base maehine when the maehine is operated in the auxiliary or ~ ~ LDC mode.
', Figure 3 shows a perspeetive sehematic view of the maehine .

that shows eertain switches and operator controlled elements involved in the mode ehanging opexation of the machine.
Figure 4 shows a funetional bloek diagram of the control .~ .
, apparatus of the present invention.

`, Figure S shows a funetional bloek diagram of base logie :,- .
that may be used for the base mode of operation of the eontrol -~ apparatus.
: , - 20 Figures 6 - 11 when eombined in the form of Figure 12, `~ ~ show the auxiliary control eireuitry in detail~

Figure 13 shows an operational flow ehart helpful in des-- eribing and understanding the operation of the eontrol apparatus providing a mode ehanging operation from the base to the LDC
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~ Figure 14 shows another operational flow ehart helpful in . _ _ ~ describing and understanding the operation of the eontrol . : .
- apparatus and ~arious el~ments of the eopier/duplieator maehine when the same is operating in the LDC mode.

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i _igure 15 shows an operational flo~ ch~rt helpful . in descri.bing and understanding the operation of che control .~ apparatus.
Figure 16 shows a portion of the logic redrawn to show the interrelationship of the LIGHT ORIGINAL and PRINT
button and the LDC logic.

. DESCRIPTION OF THE ILLUSTRATIVE

,~ EMBODIMENT OF THE PRE:SENT NVENTION
. The control circuitry of the present invention will be described in the context of xerographic copier/duplicator machine of a specific design. However, it should be noted . from the outset that although the description is in the context .. - of the xerographic machine, the scope of the present invention is not limited to the xerographic machine~ Clearly as will . be evident from the following description, the principles of .~ : the present invention can be applied ~o other types of machines having similar operational r~quirements. Now re~
ferring to the drawings, as shown in Figure 1, a xerographic copier/duplicator machine typically includes various elements 20 for implementing xerographic steps. It comprises a drum 10 that may be driven clockwise about an axis 11. The drum in-cludes a photosensitive insulating layer surface 12 around the periphery of which various controlled elements are ~7 ~ situated; namely, charying means A, imagewise exposing means ~. ~
~:: B, developing means C, image transfer D, cleaning means E, , ~ . and fusing mea.ns F, etc., for effecting the usual steps in-J volved in making xerographic copies. The machine may be ~ further provided with a suitable feeding means PF for feeding 'j copy sheets of paper from a paper supply in a cassette 15 and .~, 30 a suitable paper transfer means 17 for transferring the imaged paper onto the fusing station F where the toner image is fused . ~ onto the paper and then paper feed out to a suitable receptacle : - 5 -. ~1 ~ :;, ~s~
means 19.
A subject xerographic copier/duplicator machine may be designed to operate in different modes. In a first, or base mode, conventional sized documents up to a certain size are copied and in a second or LDC mode larger sized documents are processed. For example, in the base mode, the machine is designed to employ a moving optical scanning arrangement 21 -24 to scan a stationary original placed on a platen 20 in making copies up to 14 inches in length and 8.5 inches in width. In the LDC mode, it is designed so that the scanning arrangement is held at a stationary position and the document original is moved past a scanning station SS~
Referring to Figures 1 - 3, in base mode operation, the scanning arrangement 21 is moved across the width of the - platen 20 by a carriage (not shown) so that the associated optical means 22 - 25 projects the image of the original on : . .
the xerographic drum surface 12 at the image exposing station : ., B. In base mode operation, the machine is designed so that, in each copy run after the initial warm-up period, each successive xerographic copying cycle is accomplished in the same given time interval. The cycle time starts as the scanning means leaves the home position near the scan start ,, .
;~- sensing switch and continues to move past the platen and ends .... .
as it reaches the end of scan position at the scan end sensing switch S2. The next cycle begins as the scanning means auto-~ matically flies back to the home position.
:~ i In the LDC mode of operation, a large document ~- original is fed through a feeding means 20 such as that shown in Canadian Patent No. 978,556 issued November 25, 1975 or in 30U.S. Patent No. 3,731,915 issued to Guentner. For example, as ~ , ,~, .
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. shown in the forementioned copendinc~ application Serial Wo.
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document f~dincJ m~ans 30 m~y be stationed ou':side oE the platen ~0 and be in a dis~n~ag~d position when th~ Inachine is to operate in the base mode as shown in dottecl lines (Fig. 1).
I-t includes a lever 31 which is designed so that by moving it clockwise the feeding means 30 is brought into or engaged into a position as shown in solid lines so that it can feed documents for the LDC mode. Thus, in this position, the document original can be fed past the scanning station SS~
A suitable mechanism 33 is provided in the machine for coupling feed rollers 34 to the main drive M when the document feeding means 3U is moved to the LDC position. Once engaged, the rollers 34 driven by the main drive M feeds the document original to the left past the scanning station SSO The speed with which the paper is fed past the scanning station 5S is synchronized with the speed with which the copy papPr 36 from the paper cassette 15 is fed into a transfer relation-. .
; ship with the photosensitive insulating layer 12 by a suitable paper feeding means PF. When it is desired to operate the machine in the base mode, the document feeding means is simply moved out of the way of the platen by rotating the lever 31in a counterclockwise direction. The counterclockwise , : rotation of the lever 31 moves the document feeding means 30 to the right shown in dotted lines and out of the path of the scannlng station SS. At the same time, the driving mechanism 33 disengages the feed xollers 34 from the main drive M to render the document feeding means inoperative.
- While in the illustrati~e embodiment, it is shown that the document original feeding means is moved from one position ~
to another to engage or disengage the machine in the LDC mode, it need not be so limited. For example, the document feeding means could be held at a fixed :

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stationary po~ition using sui.-table ac-tu~ting m~ans such ~s a push button to engag~ or di~engacJe document feed rollers and thus selectively engage the feeding means fox the LDC mode.
In -the b~se mode, control circuitry of conventional design may be used to provide signals necessa~y for the selec-tive enabling of certain elements such as charging, exposing, developing, image transferring, fusing and cleaning means that implement the steps necessary in making a copy. The circuitry may comprise electromechanical or electronic components such as that shown in the U.S. Patent 3,301,126, as issued to R.F. Osborne et al on January 31, 1967~ or that shown in U.S. Patent No. 3,813,157 issued May 28, 1974 which acts to implement various xerographic process steps at appropriately timed intervals at various points in the process-ing operation under conditions where necessary timing is derived from a clock or ~am mechanism or other suitable means.
Generally, as described in the above mentioned U.S. Patent 39900,258 for base mode operations, the timing of the xero-graphi~ copying cycl~ is keyed to the scanning operation of .~. 20 the scanning means. Thus, in the base mode/ each cycle of xerographic processing steps during the making of successive copies in a copy run is keyed to the start and end of the scanning operation involving the movement of the scanner carriage between the home position ~at switch Sl in Fig. 1 or 3) and the end of scan position (at switch S2 in Fig. 1 or 3).
In addition, ~he control circuitry is also prvvided with a suitable design such as that shown in U.S~
Patent No. 3,588,472, as issued to Thomas H. Glaster et al on June 28, 1971, or in U.S.
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Patent 3,832,065 issued August 27, 1974, for letectin-J various m~lfunctions of the machine. For example, referr ng to Fiyures ] and 3, the machine may include detack detecting means 37 for detecting the failure of copy paper separation from the drum surface 12, jam detection means 38 for detect ing a paper jam that may occur along the paper path, and heat sensing element 39 for monitoring the temperature of the fusing station F. The output of these detecting means ; form a part of the input signals to the control circuitry of the present system.
In the present machine, various sensing elements in the form of switches are used to provide certain necessary input signals to the control circuitry. These switches are shown schematically in Figures 2 and 3, and, briefly stated, they provide the following functions:
Sl - switch Sl is used for providing a signal ln-dicative of the fact that the scanning element 21 is at the home or start portion of the , , scan cycle. This will be referred to, in the alternative as a "home switch". It is designed so that it is actuated when the scanning element 21 is at the home position.
In the actuated condition it is closed and provides ground or a logical 0 signal.
S2 - switch S2 is used to sense the positioning of .~. .
the end scan position as shown in Figs. 1 and 3. This switch will be referred, in the f ~ alternative, as the "end o~ scan!' switch.
~; It is normally open but it is actua~ed to ;~ 30 close when the scanning element-21 reaches the end of the scan position. When actuated , i - g _ .. ..

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it provides ground and a logical 0 signal.
~: S3 - switch S3 ~Fig. 3) is utiliæed to de-teck the trailing edge of a copy paper sheet. It is normally closed. Upon detection of the trail-ing edge, it ope~s and provides a loyical 1 signal.
S4 - switch S4 is utilized ~o sense the presence of .
a large size paper or LDC paper cassette 15 in the paper tray. It is normally open. But it closes in the presence of a LDC paper cassetteO
S5 - switch S5 is positioned to sense the movement of the document feeding means 30 into the LDC
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i~ mode position. It is normally in the open ; state. It is a momentary switch that actuates ~, or closes momentarily as the document feeding means 30 moves into the operative position for the LDC mode of operation. It is designed so that it initializes the control $, circuitry. S5 is connected so that when actuated, it momentarily provides +18 volts D.C. to a ~5 volt D.C. regulator and triggers , . .
,~ it into operation, thereby 6upplying the necessary ~5 volts D.C. to initialize or -start various circuit elements of the co~trol circuitry. (Fig~ 4~. The momentary swi ch ~- S5 may be a one way rollover type switch that actuates in a first direction when the - machine goes from the base mode to the LDC
- mode but not in the opposite direction.
Switch S5 will be referred to as the "mode change" switch alternatively.

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~ ~ ' ' ' ' ' ' ' , : , switch S6 is a step-wise switch which is act~ated to an open condition as ~he document feeding means 30 moves to the LDC mode position from base mode position. It is normally closed. Upon actuation to an open condition, it provides a logical 1 signal to the logic circuit. The logical 1 signal from this switch is utilized by the LDC control circuitry as an indicatioll of the change in the mode of . ~
operation of the machine from the base mode to the LDC mode and of the operation of the machine in the LDC mode. This switch will ~ be alternatively referr~d to as LDC mode ;~ switch.
S7 and S8 ~ these two switches are ut~lized to sense lead-ing and trailing edges of the document original being fed into the document feeding .;~ ; means 30. The switches are~normally closed and they are connected in series, but they -: , ~'t ~ ~0 open in the presence of the document original to signify its presence~ They arc positioned in the path of the document original so that . at least one or the other will sense the ~;~ presence of a paper of even a narrow width~
; : ~ Operation of either or both are utilized to signify the presence of the document ~,,;~:

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original, th~ l~ading and trailing c~dg~s of the document oriyinal~
Briefly stated, the switches Sl - S8 above are connected to operate and provide the following functions.
The home swi~h Sl when actua~ed shows tha~ the scan carriage is at the home position. The end of scan switch S2 is in a non actuated condition at this point. Now suppose the operator wishes to operate the machine in an LDC or large document copy ::i mode. The lever arm 31 is moved clockwise to place the docu-ment feeding means 30 to the lef~ and thereby place the machine :~.:; .
i in the large document copying mode. As the lever arm 31 is rotated, the LDC mode switch S6 is actuated and then the switch S5 is momentarily actuated. This inîtializes the co~trol circuitry for the LDC mode of operation.
' ~ In response to ~uch initializing, the control ~ circuitry causes the scanning arrangement and associated optics -~ to move into the LDC position, that is, to the end of the ~ scan position associated with switch S2. Furthermore, the ,~ control logic associated with LDC mode of operation is so ~- 20 designed that the action of copy paper feed solenoid II in - selectively feeding copy paper is prevented or inhibited while the scanning arrangement and the optics 21-25 move to the end ,:
~, of the scan position~ The arri~al of the scanning elements at the end of the scan position is sensed by the end of s¢an . .
~,~; switch S2. Upon a detection of ~his condition by switch S2 .,.,~. . . .
, the scanning and optic elements are retained in the end of scan position by the enabling of a suitable pawl and ratchet mechanism. For a detailed discussion of an exemplary mechanism ~"~ of this type, one may refer to the aforementioned copending application Serial No. 163,550~ This prevents the scan :~ .
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mean~ f~r autom~tically returninc3 ~o the home switch position as done in base n~ode ~perations and when the scan~ling means reaches the end of scan position, the main drive M drives the document oxiginal feed rollers 34.
In response to the end of scan signal, the control circui-try removes the constrain-ts on the operation of the solenoid II to allow the copy paper eeding means PF ko s selectively operate. With the solenoid enabledt the drivebelt means 41' and 42' are prevented from engaging with the lO main drive M and no copy paper is fed. When solenoid II is de-actuated by the control logic in response to an actuation of the LDC document original sensing means 57 and S8~ as the document original passes thereby, the drive belt means engag~
and the main drive M is allowed to driv~ tha copy paper eed rollers 44 in synchronism with the speed with which the document original is fed past the scanning station SS. The ~ switches S7 and S8 actuate as the document original paper is - fed therepast in the paper feeding means 30 and enables the control logi~ to proceed with LDC mode of CQpying operation.
20 Absent any malfunction, the machine proceeds to complete the copying operation.
In the shut down phase of the LDC mode of operation, - somewha~ different steps are involved, as shall be more ully explainPd, depending upon whether the trailing edge sensing switch S3 of the copy paper is sensed before or after the trailing edge of the document original is sensed by the document original sensing switches S7 and S8.
There are a number of indicating means that may be provided in the copier/duplicator machine, as shown in 30 Fig. 3, to provide the following functions:
WAIT - This is visual indication means 50. It is , :~0~ 6~;
connected in a manner to provlde the "Wai-t" indicia when the document feeding me~ns 40 is moved to the LDC poxl-tion and this condition is maintained by the control circuitry until the scanning element 21 moves to the end of the scan position ~' and the machine is ready to make copies. The lighted in-; dicating means 50 comes to the view of the operator duriny this time and alerts the operator to wait until the indication terminates before the document original sheet is fed through the feeding means 30. The indicating means 50 may include a suitable notation "WAIT" for the operator's convenience.
Preferably, the indicatiny means 50 may be positioned above the console of the base machine as shown in Fig. 3 at a position where it will be hidden by the housing of the paper ~ feeding means 30 when the same is positioned for base mode ;;; - operation.
ADD-P~PER - An indicating means 51 "Add Paper" is provided to apprise an operator that attention to the paper supply is necPssary~ It may be so connected that it is energized by the control circuitry when the paper supply runs -`; 20 out or when the incorrect size paper supply is present.

~- CLEAR PAPER
PAT~ _ - The indicating means 52 is provided to signify to the operator that a paper jam condition is present and requires clearing.
- ~ In addition, certain push buttons are provided in the machine for inputting certain command signals to the control circuitry. For example:
PRINT - This input, button 53, is used to enable the operator to start the machine in the base mode or in the alternative in the LDC mode if the machine is already in the LDC mode.

,: LIG~IT ORIGINAL - This input, but-ton 54, serves the ,' ; .

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function of starting an appropriate machine cycle when the original has poor background quality and the operator wishes to remove the background and obtain a copy with a cleaner background. If the machinP is in the base mode, it may be placed in the LDC mode by moving the lever arm clockwise and movement of the lever is accomplished by the operation of the momentary switch S5 and the LDC mode switch S6 to provide the print command signal. However, if the machine is al-ready in the LDC mode then a depression of either the PRINT
10 button 53 or LIGHT ORIGIi~AL button 54 provides tha print command signal~
: ~ STOP ~ The STOP input, button 55, is used for i stopping the machine in the middle of its operation and causes the control circuitry to stop the machine at the end .;.
of the copying cycle in process.
The logic of the present control circuitry is con-r~ figured so that when operated in the LDC mode, the machine operates in a single cycle or copy mode, wherein one copy of ~ a document original is made at a time. The copy cycle in an s 20 LDC mode is such that a copying cycle is started when the machine is placed in the LDC mode~ the copy is formed and completed and thereafter a shutdown mode is initiated after ' a give~ delay. In each copy cycle in the present embodiment, a copy of up to a given size, for example, 14 inches in lsngth and 18 inches in width, is made. If the original is wider than 1~ inches, then a succeeding cycle of the copying process may be employed to comple e the copying of the re-mainder of the original on a succeeding copy sheet.
Because of the flexibility and versatility built 30 into the logic of the control circuitry, the operation of ~-` the machine need not, however, be limited to that specifically .
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set forth for the ba~e and I.DC modes of opera~ion described above. For instance, the machirle can be run so that in the LDC mode, the machine may be employed as a single copy machine for small size copies ranging up to 8.5 inches in width and 14 inches in length in size, although this mode is primarily designed to make large si~ed copy, The machine can also be run as a multicopy system in the LDC mode by providing a suitable means RDF (Fig. 1) designed to refeed a document original coming out of the document feeding means 30 back to input thereof before the machine is shut down by the control logic.
The general functions of the control circuitry , according to the instant invention are described with re-ference to the block diagram of Figure 4. The control , circuitry according to the present invention generally in-cludes input means 60 for applying various command or input signals to the control logic which are required to operate ~he machine either in a base mode or LDC mode. Another input means 61 is provided for applying other required command ~r input signal~ to the control circuitry when the machine is operated in the LDC mode. The control circuitry is al50 ; provided with base logic 62, LDC logic 63, and a buf~er 64 for selectively conveying output control signals from the base and LDC logic for operating the controlled elements of the xerographic machine.
The input signals provided from input means 60 to the base logic 62 include the manual command inputs such as provided by the PRINT, LIGHT ORIGINAL, and STOP buttons, as well as sensor inputs such as provided by the home position scan switch Sl, the copy paper edge sensing swi~ch S3, the failure conditlon detection means FD which includes the jam :

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detecti~ means, the d~tack det~cting means, the means for sensing ~n over ~l~ating of the E~s~r, etc., and machine interlock INTLK switch 63 which may ~e used to switch in or .: out an AC power source. These :inputs are applied from the input means 60 to ~he base logic~ 62 via suitable paths 64'.
The input signals provided from the input means 61 to the -~ I.DC logic 63 include input signclls responsive to the movement of tne LDC lever arm, the end of scan switch S2, the LDC
cassette switch S4, the momentary or mode changing switch S5, the LDC mode switch S6~ and document edge sensing switches . S7 and S9. These inputs are applied to the LDC logic 63 via path 65.
In accordance with another aspect of the present invention, the control circuitry is configured so that, when-ever possible, the input signals used for the base machine are also used for the logic for the LDC mode of operation to j: :
thereby simplify structure and render the machine more ~,~ versatile. Thus, for example, the inputs from a number of input means such as PRINT, LIGHT ORIGINAL, ADD PAPER, CLEAR
PAPER PATH and STOP are used to provide command signals for . operatlng the machine in the base mode and are also applied to the LDC logic 63 via suitable paths 66 for controlling . - machine operation in the LDC mode. Similarly, other input . means such as jam, detack and other failure detecting means - are also ,, ~ .

; - 17 _ ' ,; : ' '~ . ' ' ~: : ::.,,: , employed as inputs to the LD(` ].oyic 63. In a like manner certain of the inputs to th~ ~C~ logic ar~ a~so ~pplied via sui~le paths 67 to the b~se logic 62. In addition, as shall be evident from the detailed discussion below, certain outputs of th~ base logic 62 are also employed in the LDC logic 63 and the converse relation also o~ains as indicated by flow paths 68 and 6g.
Generally stated, the LDC logic of the present invention is designed to operate in conjunction with existing los.ic (i.e., base logic 62) circuitry previously employed to control base mode operation.
As illustrated in Figure 5, the base logic circui~
try may comprise a plurality of latch means 71A-71G that provide signals (DEVF, MAIN DRIVE, CHARGE, FANSF, EXPOF, SCANF, and FUSERF) for actuating means for implementing xerographic steps. These steps include charging, developing, exposing, motox driving, ~canning, fusing, cooling steps, etc. The con~rol logic includes a timing signal genexating means CTR, and a plurality of logic or decision gates ~72A-72G~ for setting or resetting ~72M-72S~ the latches (7LA-71G) to effect xerographic steps in a certain time sequence upon actuation of the start or print button 53. In addition, the base control logic may also comprise suitable programmable means 73, such as descri~ed in U.S. Patent No. 3,g71,919 issued July 27, 1976, for set~ing different hreak points and billing meters 74 for recording the count of copies made. Briefly stated, the programmable means 73 is designed to store the n~ ~r of copies dialed by the operatory readies operation in response to the init~Lalization of the machine, and upon a depression of the start or print button 53 is designed to count and generate .
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copy count pulses Eor application to the billing meters 74.
It is also desi~ned to generate an output signif~ ng coin-cid~nce between the number of copies made and the number of desired copies, as dialed by the operation. This coincidence signal is applied to a coincidence latch COINF (Flg~ 5)~ In turn the coincidence latch COINF applies a signal via an in~
verting gate 75, to suitable decision gates 72M, 72N-72S, for deactuating or resetting the latch means 71A-71G which wexe set or actuated earlier by the decision gates 71A-71G to implement the xerographic process steps. The logic may also comprise machine failure detecting means FD of suitable type such as detack detect means (Fig. 1, 37), jam detect means ~38), fuser overheat detect means 39 and paper supply run out condition detecting means PD for detecting a run out con-dition of copy paper supply from paper supply switch PAP SW~
When the paper supply run out condition is detected, a visual means 51, ADD PAPER is illuminated to signify the condition. Upon a detection of the failure conditions associated therewith, the detecting means FD and PD provide output signals to a count hold means 70 that cause the pro-gr~mmable means 73 to suspend its counting operation and also deactivate latch means 71A-71G through the generation of a false coincidence signal to thereby interrupt the machine operation while signals from failure detecting means FD are employed to directly reset latches 71C and 71G. For a more detailed description of examples of the aforementioned type ; of base logic, reference to the U.SO Patents Nos. 3,588,472, 3,813,157 and 3,971,919 is available.
As stated above, according to an aspect of the present invention, the LDC logic is designed to operate with existing base logic 62 of the type briefly described above.

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~herefor~, as ShO~Il in Fi(3ure 4, wherev~r possible, it is desig~ed -to utiliæe the output~ of the base logic 62 which is supplied thereto v:ia patlls 68. Furthermore, the LDC
logic is also designed so that where possible ~utp~lts developed thereby are usable by the base logic 62 and accordingly these outputs are supplied ~o the ex:isting base logic 62 via paths 69 for completing the logical opera~ion necessary in deriving control signals, as will be described in more detail hereinbelow.
In line with an object of utilizing exisking logic elernents to a high degree to reduce resulting structure, various logic elements are employed to perform multiple functions. Thus, for example, referring to Figure 4, buffer 64 is used to multiplex the signals from the base logic 62 via suitable paths 76 for operating control elements for the various xerographic process steps. Likewise, count informa-tion derived from programmable means 73 (Fig. 5~ is also utilized in deriving ~DC billing count information, as described in U.S. Patent No. 3,989,930 issued November 2, 1976. The base mode logic as well as the LDC mode logic provides other output signals which are applied via suitable path~ 77 and 78, respectively, as shown in Figure 4, to ; various means sllch as the visual indicating means to alert the operator as to machine st~tus conditions.
In line with the ob]ect of maximum utilization of the logic elements, a counter CTR1 ùsed for the base logic 62 is also used in providing necessary timing signals in opera~ing various elements of 3a ~', ` ' :
.; : . . :
: -. .' ~ ' ' , .
. ' ' ~5~
the machine in the LDC mode. rhis is schematlcally indicated in Figure 4, wherein, it i5 shown that the counteL CTRl which is connected to the output of an oscilla-tor 81 provides necessary timing signals -to the base logic 62 via suitable paths 82 and to the LDC logic via other paths 83.
Where the counter CTRl for base mode operation in a given machine does not include enough counting capacity, a second counter CTR2 may be connected in series therewi~h to derive extended time counts as may be required by the LDC
logic and apply them to the LDC logic via suitable paths 84.
When required during a copying operation, the counters CTRl and CTR2 are cleared by deriving and applying clearing signals from the base mode or LDC mode logic and applying them to the counters via suitable pat~s 85 and 86.
~ s described below, the countex CTR1 starts when either the PRINT button 53 or LIGHT ORIGINAL button 54 is pressed in the base mode or when the momentary switch S5 is actuated when the LDC document feeding means 30 moves into the LDC position. With the machine interlock switch 63 closed, the actuation of the buttons 53 and 54 or the momentary switch S5 provides a trigger signal required to trigger a suitable D.C. regulator 88, such as a +5 v. D~Co regulator, into conduction. Once triggered into conduction, the regulator converts the 115 volt, 60 Hertz A C. power to a D.C. output. The D~C. output is applied via suitable - path 89 to the various elementæ of the logic, other elements of the base and LDC logic and the oscillator.
Ih accordance with another asp~ct of the present invention, as will be descrlb~d in detail below, certain count signals are utilized as a feedback signal via a suit-able path 92 to the D.C. voltage regulator 88 and turn it off . ' .
: .

~so~
and shut down the machine at the end of a copi~ing operation.
Similarly, in certain situations, once triygered into operation, another count signal is fed via a feedback path 93 to maintain the operation of t]he D.C. voltage regulator subsequent to triggering.
In the base mode operation, the control signal out-put~ are generated in a certain timed sequence by the base logic and this timing sequence is keyed to the operation of the scanning means which moves past a stationary document original. These control signals are then employed to actuate in an appropriately timed sequence the control elements that implement the xerographic steps. When the machine i5 operated in the LDC mode, however, the timing and actuation of the controlled elements are different in a number o~ ways. For instance, the copying operation is now keyed to the stationary scanning means and a displaceable document original. Hence, in the LDC mode, for example, the command signals for dis-placing the scanning means and optics in synchronism with - copy paper are not required. Furthermore, there are time differences in the actuation of xerographic operational steps because of variations in the size of the document original and copy sheet size. To accommodate the different environment, the LDC logic is designed to control the actuation of the operational steps in a manner to conform to the size of the document original and/or that of the copy shee~.
In addition, the LDC logic is designed to accommodate various ad~itional input functions exclusive to the LDC mode of operation such as those associated with the input signals - 30 from the mode change switch S5, LDC mode swi-tch S6 and document feed switches S7 and S8. The LDC logic responds to ~' . .

o~ ~
these LDC mode relat~d inputs, analyzes them and provides outputs -to the controlled elements o the xerographic machine via the buEfer circuit 64 to efEect copying steps in a timed sequence especially suited to makiny copies of large sized document originals on different size copy sheets, in a manner to be described in detail below.
DETAILED DESCRIPTION OF THE CONTROL CIRCUITRY
. ~ , Referring now to Figures 6 - 11, the control circuitry of the present invention is considered in detail.
The LDC logic 63 is designed to respond to ~he various input signals from the input signal means 60 and 61, as applied thereto through paths 65 and 66, and the outputs from the base logic 62, applied via paths 68, certain ones of said paths being designated LDl - LD21. The inputs LDl - LD21 from the base logic 62 are annotated with conventional binary logic notation to readily facilitate an appreciation of their nature. For example, the symbol FD is a failure detection input such as from jam detection means or other machine failure (Figure 5) in the base logic wherein the letters re-present the nature of the input while the bar or Not factor sign is indicative tha~ this input is high or is in a logical 1 when the condition is absent. Conversely, if the failure condition exists, this input is low or logic 0, and it is ~- applied via the LDl path to interrupt and stop the operation of the LDC logic. In a like manner, when the developer (Figure l; C) is off (i.e., not activated) this condition is signifled by a logical 1 for DEVF lead from the development latch ~Fiq. 5; 71A) of the base logic and applied to the LDC
logic via LD2, as shown. Similarly, other inputs are:
: 30 MAIN DRIVE - refers to the condition of the main drive M as indicated by the output of latch 71B

, ~5(~
(Flg. 5) wherein this input is high when the main drive M is not running and low or at a logic 0 when it is running.
SCAN - refers to the output of the scan latch 71F of the base logic. It is high or at a logical 1 when the scanning means 21 (Fig. 1) in the base mode is operating and is low or at a logical 0 when the scanning means ls not operating.
EXPOF - refers to the condition of the actuating signal for the exposure means B (Fig. 1) being provided by the exposure latch 71E (Fig. 5) in the base logic.
A high or logical 1 level is indicative that an enabling signal is being provided while a low or Zero (0) indicates the converse.
PRINT - refers to the print signal.
A logical 1 level appears when the PRINT or LIGHT ORIGINAL
` button is pressed while a logical 0 appears when these buttons have not been depressed.
PAPSW - refers to the output of the paper sensing switch PAPSW. When copy paper is present a ' logical 1 resides on this line, otherwise logical 0 is present.
LDC 5~A~I PRIN~ - indicates whether an LDC
print cycle has been initiated by a depression of the print or light original buttons. A logical 1 or high is present on this input when the PRINT button 53 (Figure 3) has not been depressed, the machine is in the LDC mode and the start of the copy cycle was commenced by changing the mode from base to LDC by a moving of the lever arm 31 clockwise (See Figs.
1 and 2).
CT 13, 22, 23M

2 M, 2 u, 2U - refers to counter signal out-~ 24 -: :
". , . ~ .

~o~
puts corresponcling to count conditions 13, 4, 8 and 16 of the first cou~ter CTRl, and 2 and 1 of second counter CTR2, respectively. When the corresponding count conditions Erom the counters CTRl and CTR2 occur, they are provided in the form of logical 1's to the corresponding inputs associated with conductors LD9, LDll, LD13, LDl9, LD20 and LD21 and therethrough to the LDC logie. For example, when count condition 13 is sensed at the output of the first counter CTRl, a loyical 1 is applied to conductor LD9.
DEVF ~ refers to the complement of DEVF output produced by latch 71A (Fig. 5) as mentioned above.
Thus when developer C (Fiy. 1) aetuating signals are provid~d by the development latch 71A (Fig. 5) from the base logic 62, the DEVF goes low or to a logical 0 and high when the latch 71A is reset to turn off the development station C
(Fig. 1) of the xerographie machine.
HOME SW - refers to a condition when the home switeh Sl is in the aetuated state corresponding to the presenee of seanning elements 21 and 22 (Figure 2) in the home position. Under these eonditions a logical 1 level at the HOME SW input corresponding to a Zero (0) level for switch Sl is applied to the LVC logie through eonduetor LD12.
HOME SW - refers to the logical comple-ment of the ~OME SW input and a logical 1 level resides thereon when the seanning elements 21 and 22 have left the home position at whieh home switch Sl resides. Thus, when home switch Sl is deaetivated or at a logieal 1 level, this level is a~plied fo lead LD14.
INITIAL - refers to a eondition when the logie is being initialized. When INITIAL output is low, a power up sequenee is occurring and this level is employed .
;', ' ' .' ~ .

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to reset various latches and gates as will be seen below.
C~IARGEF - refers to the condition of latch 71C (Fig. 5) in the base loglc 62. When CHARGEF is high such level is indicative that latch 71C is providing a signal for actuating certain charging means of the xero-graphic machine.
COINF. DEVF. MPX - denotes that a logical 1 level resides on line LD17 when the coincidence latch CCINF is set and development latch 71A (DEVF) is not set.
PROG CLK - is an input associated with the incrementing of the programmer clocks. A logical 1 is present when the programmer clock in the base logic is being incremented while a logical 0 resides on this input upon the termination of each incrementing signal.
PRINT - is an input associated with the PRINT button. A logical 1 is applied via LD7 to LDC
development latch 123M whenever the PRINT button is de-pressed.
Referring now to Figures 8 - 11, the buffer 64 in-cludes multiplexers 121M - 128M which are provided to serve the function of selecting a set of the control signals from either the LDC or the base logic. Thus, for example, the multiplexing circuitry 121M - 128M includes ~ set of AND
gates (e.g., 141L - 148L) for gating therethrough corres-ponding xerographic process step control signals from the LDC logic and another set of AND gates (e.g., 141B - 148B) for gating therethrough corresponding similar control signals from the base logic. In operation, the AND gates 141L - 148L
are enabled by an LDC mode signal from the LDC logic through the INVERTING gates 153 and 155 provided in the multiplexing circuits 121M and 128M wherein AND gates 141L - 144L are :~6~;
colnmonly connected to the o~ltput of invertor gate 153 and AND gates 145L - 148L are cornmonly connected to the output of invertor gate 155. The AND gates 141B - 148B associated with control outputs from the base logic are disabled by the same LDC mode signal applied to inverting gates 154 and 158. By way of example, the selection process for the multiplexer 124M which controls the scan solenoid is as follows: When the machine operates in the base mode, the signal present on the SCAN input coming from the base logic is applied to the 10 AND gate 144B and will appear on the SCAN mpx output 164 when AND gate 144B is enabled. In the LDC mode the signal present at the output of OR gate 121 of the LDC logic is applied to the AND gate 144L and will appear at the SCAN mpx output upon an enabling of AND gate 144L.
: The outputs of the buffer or the multiplexexs and the LDC logic are shown along the right hand side of Figures 8 and 11. Briefly described, they are as follows:
EXPOF MPX (PRINT DISABLE) - This output on line 161 from th~ multiplexer 121 i5 used to actuate or energize the exposure means when the document original being scanned must be image exposed onto a photoreceptor. A One level one line 161 is employed fox enabling. The exposure step occurs at the imaging station B (Fig. 1). This signal is also employed to disable the PRINT button in the base mode. The complement of this signal, EXPOF, is also applied to the multiplexer 125M as an input to AND gate 145B.
DEVF - MPX This output on line 162 from the multiplexer 122M controls the developing means. With DEVF MPX at a logical 1, the developing means is off and when the level on line 162 is a logical 0, the developing means is enabled.

; ' ' ''" ` ~' t(:l S~
L C_ ~V_ B_AS R SE.T MPX - When this output sigrlal at 163 from the output of multiplexer 123 is at a logical 1, it is applied to the bias latch (no-t shown) of the machine and provides a normal bias level.
SCA~ MPX - When this output 164 from ; the multiplexer 124 goes to a logical 1, it energizes the scanning means in the machine.
EXP. MPX - I'his output on line 165 when at a logical 1 level signal is applied to the exposure means to maintain it in a non-actuated state. The same signal is also applied to multiplexer 121M as an input to base mode AND gate 141B.
; MAIN DRIVE MPX - This output on line 166 is employed to enable main drive M and cause rotation when a logical 1 is present.
FUSER MPX - This output on line 167 is changed from a logical 0 to a logical 1 when the fuser in the xerographic ~.achine is to be activated.
- CHARGE MPX - This output on line 168 goes to a logical 1 when a charging step is taking place.
Various inputs or outputs 00-016 of the LDC logic provides the following signals:
ADD PAPER (00) - This output is applied to the PAPER ADD indicator to advise as to a copy paper supply run out condition.
COINF SET (01~ - This output is applied to the ~s~
base lo~ic and when a lo~ical 1 :Ievel is pre~ent there~n, it causes a rese-tting of the coincidence gate latch COINF ~Fig.
5) in the base logic.
LDC BILL ~02) ~ This output on line (02) is applied to an LDC billing meter, the details of which are shown in the abovementioned U.S. Patent No. 3,989,930.
DONE.L (04) - This output/ when at a logical 0, indicates that the machine is in the LDC mode and has completed a copy cycle.
L (07) - This output on line 07, when at a logical 1, signifies that the machine is not in the LDC mode and permits base mode operation.
~ LDC, EXPOF 508) - This output, when at a logical 0, - resets ~or turns off) the base mode exposure latch EXPOF (Fig.
5~ which normally controls ]am detection timing. Since the jam detection requirements of the LDC mode are different from the base mode, a resetting of the exposure latch is necessary.
DEV SET L~C (09) - The output, when at a logical 0, sets the developer latch at the proper time in the LDC mode since the timing for this latch in the LDC mode is different from that required for the base mode. The base mode signal is inhibited ~y the L ou~put which resides at a logical 0 when the machine is in the LDC mode.
LDC 2 COIN RESET (010) - This output, when at a logical 0, xesets the coincidence latch at a count of 2 signifying - that the machine has not completed processing a piece of copy paper, this output is used to change COINF. DEVF MPX to logical 0, thereby preventing the base logic from adversely affecting LDC logic.

3~S~

LDC ONE SIIOT Cl,R (011) - This output when residing at a logical 0, signifies that the LDC one shot has been triggered and causes the counters CTRl and CTR2 to be cleared.

_ . ~
LDC MASTER CTR CLR (012) - This output, when at a logical 1, signifies that the counter CTRl is conditioned to count and when at a logical 0, the counter is cleared and held a~ a count of zero.

HOME +L t013) and PWR INIT +L (014) - These outputs are actually the L (the complement of L) output. They perform the functions of disabling the HOME switch LATCH (not shown) while in the LDC mode and simulating a power initializing pulse when the machine is changed from the base mode to the LDC mode.
141 DIS~BLE (015) - This output, when residing at a logical 0, disables a jam check at a count of 141 after the coincidence latch has been set. The jam check is only required for base mode operation where a jam condition is monitored at a time corresponding to count 141 when the last copy set by the operator is made. In the LDC mode, this is not necessary because the jam check is already completed for the single copy mode.
LDC EXT SHUT DN (016) - This output, when residing at a logical 0, shuts off the ~5 v DC regulator. The out-put provided represents a timing count in CTRl while the machine is operating in the LDC mode. This extends the shutdown time (e.g., 26 seconds) from a shorter shutdown time (e.g., 16 seconds) employed in the base mode.
Now referring to the details of the LDC logic itself, it may comprise various conventional logic elements such as AND, NAND, OR, NOR, INVERTOR, LATCH elements et~., operatively connected to provide logical operation on the - 30 ~

. . .

., ~ ~ ,.... .

~s~
- various illpUt sic3nals and produce output sign~ls necessary for driving various xero~raphic elements, lighting visual indicating means and implementing other functions. The LDC
logic will now be described in detail in -terms of its functions in (a) changing the mode, (b) L~C operation and (c) shut down operation.
(A ) MODE CHANGE
The mode change described refers to the situation where an operator finds the machine in the base mode and desires to initiate copying operations in the LDC mode on large copy paper, for example, paper larger than legal size paper. The operator first sets up the machine for the LDC
mode. The present control is designed so that the operator would place a large size (for example, 18 inches by 14 inches~
paper supply in a cassette form in the paper tray 15 ~Fig. 1).
The LDC lever is then turned clockwise to displace the document feeder to the LDC position. The LDC logic is designed to accept the movement o thc lever arm, as an equivalent of a pressing of the PRINT button in the base mode.
The rest of the operation in making copies is taken over by - the control circuitry which automatically places the machine in the LDC mode.
In order to assist in an appreciation of the operation of the LDC logic, a flow chart (Fig~ 13~ i~ pro-vided. Here it is to be noted that the flow chart does not take the usual form of a time dependent flow chart in the sense that each step indicated follows in time the step pre-ceding it. Instead, more of a functional dependency flow chart is illustrated in Figure 13 wherein the various steps are dependent upon the output conditions of the elements pre-ceding them and various steps may occur simultaneously.

l~efe~ring Lo the ~etails, in particula~ to Figure ]3, the change of the mode initially illvolves the following steps:
The opera-tor finds that -the machine is in the base mode. A la~ge paper cassette is Loaded and the lever arm 31 is rotated in a clockwise direction (step 1). This displaces the document feeding means 30 in position on the platen 20 for the LDC operation (step 2). A suitable mechanism ~e.g., a gear) moves the drive mechanism into a position ~or engage-ment with the main drive M (step 3). The LDC mode switch S6opens as the paper feeding means 40 moves to the LDC position and applies a logical 1 or ~5 volt DC signal to a NAND gate 102 ~ig. 6) via a pull-up circuit lOlA (step 4). The momentary switch SS is positioned so that it momentarily closes and opens Istep 5) aftex the LDC mode switch S6 operates. In response to the actuation of the momentary switch SS, the DC regular 88 is triggered into operation and causes the power supply to be latched in an on condition (step 6). The foregoing steps 1 - 6 initialize the control circuit (step 7) for the LDC mode. Steps 1 - 7 occur sub-stantially simultaneously, their recited order merely refers to functional cause and effect.
Steps 1 - 7 as described in conjunction with Figure 13, are manifested within the control logic depicted in Figures 6 - 11 in the manner described below wherein it is again assumed that the machine was in the base mode and that operator properly inserted the large paper cassette, The insertion of the large paper cassette conditions the large paper cassette sensing switch S4 (Fig. 6) to a closed state to indicate the presence of the logic cassette. The closed state of the switch S4 signifies to the LDC logic that - ~2 -' -. .~ . . .
'`,; ' ~

the large cass~tte paper ls present. At this point, the home switch Sl is still actuated, that: is, the scanning element 21 is still a t the home position as shown in dotted lines (Fig.
3). AC power is supplied to the machine as interlock 63 (Fig.

4) is closed.
When the operator moves the lever 41 clockwise (step 1) to the LDC position, the document feeding means 30 is dis-placed onto the platen (step 2) at a position where it can feed the document original past the scanning station. The document original feed rollers 34 are brought in a position for engagement with the main drive M via the drive belt 41 -42 and are driven by the main drive (step 3). The LDC mode switch S6, which is normally closed, is positioned to open as the feeding means 30 moves to the LDC position. This causes a pull-up circuit 101A (Fig. 6) to apply a +5 volt DC
or logical 1 level to the NAND or LDC mode gate 102 through a first (a) of its two inputs. The other of the input (b) -~ of the NAND gate 102 may be used to apply disabling signals FD when a machine failure such as paper jam is detected and indicated as a low level on conductor LDl.
- The pull-up circuits 101A - 101E are of con-ventional design and comprise resistors Rl and R2 and a capacitor Cl. The circuit is designed to provide two different levels of potential defining logical One (1) and Zero (0) states. For example, when switch S6 is closed, the resistor - ~2 is connected therethrough to ground and places a low level on the input a of the NAND gate 102 which is defined as a logical Zero (0). Conversely, when switch S6 is opened, the ground potential is removed from the resistor R2 and the 5 volt DC level reflected across the combination of Rl Cl is dixectly applied to input a of NAND gate 102 to define a . .

.::
. ~

: . .

logical One (l) leveL. The capacitor Cl p~ovides an AC by-pass for transi~nts which may occur during -the opening and closing of the switch S6 to minlmize transient noise which might otherwise falsely triyger the loyic gate 102. Thus, with the machine in the base mode, a logical 0 level is applied to the NAND gate 102 due to switch S6; however, as the document feeder 30 moves to the LDC position, switch S6 opens to remove ground from the resistor R2 whereupon a logical 1 level is applied to input a oE the NAND gate 102.
At this point, the other input to NAND gate 102 as applied to pin b from input FD may be assumed to be a logical 1 since no machine failure should be present. It should be noted, however, that ~5 volts DC has not yet been applied to the control circuitry because the DC regulator 38 is not yet actuated. Therefore, until the momentary switch S5 operates to trigger the regulator 88, pull-up circuits 101A - 101E
will not have been enabled under the conditions being dis-cussed.
After the LDC mode switch S6 opens (step 6) in this sequence, the switch S5 applie~ 18 volts DC momentarily to the five volt DC regulator 88 (Fig. 4). This momentary signal triggers the ~C regulator 88 into operation to convert the AC input thereto into a five volt DC supply level and apply it to the logic circuitry. Thus, the moment-- ary actuation of the switch 55r initializes the logic circuit-ry. Also the momentary actuation of the switch S5 tak~s the place of a depression oE the PRINT button 53 or light original button 54 (Figs. 3 and 4) as far as copy cycle initiation is concerned and obviates th~ need for a depression of the print button to initialize a copying operation. The logic circuitry is now initialized and ready to recPive and process .~ .

1~5~
other input siynals. Thus, at this juncture a logical 1 is applied to the upper input NAND gate 102. This input to NAND gate 102 together with a logical input of 1 from the FD
input to pin b causes the NAND gate 102 to output a logical 0.
Thus far it has been assumed that the machine was in the base mode and the foregoing steps took place to change machine operation to the LDC mode. Suppose, however, that the machine is already in the LDC mode wherein the lever 31 of the paper feeding means has been previously rotated clock-wise. In this case, the LDC mode switch S6 is already open.
The LDC operation is initiated momentarily by actuating either the PRINT button 53 or the LIGHT ORIGINAL button 54 (Fig. 4) connected in parallel with the momentary switch S5. The ; actuation momentarily applies the 18 volt DC potential to trigger the regulator 83 which provides the +5 volts DC to initialize the logic circuitry (step 7) and hence condition the same for operation In turn, the pull-up circuit receives +5 volts DC and applies a logical 1 to the top input of NAND gate 102. At this point, as stated be~ore, the scanner element 21 is still at the home position.
Referring to steps 8 - 10 of Fig. 13, as the logic is initialized, the following events take place. The visual indicating means 50 is lighted and displays the WAIT advisory (step 8) to the operator. This is intended to advise the operator not to feed the document original at this time.
Even if the operator should feed the document original by mistake, the logic will not recognize it since the copy paper feeding means PF (Fig.~l) is not yet in operation. At this time, the paper feeding operation is inhibited by the actuation of the LDC paper feed inhibit (Fiq, 8; II; Fig. l; II).
.

.,. ~ . , .

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R~ferring to the cletails of the :Logic in Fig~.
6-11, more speci:~ically, the f.oregoi.ny steps of lighting the WAIT indication (step 8) and t:he energization of the paper feed inhibit (step 9) result from the scan carriage being in the home position and the doc~ent feeding means 30 being in the LDC position as ~ollows. The logic elements involved in providing the foregoing functlon includes LDC mode switch S6, pull-up circuit 101A, NAND gate 102, NAND gates 103 and 104, OR gate 111, INV~RTOR gate 113, SCR~10, WAIT LIGHT 50, the 127 volt DC supply, SCRQS, PAPER FEED INHIBIT solenoid II and the associated passive elements R6, R18, R24, diode Rl and RC
bypass circuits BP10, and BPll. In operation, the opening of the LDC mode switch S6 causes the pull-up circuit 101A to - apply f5 volts or logical 1 signal to the NAND gate 102. At - this point~ the other input to the NAND gate 102 at pin b is a .-. logical 1. Capacitors Cl-ll are used to shunt out noise signals from interfering with the operation of the logic in a : conventional manner.
~ere note that any type of machine failure conditiQn signal FD detected by detack detecting or fuser overheat detecting me2ns etc.~ is used by the ~DC logic in the ~orm of a failure condition signal applied as a logical O to the pin b of the NAND gate 102. This logical 0 input will prevent NAND gate 102 from attaining a low output in response to the condition of the LDC switch S6 and thus prevents the initiation of the LDC mode. As descri~ed in detail i~ aforementioned U.S. Patent No. 3,813,157, the - mentioned failure detected acts to place the machine in an interrupt mocle, Upon removal of conditions that have cau~ed ~he failure cletection, the FD signal applied to input b of NAND gate 102 changes to a logical 1 thereby enabling an f ~

, ' ~ .

~5~
assumption of the LDC mode.
In response to the coincidence of logical 1 inputs from the failure condi-tion detection input FD on lead LDl and the opening of switch S6, the NAND 102 provides a logical 0 output signal. This low level output is applied to both in-puts of NAND gate 103 which acts as an invertor to produce a logical 1 at the output thereof. This output is applied to the lower input of NAND gate 104.
At this point, it may be noted that the NAND gate 104 has two inputs. The lower input, as aforesaid, is connected to the output of NAND gate 103 while the other input is connected through pull-up circuit 101B to the end of scan switch S2. S2 is open normally and closes when actuated by the scanning optics. It may be recalled, that the switch S2 is open because the scan carriage is not yet at the end of scan position. Thus, as the switch S2 is open, the pull-up circuit 101B applies a logical 1 to NAND gate 104. Under these conditions, both inputs to the NAMD gate 104 are logical 1. The output of the NAND gate 104 is low.
The output of NAND gate 104 is applied to the b input of OR
gate 111 and to the Inverting gate 113 (Fig. 9).
The OR gate 111, whose inputs are inverted, acts to invert the logical 0 applied to the b input thereof and outputs a logical 1 to the control electrode of SCR Q10 via a resistor R24. Similarly, the Inverting gate 113 inverts the logical 0 level applied thereto from the output of NAND
gate 104 to a ~5 volts or logical 1 and applies it to the control electrode of SCR Q5 via a resistor R18. The SCR's Q5 and Q10 are of conventional design and have the control electrodes connected to a resistor and capacitor connected in parallel to form AC bypass circuits BP10 and BPll. Each of - :.
.,~
,: :

the bypass circuits sPlo and BPll are connected intermediate ground and the gate electrode of an associated one of SCR's Q5 and Q10. The anode electrode of th~ SCR Q5 is connected to a suitabl~ DC source such as an unregulated 127 volt DC

supply, v.ia the PAPER FEED INHIBIT solenoid II. The anode of the SCR Q10 is connected to the same DC voltage source via a resistor R28 and the WAIT lamp 50. The anode is also shunted by a suitable resistor R6 to a ground to provide a low bias current to the W~IT lamp 50. The cathodes of both SCR's Q5 and Q10 are connected to ground through a diode Rl as shown.
The gate electrodes of both SCR' 5 respond to the logical 1 levels from the gates 111 and 113 to become conductive.
Once triggered into conduction, the necessary power for light-ing the WAIT light 50 is applied (step 8) and causes the WAlT light to be energized. Thus the WAIT light is illuminated when the LDC mode switch S6 opens as the operator turns the LDC lever 31 clockwise to move the LDC document feeding means 30 into the LDC position. Similarly, when SCR Q5 conducts, power for actuating the PAPER FEED INHIBIT
solenoid II is applied thereto so that the INHIBIT solenoid II prevents the rotation of the copy paper feed rollers 44 of the paper feeding mechanism PF (Fig. 1) from feeding of the copy paper (step 9). This continues until the scanning elements 21 and 22 reach the end of the scan position and close the end of scan switch S2 to open and deactuate SCR's Q5 and Q10 due to the high level output now provided by IdAND gate 104.
Note also that with the machine set in the LDC mode ; and the consequent opening of LDC switch S6, buEfer 64 (Fig.
43 is conditioned to operate in the LDC mode. This is made possible as the low output of the LDC NAND gate 102, under 51~6~
these conditions, i.s applied to the Inver-ting yates 153 and 155. In turn, the gates 153 and 155 apply enabli~ levels in the form of logical l's to the LDC AND gates 141L - 143L.
These same outputs are again inverted and also applied to disable the BASE MODE AND gates 141B - 148B via inverting ~ates 154 and 156. Consequently, the multiplexing circuit 64 is now conditioned to operate in the LDC mode.
As soon as the LDC logic sets up the buffer 64 to operate in the LDC mode, the multiplexing circuit 121M
provides a print disabling signal in the form of logical 0 ~o a PRINT BVTTON circuit via output path 161. This disabling signal is used to disable the PRINT BUTTON 53 input of the machine. This means that as the lever arm 31 is displaced and actuates the momentary switch S5, the momentary actuation generates an analog to a print command, as aforesaid, while commands from the printer button per se are disabled. When the machine is switched back to the base mode, the PRINT
DISABLE multiplexing circuit 121M is switched back to the BASE mode of operation and removes the low or PRI~T DISABLE
signal on.conductor 161.
The output of tha NAND gate 102 is also applied to the output lead L (07). This output can be utiliæed in a suitable manner to generate, for example, logical 0 at L
which may be used to show that there is no jam condition and that the buffer is now in the LDC mode while its complement or a logical 1 at the output annotated 014 may be employed to indicate either that a jam condition exists or thak LDC
mode operati.on has.not been established.
The remaining mode changing steps are illustrated 30 as steps 12.- 19 in Figure.13.. Briefly, the remaining steps entail a deactuation of the home switch Sl (step 12), a de-` ,~.

~0)5Qtii(~
energization of the scan inhlbit solenoid (step 13), clearing and holding the master counter CTRl in the clear state (step 14) awaiting the arrival of the carriage at the end of the scan position (s-tep 15), enabling the pawl mechanism to retain the carriage and the scanning optic means in a stationary position at the end of scan position (step 16), and a releasing the inhibit on the paper feed solenoid (step 18) to enable the copy paper feeding mechanism. The WAIT
light is turned off at this time. (Note that the document original feeding rollers 34 are connected to the m~in drive M so that i continues to be driven for the entire duration of the LDC mode.) The machine cycle-out count also begins so that, if no document original is fed after a given period of time, the machine is cycled out (step 19) and is shut down. If the document original is fed in time, then the cycle-out step does not take place and the machine enters into copying cycle in LDC mode.
Before tracing the details of the steps 10 - 19 in the logic, as an aside, note that the LDC logic comprises several latches designated in Figures 6 - 11 as SCAN, EXPOSURE, DONE, and FUSER latches. In operation~ each of these latches is reset when the logic is initialized by input INITIAL
applied to lead LD15 and an OR gate 115. This input takes the form of a negative going pulse applied to the master reset lead MR~s of the latches ~shown specifically only for the DONE latch). Once reset by the initializing signal, the latches operate in the usual manner depending upon the input signals applied to the set S or reset R inputs of the respective latches. Thus, upon initialization, the latches are reset to a predetermined state and thereafter, the out-puts of the latches are determined by the most recent input ~ -- , ~"
- .

signals applied to the S and R inp~lts thereof.
Returning to the de-t~ils of the steps 10 - 19, once the logic is initialized, the master counter CTRl is enabled and begins to count (step 10). At the end of count 8, the scan solenoid is energized (step 11) in the followinq manner:
The operations of the SCAN multiplexer circuit 124M, include logic elements which comprise the end of scan switch S2, the pull-up circuit 101B, NAND gate 104, INVERTOR
118, NAND gate 116, OR gate 121, and the SCAN MULTIPLEXER
circuit elements in the dashed block 124M per se. When the momentary switch S5 (FigO 4) triggers the logic via the regulator 88, the counter CTRl begins to count. At this point, subsequent to initialization, the output of the NAND
gate 104 is low because the end of scan switch S2 is not yet closed. Note that the ~5 volts DC is applied via the pull-up circuit 101B to upper input of NAND gate 104 and that at this point, NAND gate 103 will also apply a logical 1 to the lower input of NAND gate 104. As a result, NAND
gate 104 applies a low output or logical 0 to the input of 20 the Inverting gate 118. The inverting gate 118 therefor applies a high or logical 1 input to upper input of NAND
gate 116. As the home switch Sl remains actuated at this ; time, a logical 1 or high input is also applied to the center input of N~ND gate 116 through conductor LD12. When the counter CTRl reaches a count of 8, the 2 M signal goes to a logical 1 and this high level is applied through lead LD13 to the NAND gate 116. At the count of 8, all input con-ditions for NAND gate 116 are met and a logical 0 output is applied to OR gate 121. The OR gate 121, whose inputs are inverted, in turn applies a logical to the scan multiplexing circuit 124M at the upper input of AND gate 144L. In turn, - .
. , :. :
''` ,, :

the multiplexiny circuit 124M which is enabled, as aforesaid for LDC mode operations, ~ates the logical 1 through ~ates 144L, 134 and 124 to provide a logical 1 output signal on conductor 164, SCAN MPX. Suitable means, such as a solenoid I ~Fig. 1), is provided to respond to the logical 1 output of the scan signal multiplexing circ:uit 124M and causes the scan carriage and associated op-tics to be displaced toward the end of scan position. As the scan carriage leaves, the home switch Sl is opened or deactivated ~step 12). When the home switch Sl opens, in the scan solenoid is deenergized, (step 13) and the master counter CTRl is cleared (step 14).
Referring particularly to the LDC logic, it will be seen that with the home switch Sl in an open condition, the HOME
SW input applied to the middle input of NAND gate 116 goes to a logical 0. This causes the output of NAND gate 116 to go to a logical 1. The OR gate 121, whose inputs are in-verted, then causes the AND gate 144L to be disabled where-upon NOR gate 134 and invertor 124 of the buffer 64 act in conjoint to apply a disabling or logical 0 to output 164, SCAN MPX. The Zero (0) level at output 164 causes the scan solenoid I (Fig. 1) to be deenergized (step 13) through the action of a circuit similar to Q5 and its related components O
When the home switch Sl opens, the complemented input HOME SW on conductor LD14 goes from a logical 0 to a logical 1. The resulting positive transition is applied to the lower input of NAND gate 117 whose other input is already enabled from the output of invertor 118. The ].ow is processed through OR gate 190 and NAND gate 191 to clear the counter via the low output LDC MAS CTR CLR on lead 012 (step 14). More specifically, the inverting gate 118 applies a - ~2 -' logical 1 to the ~Ipper input of NAND gate 117 since the end of scan switch S2 is still opened. This should be Pvident by tracing th~ gates 102, 103, 1()4 and 118. Therefore, when the home switch Sl is opened, a ]ogical 1, HOME SW is applied throuyh lead LD14 to the lower input of the NAND gate 117, the HOME SW signal going to a logical 1 as the scanning means leaves the home position and opens the home switch Sl. In turn the NAND gate 117 changes it:s output from logical 1 to logical 0. The OR gate 190, whose inputs are inverted, changes its output from a logical 0 to a logical 1 and applies the resulting high level to the upper input of NAND gate 191.
At this point the lowe.r input of the NAND gate 191 is at logical 1 as the logical 1 output of the NAND gate 103 is applied thereto. NAND gate 191 therefore applies a logical 0 or clear signal to the master counter CTRl via the path ~ 012 (step 14). Note that the other input at pin b of the : NAND gate 191 is logical 1 from the NAND gate 103 so long as the LDC mode switch S6 remains open, signifying that the machine is in LDC mode and no failure is indicated on input FD. Conversely, if the machine is not in the LDC mode, a logical 0 is applied to the lower input of NAND gate 191 from the gate 103 to prevent resetting of the counter CTR1.
Once started by the operation of the SCAN solenoid, the scanner carriage continues to move to the end of position (step 15). When the carriage reaches the end of scan position, the end of scan switch S2 (step 17) is closed and a pawl and ratchet mechanism is caused to latch the carriage and prevent it from flying back or returning to the ., .. . ;, .
'~

:~5~6~6 home position (step 16). For a more det~iled descrlption of the mechanism ~ssociated with the mean~ for locking the carriag~ at the end oE -the s~an position, one m~y re~er to the above mentioned pending application Serial No~ 163,550~
Referring to the logic circuitry, when the scan carriage reaches the end of scan position, it closes the end of scan switch 52. As S2 closes, it applies a logical O to the upper input of the NAND gate 104 via the pull-up circuit lOlB. In turn, the NAN~ gate 104 changes its output to a logical 1 and applies it to the invertor 118. The output of the invertor 118 goes low and applies a logical O output to the upper inputs of NAND gates 116 and 117. At this point, it will be recalled that the opening of the home switch Sl has already disabled the NAND gate 116 through the application of a logical O to the middle input thereof.
However, when the output of NAND gate 117 goes high with the closing of the end of scan switch S2, the counter CTRl is allowed to start counting since the clear level on conductor 012 is released. Also, the PAPER FEED
INHIBIT solenoid is allowed to release and the WAIT indication is e~tinguished (step 18). More speci~ically, as the scanning means reaches the end o~ scan position, it actuates the SCAN switch S2 and closes it. In turn, the SCRsQ5 and Q10 are turned off by the closiny of the switch S2 due to a-loss of signal at their gate electrodes. Thus, when S2 closes ground is applied to the pull-up circuit lOlB. In turn, the pull-up - circuit lOlB, NAND gate 104, inverting gate 113 and OR gate 11 respond and apply a logical O to the trigger leads of the SCRsQ5 and Q10. Furthermore, the master clock counter is now allowed to count ~ecause the disabling of NAND

-::' ..~ ,~ ,, gate 104 and the action of INVERTOR 118 cause NAND ga-te 117 to be disabled whereupon a logical 1 is applied through the action of OR gate 190 and NAND gate 191 to the counter via the output path 012 (LDC MA5 CliR CLR), as aforesaid. This allows the counter to start counting again, by removing the forced clear signal or logical 0 on conductor 012. Thus, in short, the steps 11 through 18 as outlined in Figure 13 are implemented by the LDC logic as the scan carriage moves from the home position to the end of the scan position and the home switch Sl and the end of scan switch S2 are opened and ; closed, respectively.
Once the mode is changed as described above, the machine cycle out time count COmTnenCeS (step 19). If the document original is not fed into the document feeding means 40 prior to the expiration of a given period of time, such as 26 seconds, the machine will cycle out. The machine cycles out as follows: Once the counter is started, again upon the actuation or closing of the end of scan switch S2, it con-tinues to run till a certain count or period of time (e.g., 16 seconds) runs out. If the operator has not yet fed the document original, then the counter CTR2 provides a signal 21u and applies this signal through an input lead LDl9 and NAND gate 293 to shutdown path 016 (LDC EXT SHUT DOWN Fig. 9) for causing an extended shutdown cycle. The foregoing occurs SG that if no document original is fed in time, no count clear signal will appear at the master counter clear path 012 LDC
MASTER CLR. (The manner in which master clear signal appears at the output of NAND gate 191 is described be~ow in connection with the LDC mode of operation).
Referring to Figure 9, once the input lead LDl9 goes to logical 1 from the ~ input, then the lower input of ~ , ' " . . . . . .
: , . . . .

NAND gate 293 assumes this logical 1 level. The upper input of NAND gate Z93 is already at a logical 1 from the ou-tput of NAND gate 103 in the LDC mode. Co~sequently, a low or LDC EXT SHUT DOWN signal appears at the ou-tput lead 016 and causes machine shutdown.
In summary then, the rnode change entails the follow-ing. The operator places copy paper or sheets of large or small size in the paper tray. The copy papers may be in a cassette form. If the machine is in the LDC mode, i.e., if the document original feeding means is in the engaged position, the PRINT or ~IGHT ORIGINAL button is pressed. In response to this actuation, the control logic circuitry including the LDC logic responds and initializes the machine. If the machine is in the base mode, i.e.~ if the document original feeding means is not in the engaged position, the operator rotates the lever arm of the feeding means in a clockwise direction so that the feeding means is brought into engagement and becomes operative. Suitable sensing means (e.g.,S5) is used to sense the fact that the machine is being changed to LDC mode from the base mode or is already in the LDC mode and mandates an appropriate initializing sequence. The LDC
mode sensing means (S6) conditions the machine logic so that LDC logic outputs are selected or multiplexed to provide necessary signals for actuating various means in setting up the machine in the LDC mode. The LDC logic is so designed that it provides output signals for enabling the scanning means to move from the home position to the end of scan position. Suitable sensing means (Sl and S2) are utilized by the LDC logic in completing the steps necessary in setting up the machine in LDC mode. In the present illustrative embodiment, suitable means (e.g., a pawl and ratchet mechanism), - 4~ -.. . . .

used in provi~ing the fly~ack operation to return the scanning means to the home position Eor each new copyi~g cycle in ~he base mode, are also used in moving the scanning means to the end of scan position and retaining them in -this position for the LDC mode of operation. Thus, in accordance with the present invention, control circuitry is provided in a re-producing machine designed to operate in different modes that includes means for sensing the machine status in terms of i~s mode and means for changing the machine automatically to a new setting in response to a command.
(B) THE LDC MODE OF OPERATION
The following describes a cycle of operation of the machine in the LDC mode in making copies with the scan carriage and optical arrangements locked in place for the - LDC mode and the document original feeding means 30 in an engaged position as shown in solid lines in Figure 1. Re-ferring to step 0 as depicted in Fig. 14, it will be seen that two situations may obtain at the start of the LDC cycle.
The first situation is that the machine just completed the ~- 20 mode change and has not yet cycled out. In this case, the document original must be fed prior to the termination of the cycle out time interval which, for examplel expires 26 seconds after the end of scan switch S2 has been closed. The second situation is that the machine is already set in the LDC mode but not yet started due to a completed timing out sequence or the like. In this case, the operator may start by pressing the PRINT 53 or LIGHT ORIGINAL button 54 to start the machine (step 0).
Referring back to the first situation, when the document is fed, the leading edge of the document will open or actuate either one or both of the normally closed paper ':- . ,. , . , , : ',,~, , ' ' ' ' 1~5~
sensing switches S7 and S8 (step 1). In response to the opening of switches S7 and S8, ground is removed from pull~up circuit 101C to cause the application of a logical 1 level to input a of a NAND gate 211. This action, as will be seen below, causes the NAND gate 211 to clear the counter CTRl and initialize the LDC logic element~s for a copy cycle. More particularly, as a high level is applied to input b of NAND
gate 211 from the output of NAND gate 103 in the first situation being discussed, the logical 1 level applied to input a will cause the output of the NAND gate Zll to change from a logical 1 to a logical 0. This signal is applied to a one shot multivibrator 213 through an OR gate 214, whose inputs are inverted, and triggers it. In turn, the multi-vibrator changes its output from logical 1 to logical 0.
This output of the multivibrator 213 is applied to conductor 011 where it is employed as clearing signal LDC ONE SHOT CLR
for the counters CTRl and CTR2. Backtracking a bit, if a document original is not fed before the cycle out time interval (e.g., 26 seconds) then the multivibrator 213 would not be triggered since the switches S7 and S8 would remain closed.
Consequently, the counters CTRl and CTR2 will continue to count and~ at a 2 u count, the +5 volt D.C. regulator will be turned off and the machine shut down.
Upon a termination of the duty cycle of the multi-vibrator 213, the clearing pulse developed from the actuation or opening of the switches S7 and/or S8 terminates leaving counters CTRl and CTR2 in a cleared condition. Counter CTRl then starts again to count from zero and provide count signals. At the same time, the LDC logic goes through certain logic steps and provides output signals necessary to operate the controlled elements and effect xerographic - ~8 -~ . . .
.

1C~5~
operation in the following manner.
Referring to Fig. 14, as the counter begins to run in response to the actuation of t:he document sensing switches S7 and S8 (step 3), -the pull-up circuit 101C causes the NAND
gate 211 to provide a logical 0 output in the manner des-cribed above. Thereafter, as will be explained in detail, the enabling of NAND gate 211 causes a DONE latch to be set (step 4) and the LDC logic circuitry is responsive thereto to provide a photoreceptor charying signal via the charge multiplexing circuit 128M (step 5).
Turning specifically to the details of the logic, the output of the NAND gate 211, under the contxol of the document switches S7 and S8, provides a logical 0 signal, as aforesaid which is inverted by INVERTOR 212 to set the DONE latch through the enabling of NAND gate 219 and the action of one-shot multivibrator 213 which is enabled through an OR gate 214 whose inputs are inverted. Here, it should be noted, that the DONE latch was previously reset by the master reset or MR input which is generated by the 2Q INITIAL signal applied through gate 115 from conductor LD15.
Conversely, the DONE latch is reset at the completion of the copy cycle by a logical 1 signal, at the output of NAND gate 211 after the document has been fed. This 1 level is then applied to NAND gate 231 which causes an actual resetting of the DONE latch. The logical 0 generated by NAND gate 231 occurs in response to the enabling of the gate by the simultaneous existence of logical 1 levels on each of the three inputs thexeto. The logical l's on these inputs are generated in the following manner. The upper most input is applied from INVERTOR 217 which receives a logical 0 from NAND gate 215 upon an enabling of this gate wherein the ,, . :
.: , .
~, . . .
' ' ' . .: ' :~5~
input to NAND gate 215 which is here of principal concern is supplied from the Q output of the one-shot multivibrator 213 when the one-shot is triggered. The center input to NAND
gate 231 is developed from the output of N~ND gate 211 which senses paper in the document feeder when the machine is in the LDC mode. Therefore, this input to NAND gate 231 goes high to enable resetting when the document to be copied has been fed through and is out of the feeder 30. The lower input to NAND gate 231 is applied from INVERTOR 242 which receives a logical 0 from the LDC EXPOSUR~ latch signifying that exposure is off. Thus, it will be seen that the DONE
latch is reset after (1) resetting of the counters by the one-shot multivibrator 213 is initiated, (2) the exposure latch is OFF and (3) the document to be copied has passed from the feeder 30 in the LDC mode and hence, the DONE latch is set during the copy cycle and reset when the LDC copy cycle has been completed.
As noted before, the one-shot multivibrator 213 was triggered through the action of OR gate 214 whose inputs ~-~ 20 are inverted and NAND gate 211 which sensed the presence of paper in the document feeder during LDC mode operation. In this manner, the output of OR gate 214 changes from a logical 0 to a logical 1 and causes the one-shot multivibrator 213 to trigger. Once triggered, the one-shot multivi~rator 213 generates a positive and a negative going pulse at its out-puts at pins Q and Q, respectively, until the duty cycle terminates whereupon the Q and Q output levels are reversed.
The resulting positive going pulse from Q prior to termination of the duty cycle is applied to NAND gate 215.
The four inputs at the pins a, b, c and d, of the NAND gate 215 control the selective enabling of this gate in .
;
:

the well known manner in that a low output is produced only when all oE the inputs thereto arP high. Therefore, referring to the logic circuit, the input a to NAND ga~e 215 will be a logical 1 when the presence of the large paper cassette is sensed by the switch S4 as aforesaid and the LDC mode is established ox any time copy paper is in the machine regard-less of the mode~ The presence of a large paper sheet is indicated by the copy paper switch S4, as shown in Figure 6, since the switch S4 is arranged to close and apply ground to 10 the pull-up circuit 101D when a large paper cassette is present. In turn, the pull-up circuit provides a logical 0 to input a of the NAND gate 216. At this point note that the gate 216 is disabled by the LDC NAND gate 102 output J
which is low. The output of gate 102 is low if there is no jam (JAMF or FD is logical 1) and the LDC mode is set.
Hence, the NAND gate 216 applies this intelligence from the presence of large cassette in the LDC mode, in the form of a logical 1 to input pin a of the NAND gate 215. The output ` of 216 is high in the LDC mode, no matter which size cassette20 or paper is loaded, but low if in the base mode and a large cassette is in place in the machine. This prevents operation - of the machine in base mode with a large cassette. If the machine has no copy paper supply in place in the cassette, this condition is detected by the paper sensing switch PAP
SW (Fig. 3) and applied via LD6 and wired OR gate 216', to the output path 00 in the form of logical 0 to energize the ADD PAPER lamp 51 and to alert the operator.
Suppose, for instance, that the machine is in the base mode and a large size paper cassette is in place. The 30 large size paper condition is detected by the copy sheet `~ sensing switch S4 while the base mode is indicated by a hiyh .~ ~ . . . . .
~ , ''"' , ~ S~(3~;
at -the output of NAND ga-te 102. Therefore as both inputs are high, the gate 216 provides a logical 0 output and the o~ gate 216' provides a logical 0 output causiny the ADD
PAPER lamp to be energized. However, if the rnachine is in the LDC mode, the gate 216 provides logical 1 output signal regardless oE the size paper in place which is applied to input a of the NAND gate 215 via -the OR gate 216' and prevents the lighting of ADD PAPER lamp. The foregoing features, in effect, make it possible to use the machine to make copies on large or sm~ll papers when the machine operates in the LDC mode but prevents the machine from copying on large paper when it operates in the base mode.
Now referring to input c of the gate 215, it will be appreciated that prior to starting a copy cycle~ the Exposure latch is in a reset state due to the initial;zing signal applied to the MASTER RESET MR input thereof so that - the Exposure latch provides a logical 0 output at this point in the operation being described. This output is in-- verted by an Invertor 220 and applied in the form of a logical 1 to input pin c of NAND gate 216. Similarly, the input to pin d of NAND gate 215 is at this point a logical 1 because the complement of the initializing signal INITIAL
from input path LD15 as applied to OR gate 115 is a logical 1 as is the output of NAND gate 103 which is also applied to OR gate 115.
Thus, in summary, at the beginning of a copy cycle, the POSITIVE going pulse from the Q output of the one-shot multivibrator 213 is gated through the NAND gate 215, if copy paper is loaded. The gate 215 inverts the positive going pulse into a negative going pulse and applies it to an invertor 217 as well as to NAND gate 241. The invertor 217 ~OS~ 6 in ~urn applies the positive going pulse to the lower inpu~
of NAND gate 219 and the upper input of NAND yate 213. The upper input of NAND gate 219 is at a logical 1 as the in-verted output of NAND gate 211 is supplied thereto through invertor 212. It may be recalled that at this point, the leading edge of the document original has already been sensed as the switches S7 and/or S8 are opened by the document to provide a high input to the upper input of NAND gate 211 while the lower input thereto is also high due to the con-dition of NAND gate 103. This low output of NAND cJate 211 is therefor inverted by INVERTOR 212 and applied as a logical 1 signal to the upper input of the NAND gate 219. The NAND
gate 219 therefore applies a negative going pulse to the Done latch to cause the same to be set. When set, the Done latch provides a positive or log~cal 1 output to its Q out-put. (Note that when the INITIAL reset signal resets the Done latch, it causes a logical 0 to be applied to the Q).
The output of the Done latch is also directly applied to the LDC charge multiplexing circuit 128M via AND gate 148L
and NOR gate 138 so this high level is applied to output 168. In short, the foregoing conditions, namely, sensing of the leading edge of a document to be copied ancd presence - of paper causes the LDC logic to operate and provide a charge control signal for actuating the charging means (not shown) of the xerographic machine (Fig. 14, Step 5) at the output of the buffer 64, as a step of the xerographic process.
Conversely, when the document to be copied is fed through and exposure latch is off, the Done latch is reset by the action of NAND cJate 231, to await the next cycle of operation.
At this point, it may be recalled that with the LDC switch S6 open for the LDC mode, the LDC NAND gate 102 ., .
,'~ ' . .: -j l~S()~
sets the inverting gates 153 and 155 to apply a logical 1 to the LDC mode selection AND gates 141L through 148L. The same LDC mode selection signal is inverted by invertors 154 and 156 to disable the base mode selection AND ga-tes 141B
through 148B. As a result of the foregoing, the output of the Done latch is applied to the LDC charge selection circuit via the LDC rnode AND gate 148L and provides a charge signal for effectuating the charging stepsO In the base mode, the charge multiplexing circuit 128M would provide a logical 1 output or charging signal by applying a logical 1 output from the charge latch output CHARGEF (Fig. 5; 71C), as applied ; via LD16 to input a of AND gate 148B, to output 168 of the multiplexer 128M. However, under the conditions presently being discussed, the AND gate 148B is disabled by a logical 0 applied to the input b from the inverting gate 156.
Referring again to the flow chart in Fig. 14, when the counter CTRl reaches a count of 13, (Step 6), the scan solenoid is energized (Step 7) in the following manner. As stated earlier, the output of NAND gate 211 goes low as soon as the leading edge of a document is to be copied in the LDC mode. This low is inverted at gate 212 and applied to the upper input of NAND gate 241 to partially condition this gate. The rernaining three inputs to NAND gate 211 are con-trolled from top to bottom, by the output of the Exposure latch through INVERTOR 242, the count 13 output of counter CTRl on line LD9 and the inverted output of the Developer latch for the base logic as applied on line LD10, respectively.
At this point, the Exposure latch is not set and provides logical 0 output. This means that the Invertor 242 applies a logical 1 to its respective input to the NAND gate 241.
Similarly, the Developer latch of the base logic provides a ... . .

^ : ~, .. .

~5~
logical 0 si~3nal for DEVF inp-lt on line LD10 at this point and this logical 0 is inverted by gate 243 and applied in the form of logical 1 to the lowest inpu-t of NAND gate 241.
The output of the development latch (Fig. 5; 7a) takes the stated c~nditions since it was reset initially and has not been set at this point. Referring to Figures 5 - 11, the re-setting of the development latch during initialization may be seen by an appreciation that for an operator to initiate a copying op~ration in the LDC mode, either the LDC lever 31 is moved to the LDC position or PRINT button 53 is pressed.
In response to this action, the LDC mode switch S6 opens so that when the pull-up circuits are energized by the action of the momentary switch S5, a low is produced at the output of NAND gate 102 and translated to a high by NAND gate 103.
This high is inverted by gate 295 whereupon the PWR INITIAL
output on lead 014 goes low to cause resetting through the Master Resets~ as aforesaid.
Thus, three of the four inputs to NAND gate 241 reside at a logical 1 and hence are enabled. Accordingly, when the count 13 signal from the counter CTRl is applied to line LD9, NAND gate 241 is enabled and provides a logical 0 output. Thus, the count 13 signal (CT13) from the master counter CTRl applied via the count input lead LD9 causes the SCAN latch to set and provide a logical 1 output. In turn, the SCAN latch output is inverted by gate 245 and applied to one input of OR gate 121, whose inputs are inverted.
The OR gate 121 in turn applies a logical 1 signal to the LDC mode select AND gate . ' ' .

' . ~ .

~35a~6~
144L of the scan multiplexiny ci,rcuit 12~M.
The SCAN multi.plexiny circui-t 124M provides the high or lo~ical 1 output signal on lead 164. With the scan solenoid actuated, the output of the scan multiplexing circuit 124~ is employed to enable the feeding of copy paper.
This signal may be applied to a suitable means, such as a solenoid and SCR actuating means of the type shown in connection with paper feed inhibit solenoid. When the scan multiplexer output goes to a logical 1 from a logical 0, in response the scan latch being set, the SCR energizes a single c~cle clutch ~Fig. l,;III) and allows it to rotate. This enables the copy paper feeding means to feed the copy paper.
For the more detailed description of an illustrative example of the foregoing, one may refer to the aforementioned copending application Ser.ial No. 163~550.
Returning to the flow chart of Figure 14, at a count of 16l the Exposure and Fuser latches are set and provide necessary signals through the corresponding multiplexer ~, circuits 125M and 127M to implemen~ the exposure and fusing steps (9 and 10~ in the exemplary xerographic copying process, These processing steps are implemented in the LDC
,logic according to the instant invention through the operation of the SC~N latch and the counter CTRl. When the scan latch is set it provides a logical 1 at its output to partially . enable NAND gate 246 at its upper input with a logical 1 signal at the end of step 7. The counter CTR1 provides a count 16 signal ~24M) in the form of a high so that the complemented input on lead LD20 which i5 connected to an invertor 247 is low. Prior to count 16, the output of invertor 247 resides at a logical 0 and upon the arrival of the complement of the ,, .

.~ , 6q~
count 16 input, the output of gate 247 changes to a logical 1 which is applied -to the lowe~ input of NAND gate 2~6. The coincidence of logical l's at both inputs to NAND gate 246 causes the output of this gate to go to a logical 0. This sets the Exposure latch which pro~vides a high output. The output of invertor 22 thereEor changes to a logical 0 which is applied to the Exposure multiplexer circuit 125M to change its output on lead 165 from a logical 1 to a logical 0 through the action of AND gate 145L, OR gate 135 and inverting gate 125. The logical 0 on lead 165 is then used as A control signal for enabling the exposure means in the xerographic machine. This implements the steps of imagewise exposing the document original in the xerographic process.
As noted in Figs. 8 and 11, the exposure control signal EXP MPX present on lead 165 is also applied to the upper input of AND gate 141B for generating a signal in-suring a disabling of print button 53. Gate 141B is already disabled in the LDC mode since the center input to AND gate 141B is low. This i5 the case since the NAND gate 102 applies a logical 0 to the INVERTOR 153 and the output pro-duced thereby is again inverted by gate 154 so that a logical 0 is applied to AND gate 141B. Conse~uently, in the LDC
mode, AND gate 141B applies a disabling signal in the form of a logical 0 to the output path 161 which is used to disable the PRINT button. So long as the PRINT button disable signal is applied to the machine, the operator cannot affect the operation of the LDC mode of the machine by tampering with the PRINT button 53.
The operation of the Exposure latch also causes the fuser of the machine to be energized as indicated in step 10 of Figure 14. The output of the Exposure latch is used .

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to set the LDC Fuser latch through invertor 242. The LDC
Fuser la-tch was reset through the master reset MR when the logic was initialized. This caused its output a to be logical 0.
Now, the change in the output of the gate 2~2 from a logical 1 to a logical 0 places a negative transition on the set input of the Fuser latch. The Fuser latch in turn, is set and changes its output to a logical 1 for application to fuser multiplexer circuit 127M. The fuser multiplexer 127M
provides in response thereto a fuser control signal in the form of a high on output lead 167. This fuser signal (FUSER
MPX) is used to tu.rn on the fuser (Fig. 1~ in the xerographic machine to provide the fusing energi~ation according to step 10. In ~ummary, then, the Exposure and the Fuser latches are operated at the count of 16 (2 M) by the counter CTRl and, as a result, the imagewise exposure and fusing operations of the copying process are implemented.
The counter continues to count and when it reaches . count 20 (step 11)~ the Scan latch is reset (step 12) and .: 20 the counter is cleared (step 13). The clearing of the counter and resetting of the scan latch is accomplished under the control of the one shot multivibrator 213 which is again triggered at count 20 to implement both the functions of , clearing the counter and resetting the scan latch. The triggering of the one shot multivibrator is controlled under these conditions by the output of NAND gate 261 which is : connected to input a of OR gate 263. The NAND gate 261 is - preconditioned to trigger the one shot 213 at count 16 when the 24M signal on lead LD20 is applied to the inverting gate 30 247 so that a high input is applied to the NAND gate 261.
At the count of 16, the top and bottom inputs to the NAND

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gate 261 are also held at logicaL 1 due to the condition of INVERTOR 243 and the EXPOSURE latch set previously. Thus, under these conditions the input to the inverting gate 243 on lead LD10 is at a logical 0, clue to the condition of -the Development la-tch 71A (Fig. 5) in the base 10-3ic which is configured to be set, with the machine in the LDC mode, by a low level (DEV SET LDC) produced on lead 09 from the output of NAND gate 130. More particularly, when the Done and Exposure latches are set, the NAND gate 130 goes from a logical 1 output condition to a logical O at the count of 8.
Referring to the NAND gate 130, it will be seen that the upper two inputs come from the Q outputs of the Exposure and Done latches and thus reside at a logical 1 or enabling level when the latches are set. Up to count 8 (23M) the lowest input to NAND gate 130 is at a logical O since the input on lead LD13 is low; however, this input goes high at count 8. Therefore, after count 8 and the setting of the Exposure and Done latches, NAND gate 130 changes from a logical 1 to a logical 0. The output of the NAND gate 130 is applied to the output lead LD9 D9 to provide a setting signal (DEV SET LDC) for the development latch to actuate the development means of the xerographic machine. Thus, under these conditions, the top input to NAND gate 261 is - at a high level to enable this gate. The LDC Scan latch was previously set at the count of 13 (step 6). This actuated the solenoid II and one cycle clutch (Fig. 1) and fed a sheet of copy paper. Since their functions have been per-formed a resetting of the Scan latch through the action of the NAND gate 261 and the ONE SHOI' multivibrator 213 is appropriate. Up to a count of 20, as aforesaid, all of the inputs to NAND gate 261 are in a high state as a result of

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the opera-tion of the logic to -this point except fo~ -the input connected to the 2 input on conductor LDll. Therefore, at the count of 20, the input on the count lead LDll goes high to fully enable the NAND yate ~61. The NAND gate 261 accord-ingly changes its output from a logical 1 to a logical 0.
The output of the NAND gate 261 is applied to the a input of OR gate 263, whose inputs are in~erted, into the invertor 264 to trigger the ONE S~OT mult:ivibrator 213. When the ONE SHOT multivibrator 213 switches, it applies a reset pulse or low level to the Q output thereof. This level persists for the duty cycle of the One shot and is applied to the reset input R of the Scan latch to cause resetting in the manner indicated in step 12. Additionally, the multi-vibrator 213 also provides a negative going output pulse at its Q output and a positive going output pulse at its out-put Q. The negative going pulse is applied as the LDC ONE
S.HOT CLEAR signal via 011 and clears the master countex CTRl (step 13).
Resetting of the Scan latch changes its output to 20 logical 0. In turn, the gates 245, 121 and the scan multi-plexer circuit 1~4M respond and provide a logical 0 output on lead 164 to de-energize the scanning means~ The one shot clear pulse on lead 011 clears the counter CTR1 and when re-leased at the end of the duty cycle allows it to start counting again (step 14). This point in the cycle time is analogous to the scan carriage deactuating the home switch Sl in the base mode of operation. In the LDC mode, however, the document original moves while the scanning arrangement is locked in a stationary position and the relative move-ment between document original and the scanning element is used, in effect, to simulate the base machine.

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~-ter clear, -the master count CTRL continues to count. A~ a count of 8 (s-tep 15) th~ developer latch is set (step 16) and the clutch mechanism in the machine is energized.
The counter CTRl applies count 8 signal (23M) to input lead LD13 and lower input of N~ND gate 130 (Fig. 9). At this point, the upper two inputs from the Done latch output Q and from the Exposure latch Q are at logical 1 as aforesaid.
Therefore, at a count of 8, the NAND gate 130 provides a logical 0 output to lead 09. This signal DEV SET LDC is applied from the output lead 09 to the associated development means in the xerographic machine to cause a development of the image-wise exposed photosensitive insulating layer 12 in the usual manner (step 16).
The counter continues to count to the count of 141 (step 17) and sets the coirlcidence latch COINF (Fig. 5) in the base machine (step 18) and clears the counter CTRl (step 19). In the ba~e machine, the coincidence latch COINF is ; utilized to signi~y the fact that the number of the copies that have been set by the operator have been made and is initially set to a desired number of copies. The base logic is designed so that ~he coincidence latch sets after the count of 141 after the coincidence between the copies made and set occurs. In the base machine, this will occur after the last copy set by the dial is made. For the more detailed explanation, one may refer to the above-mentioned U.S. Patent ~o. 3~813,1S7.
In the LDC mode, the present logic is designed to utilize the ~oregoing features in the base machine that provide the count 141 output. More specifically, referring to Figures 8 - 11, the setting signal for coincidence is applied to NAND gate 291 through input lead LD17.~ This signal .

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is ~pplied to tlle lower input of NAND cJate 291 in the form of lo~ic~l O for COINF-DI~.VE` MPX state. In turrl, the ga-te 291 applies a locJical 1 signal to th~ output lead 015 which acts as the 141 DISABLE signal. It: is noted, as indicated in the abovementioned application Serial No. 163,550, that in the LDC
mode, the machine is designed to make one copy at a time so that coincidence occurs after each copy is made. Thus, the timing pulse count of 141 is initiated after the development step for the one copy is started. The present logic for the LDC mode is designed to utilize output signals from the base logic network to provide the count 141 signal and for clearing the counter. As noted, the base logic is utilized in energi-zing the developer at the count of 8, resetting the coincidence latch COINF in the base logic at the count of 141 and for clearing the counter CTRl.
The means for enabling and disabling the paper motion sensing means associated with the paper jam detection circuit in the copier/duplicator machine is also utiliæed by the machine in the LDC mode of operationO In the LDC mode of operation, the LDC logic counts up to 84 (step 20) after the counter is cleared in response to a count of 141. Circuits for detecting machine failure conditions, such as jam detect circuit in the base machine, provide a machine failure signal upon the detection of such condition. This signal is utilized by the LDC logic and is applied thereto through the failure - detect path LDl, which is connected to the lower input of the LDC mode gate 102. When a failure condition is indicated by - a logical 0 applied to the lower input of the LDC mode gate 102, the LDC mode gate 102 is disabled and the machine is put into an interrupt mode for clearance of the jam or the like as described in detail in aforementioned U.S. Patent No. 3,813,157.
If the failure ' " '`

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1~5~i06 condition is not detected, ~or a given interval, indicated by step 22, then certain means used for jam condition detection are disabled (step 23). If no failure is detected, then at this point, the machine goes into shut down cycle.
(C) SHUT DOWN CYCLE
The shut down cycle of the machine in the auxiliary or LDC mode of operation is illustrated by the flow charts of Figure 15. The shut down cycle may involve two situations~
The first situation occurs where the trailing edge of the copy sheet from the paper cassette i5 sensed by the trailing edge sensing switch S3 before the end of the document original is sensed at the document feeding station by the document sensing switches S7 and/or S8. A second situation involves the converse of the first situation described above, that is, the trailing end of the document is sensed by the switches S7 and/or S8 before the trailing edge of the copy sheet is sensed by the switch S3. The first situation is initially considered.
Assume no malfunctions have occurred in the copy - 20 cycle and copy paper length is less than that of the document original. Under these conditions, the trailing edge of the copy paper from the paper cassette is sensed by the switch S3 and in response thereto the LDC logic resets the DONE
latch. More particularly, the switch S3 opens as it senses the trailing edge of the copy paper and provides a logical 1 signal through the pull-up circuit 102E to the center input of NAND gate 281 to partially enable this gate. The other two inputs of NAND gate 281 are under the control of the outputs of the Exposure latch via the EXPOF signal and the outputs of coincidence and development latches signified by input COINF DEVF MPX as applied to lead LD17. At this point, .~

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the Exposure latch ls in its set condition and applies a logical 1 to the upper input of NAND gate 281 via the NAND
gate 220, output lead 08 and lead EXPOF. Thus, the coin-cidence and development latch status signal, COINF. DEVF. MPX
provides the last oE the necessary signals to the lower input of the NAND gate 281. In response to the coincidence o~ the three logical 1 signals, the NAND gate 281 generates a negative going pulse. The significance of the control of NAND gate 281 by the EXPOF and COINF. DEVF. MPX signals is that if there is no more original to copy in the document feeder, the copy cycle may be shut down. This condltion is recognized when the Developer latch is still set and the Exposure latch is also set. The simultaneous occurrence of these signals - causes a logical 0 at the output of the NAND gate 281 which ; acts to reset the DONE latch.
The negative going pulse from the output of NAND
gate 281 is applied to a reset input R of the DONE latch to reset (step 26) this latch to a DONE state where a logical 1 output is produced at the output of invertor 221. The DONE
latch provides a logical 0 output signal at the Q output thereof in a reset condition and this is applied ~o the charge multiplexer circuit 128M to provide a negative going pulse at output 168 which is employed to turn off the charg-ing means. This output is also applied through gate 130 and lead 09 as the DEV SET LDC signal which is employed to turn off the developer while count clear signals are generated through the action of gates 221, 222, 190, 191 and master counter clear path 021 (step 29).
The counter is held clear until the document origlnal deactuates or closes the document sensing switches S7 and/or S8 (step 30). Once these switches are closed, the - . ' ' ' .

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~5a:~6~i counter again starts to count,. This i5 accomplished through gates 211, 212, 222, 190, 191 and lead 012 LDC MAS CTR CLR
pAth .
Note that when the Done latch i~ reset and the document switches S7 and SB are still actuated or opened by a ~ocument original, the output on lead 01~ is held at logical O by NAND gate 191 which receives a logical 1 from OR gate 190, ' , whose inputs are inverted, in response to a logical 0 from NAND gate 222 which senses the state of the Done latch and the logical 1 from the INVERTOR 212. The output lead 012 being at a logical 0, clears the counter CTRl and holds it cleared until the level on lead 012 changes to a logical 1.
This occurs when the document switches are closed. As soon as the clear signal is removed, the counter again begins to ' count.
- Reclosing of the switches S7 and/or S8 restarts counter CTRl (step 31) and outputs a pulse as a billing count pulse which is applied through NAND gate 286 (step 32) to lead 02. At the count of 8, the 23M signal applied to lead LD13 enables NAND 283 to reset the Exposure latch (step 34).
In turn, the Exposure latch deenergizes the exposure means through the invertor 220 and the multiplexing circuit 125 of the buffer 64. Note that the upper input to NAND gate 283 resides at a logical 1 level from the reset condition of the Done latch due to the action of invertors 221 and 284 as well as NAND gate 284~ The Done latch provides logical 0 at ltS output at this point.
In response to this enabling, the NAND gate 283 applies a low or negative going level to the reset terminal R of the Exposure latch and causes it to be reset (step 34).
During the interval when the Done latch is reset and the Exposure latch is still set, the three inputs to ~ .;

the hillin~3 N~ND gate 286 are e-t and thereby enable the N~ND ~3ate 286 to provi~e an appropriate bi:Lling count signal to the billing meter sui-tably connected to the present 1ogic circu:itry ~step 35) as described in detai~ in aforementioned U.S. Patent 3,971,919.
While the Exposure latch is set, indicating a copy cycle in process, it turns on the WAIT ~isual indicating means through gates 242 and 111. At a count of 8, the WAIT lamp 50, which signfifies an LDC "not ready" condition, is extinguished (step 36). This signifies to the operator that the LDC
machine is now ready to receive another document original for processing. At this point, the b input of the OR gate 111, whose inputs are inverted, is a high since the end of scan switch S2 is closed. The a input is low when LDC Exposure latch output Q is high or set and high when the output Q is low or reset. A low or logical 0 input to either of the two ~l inputs a and b of OR gate 111 enables the WAIT light. Since in the LDC mode, with the optics already at the end of scan position, the a input eff~ctively controls the operation of the Wait lamp, it will be seen that when input a of gate 111 goes high, when the Exposure latch is reset, the Wait lamp is extinguished as indicated ~y block 36.
The fuser as indicated by step 38 is also turned off when the Fuser latch is reset by the count 256 signal from the secon~ counter CTR2 applied to the reset terminal R
of the Fuser latch ~steps 37-3~) through lead LD 21. The LDC
fuser latch reset causes the LDC fuser select gate 147I to apply the fuser turn-off signal or low to output lead 167 via the NOR gate 137 and INVERTOR 127 (step 38). When the second counter counts to the count of 1536 (step 39), the main '~. ; ` ' ~ ' ' :
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6~36 power latch (Fig. 5 71B) provided in the base logic is reset (s-tep 40). The reset MA[N power latch de-energizes khe main drive motor and the +5 volt D.C. regulator. The de-energized main drive motor shuts the machine down. Note that the main drive multiplexer 126M kept the main drive running while the machine was in the LDC mode and main power latch was set.
In the second situation where the document original trailing edge is sensed first by the deactuation or closing of switches S7 and S8 and thereafter the trailing edge of the copy sheet is detected by the switch S3, the shut down sequence occurs in the following sequence. When the trailing edge of the document original is sensed, the switches S7 and/or S8 close. The coincidence latch, COINF, sets signifying a coincidence condition and the counter CTR continues until the trailing edge of the copy sheet is detected by switch S3.
Upon a detection of the opening of the switch S3, a logical l is applied to the center input of the gate 281. The upper and lower inputs to gate 281 already reside at a logical l condition for the same reasons described above so that gate 281 is fully enabled and outputs a logical 0 signal. This resets Done latch and triggers the one shot multivibrator 213 via gates 284 and 283 in the manner described above.
The multivibrator 213 provides a counter clearing signal at the Q output thereof which is applied to lead 011 LDC ONE
SHOT CLR. Gate 215 is disabled at this point in spite of the action of the One Shot 213 because the Exposure latch is set so that a logical 0 is applied to input c of gate 215.
At this point, the shut down sequences for both situations become the same and steps 31 - 41, as described above, take place to turn off the main power and shut down the machine.
With the exception of a scanning optics malfunction, ~6~
malfunction shutdown ancl recovery within the LDC mode of operation is identical to that employed for the basic mode.
Thus, when the malfunction la-tch FD in the base logic is set, the NAND gate 102 simulates the LDC mode switch being in the base mode by providing a high output. Electrically, the machine remains in the base mode until the malfunction latch JAMF is reset. Upon restarting the machine after the malfunction condition is cleared, any paper left in the large document head i5 fed out. The input of the one shot multi-10 vibrator 213 is only sensitive to positive transitions of the input b of the AND gate 266. A mal~unction causes ~he logic to revert to the base mode and this applies a reset signal to the MR input of all LDC latches including the Done latch. Since the Done latch is in a reset state and the document switches are actuated, gates 222, 190 and 191 hold the counter clear. Also, since the scan carriage is locked in the end of scan position, a monitoring of an optics malfunction need not take place in the LDC mode.
The ~ias level control is described in conjunction 20 with Figure 16. The operation of the development bias level is related to the light original or regular copying process selected by an operator through use of the LIGHT ORIGINAL 54 and PRINT 53 buttons. Figure 16 includes a portion of the detailed logic circuitry of Figs. 6 11 redrawn for clarity.
In the base mode, the developer bias latch 311 in Figure 16 or 71A in Figure 5 is connected to respond to the actuation ; signals from the Exposure latch 71E of the base logic. The logic is configured so that in the base mode, the light original button 54 can be pressed at the beginning or any 30 time during the copy run and will cause the development bias latch 311 to set the bias level to a higher than normal level :~, "

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to enhance the quality of -the copy image. At the end of the copy cycle, when the exposure mea~s is reset the development bias latch 311 is also reset and this in turn causes the machine to operate in the normal print mode. The output Q of the developmen-t bias latch 311 is at a logical 0 to deEine normal development bias and to a logical 1 for high bias levels employed for a light original.
However, in the LDC mode, because of the logic con-figuration of the buffer 123M, the development bias latch 311 is reset only when the print button 53 is pressed and other-wise the development bias continues to apply the higher bias for the light original 54. The rationale behind this is that when the operator operates the machine in the base mode, she will press the PRINT 53 or LIGHT ORIGIN~L 54 button at the beginning of the copy run in order to make copies and leave it there. In the LDC mode, however, the operator changes over the machine from the base mode to the LDC mode by moving the lever clockwise and this takes place of the ; depression of one of the light original 54 or print 53 buttons.
This being the case, the copy being made will be processed according to normal copy conditions unless the LIGHT ORIGINAL
button is deliberately pressed. Once set, the latch 311 retains the state and enables the means to provide high bias level voltage (logical 1). This state continues so long as the machine does not shut down. It is assumed that the document original material being copied will more likely than not have somewhat consistent quality which will require light original treatment, if at all, for a plurality of sequential copies. That is, the quality of the document ; 30 original continues to be poor and requires enhanced images obtainable by a high development bias setting. This being ~ ' ' the case, the logic is configured, as above~ S;o that thc COpying machine con-tinues to opera~e according -to light orlginal conditions in the LDC mo~le without a depression of the LIGHT ORIGINAL button 54 at the beginning of succeeding copying operations in which shut down does not occur so long as initial setting occurs. In the LDC mode, once the LIGHT
ORIGINAL 54 is pressed, a resetting of the development bias latch occurs when the operator presses the PRINT button 53 or allows the machine to cycle out and shut down at the completion of the copying process.
Various modifications and changes may be made to the present invention within the scope and spirit thereof as described above in con]unction with an illustrative embodiment.
As stated previously, the machine can be adapted to act as a multi-copy duplicator in the LDC mode of operation. Thus, when the Done latch is set signi~ing the completion of a copying operation, the same or a different original can be automatical-ly fed and successive copies made therefrom. Automatic imple-mentation of this duplicating feature may be accomplished by adding an automatic recirculating document feeder RDF of a suitable design that responds to the output of the Done latch and automatically feeds the same or different document originals. Also, while the present invention is described within the context of conventional xerographic copier/
duplicator apparatus, clearly it need not be so limited.
- The invention may be applied with little or minor modifications to non-xerographic copying machines using treated papers or photographic principles.

This application describes embodiments of an inven-tion described and claimed in copending Canadian application Serial No. 200,191 filed May 17, 1974.

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Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A reproducing machine for making a copy of an original document on a copy sheet comprising: a photosensitive surface; a plurality of process step implementing means for making a copy including, means for charging said surface, means for exposing said surface to an image of said original document, said exposure means including means for moving said document and means for viewing said moving document for project-ing an image thereof onto said photosensitive surface to form a latent electrostatic image thereon, means for developing said latent electrostatic image, and means for feeding said copy sheet; a plurality of device control elements associated with said process step implementing means; control means for actuating said plurality of device control elements in a timed manner to implement the machine process steps required for making the copies; means for sensing the trailing edge of the moving document original and for generating a signal indicative of the trailing edge; means for sensing the trailing edge of the copy sheet and for generating a signal indicative of the copy sheet trailing edge; and means responsive to said document original trailing edge signal and said copy sheet trailing edge signal including logic circuit means for enabling said machine to cycle out and stop its copying operation in predetermined intervals of different time duration after detection of the document original and copy sheet trailing edge signals depend-ing upon the order in which said trailing edge signals are de-tected.