CA1044352A - Skid control system - Google Patents

Abstract

"IMPROVED SKID CONTROL SYSTEM"

Abstract: A skid control system is provided for use with a vehicle having at least first and second spaced apart, independently rotatable wheels and having a braking system for applying braking forces to the wheels. A brake control device responds to an applied skid signal for controlling the braking system to release the braking forces on the wheels.
A first logic circuit provides a skid signal when a predetermined percentage of the magnitude of a high wheel speed signal, representative of the faster of the two wheels, differs from that of a low wheel speed signal. Another logic circuit provides a skid signal when the acceleration of the faster wheel exceeds a reference acceleration level. An enabling circuit passes this skid signal only if the other logic circuit has provided a skid signal.

Description

This invention relates to the art of skid control systems for controlling braking forces applied to the wheels on a vehicle ha~ing a braking system, ana, more particularly, to a skid control system for use with a vehicle having a pair of spaced apart independently rotatable wheels.
This is a division of co-penaing Canadian Patent - Application, Serial-No. 224,955, filed April 18, 1975.
Whereas the invention will be described herein in conjunction with a vehicle having spaced apart independently rotatable wheels mounted on a common axle, it is to be appreciated that the invention is not limitea thereto and, for example, may be employed where the wheels are mounted on different axles, such as on different axles on a trailer of different axles on a truck or other com~inations thereof.
This application is directed toward improvements in an ."..................................................................... . . . .. . .
anti-skid system such as that described and illustrated in co- -pending Canadian Application, Serial No. 189,934, filed on January 11, 1974. The system disclosed in that application . .
: includes circuitry for providing a high wheel speed signal representative of the faster of two independently rotatable wheels and an average speed signal representative of the average speed of these wheels. A first logic circuit provides a skid signal when the differential wheel speed, as determined ~ -by comparing the average speed signal with the high speed signal, attains a particular level. A second logic circuit provides a skid signal when the deceleration of the faster wheel is greater than a reference deceleration level. A
; third logic circuit provides a skid signal when the acceleration of the faster wheel exceeds a reference acceleration level.
; 30 In that system, however, a skid signal provided b~ the .. . .

- 2 - , ~

i~)443S;~

differential wheel speed logic circuit is delayed before being applied to the braking system to provide brake release.
According to the present invention, there is provided a skid control system for use with a vehicle having -at least first and second spaced apart independently rotatable wheels and having a braking system for applying braking forces to the wheels, the system including brake means responsive to an applied skid sional for controlling the braking system to relieve the braking forces on the wheels, and means for providing first and second wheel speed signals respectively representative of the wheel speeds of the first and second wheels. First logic circuit means are provided for utilizing at least one of the first and second wheel speed signals to determine an incipient skid condition of at least one of the wheels and providing a first skid signal in dependence upon such determination. Second logic circuit means provides a second skid signal with the acceleration of the faster of the first and second wheels exceeding a first reference acceleration level, the second logic circuit means including amplifier means having an output circuit for carrying the second signal only when the acceleration of the faster ~-wheel exceeds the first reference level. Means is responsive to the first skid signal for passing the second skid signal for application of the brake control means, the passing means including circuit means interposed between the output circuit and the brake means for passing the second skid signal. Means inhibit the second logic means from providing the second skid -signal when the acceleration of the faster wheel exceeds a second acceleration level representative of a greater acceleration than that of the first acceleration level.

.

~, ~ f , . .. ~ . . .
. .
.;
.. . ..

1~14~35Z : ~

It is an object to provide an improved skid control ;
system having a s~id logic cont~ol for providing a skid ;~
signal when the acceleration of the faster wheel exceeds a :. .
: reference and wherein this skid signal is applied to a brake control to release braking forces on the wheels only -:
if a skid signal has been provided by another skid logic control.
"' ' ~'' ' "'' BRIEF DESCRIPTION OF TRE DRAWINGS ~.- .

The foregoing objects and advantages of the invention ~ ' will become more readily understood from the following ~
, description of the preferred embodiment of the invention as ::
taken in conjunction with the accompanying drawings which are ..
a part hereof and wherein: ;:

'.'! :~. .

~ ~','" ' . ''''''".''''' '~' ~ :' -,. ,':
_~, . . -:. ~

"';'' ' '~ . ~'' ;
'.

.:' , ,~~1,1, , , , ' ~ Il" 11~4435Z 1;
: . I Fig. l ls a block diagram lllustratlon o~ the skld control ¦ ~y~tem constructed in accordance wlth the present inventlon;
. ¦ Fig. 2 is a schematlc illustratlon Gf portions of the clr-- I cultry employed ~n the embGdlment of the lnventicn in Fig. l; and, .5 ¦ Flg. 3 1~ a schematic lllustratlon of another pc~tiGn o~
l the clrcuitry emplGyed ln the embodiment of the inventlon o~ Flg.

,,., I . . '. ,. '.'. .,'., I . . .
. I . . . ' ' ~ ''' " ' .
. . I GENERAL D~SCRIPTION . . . . . . .
.. I - ' :., '' . .: .' ' ' ¦ Referrlng now tG the drawings wherein the shGwings are for O IpurpGses of illustrating a preferred embodiment of the lnvention ¦cnly and.not for purposes o~ llmiting same, Fig. l i8 a block :
¦diagram illustratlon of the skid contrGl system constructed in - ;.
. ¦accordance with the present inventiGn. It is contemplated that -¦the skld contrGl system disclosed hereln be used ln contrGlllng ¦the brake forces applied to spaced apart, lndependently rotatable ¦wheels. These wheels may be located Gn a cGmmon axle or Gn ¦dlfferent axles. . I
In general, this skid contrGl system serves to monitGr the . ¦wheel speed of a pair of lndependently rotatable ~heels and .O ¦develop a cGntrol signal, referred to herelnafter as a skid ~
¦signal, if one or more conditlons prevall lndlcative of an lnclp- .
lent o ~ctual skld cGnditlon. Thi- skid slgnal 1- u~ed to 1 ` ' '' ' :. I` ' .. .

I ' - 5 - .
- ~

-11 1044;152 1 ~ ~
.` ; . ` ' ' , ' ', , . -: ' ac~uate a ~alve driver clrcuit which, ln turn, energizes a sole- .-noid which acts on the braking system to relieve brake rorce~.
The vehicle's brakes may be air-pressure operated or hydraull~ ..
operated, and ln either case, it is contemplated that up~n sens- :
ing an incipient skid condition, the brake fGrces on the wheels . ~ ..
are relieved to prevent wheel lock-up. . ..~.
Referring nG~ tc Fig. lj the skid ccntrol system employs :
wheel sensGrs WS-l and WS-2 fcr respectively senslng the wheel speeds G~ two independently rotatable wheels to be cGntrolled. -- :.
Any suitable mechanlsm may be emplGyed ~or sensing wheel speed. . .p Preferably, however, each wheel speed sensor emplGys a tachGmeter genera~or fGr develcping an alternating signal having a ~requency prcportiGnal ~o wheel speed, The ~requency signals developed by sensors WS-1 and WS-2 are respectively applled to signal ccnditiGn -. .
ing - circuits SC-l and SC-2. Each signal cGnd-tlGning circuit ;
includes a frequency to voltage converter fGr developing a DC - : -.
signal havlng a magnitude propcrtiGnal to the applied frequency -.
signal and, hence, to the wheel velocity. Whereas the embodiment Gf the inventiGn tG be described herein ccntemplates that an ~ ..
analog DC signal be provided representative Gf wheel speed, it is :. ~.
to be appreciated that the slgnal conditiGners may embody digital circuits to provide digital signals having values respectively ..:
representative of the wheel speeds of the flrst and secGnd wheels. .
In ~he embodiment herein, it ls cGntemplated that each DC wheel .
speed signal be of a particular polarity, such as pGsitive pclar- ~ . .
lty. The wheel ~elGcity sl~nals prGvided by slgnal.conaitioners .
SC-l and SC-2 are respectively referred herein as wheel speed .
slgnals Vl and V2.~ .~
., ' '-'~ ', ' , .
' ~ 6 ' J ~
. . , . ':' '. - .~ , .: ., ' -: . . . . ..... .

,. " ` ! ' - 1~4~35Z . :
. . , . , . . - ', .
. Wheel speed signals Vl a~d V2 are each applied to three :
.:. wheel speed selectGr circuits cGmprlsi~g a high wheel speed .
~. . selector clrcult HS, an average wheel speed selector clrcuit AS, ~-.. and a lcw wheel speed selector circuit I5. The high whe~el speed ;
selector HS serves to determine which wheel speed slgnal Vl or ~2 .. ls representatiYe Or the greater wheel speed and passes the greater signal, referred tG hereinafter as the high wheel speed signal VN. The average wheel speed selector AS ls an averaging . circuit which serves tG receive the wheel speed signals Vl and V2 .0 and prGvides an GUtpUt signal VA having a magnitude representatlve .
of the average wheel speed. S~milarly, the low wheel speed -;
selector circuit LS receives the wheel speed signals.Vl and ~2 .
and selects the lG~er slgnal and passes this on as the lGW wheel .
speed signal VL. . .
.5 The high ~Jheel speed signal VH is applied to a percentage .~
circui~ PC ~hich prGvides an output signal having a magnitude .
~hlch ls a fixed percentage Gf the magnitude Gf the high wheel .
. speed signal. m is mcdif~ed high wheel speed signal, which may . be referred to hereinafter as VH', is ccmpared against the 1GW .
.. wheel speed signal VL in the differential wheel speed logic cir- ~
cuit DWS. This lGgic clrcuit provldes a pcsitlve skid signal if .
thë '~educ~ hi~h~~ee~ -sp~ed si-g~l ~''-is greater -than tXe'YGw . ! . i . . - ~ . , , .. _ _ ., _ _ _ . - _ _ . . . , _ _ . .
wheel speed signal VL. This skid signal, however, is delayed by . an adaptive time delay TD befGre being applied tG a valve driver clrcult VD which, in turn, actuates a valve solenGid VS to relleve the brake ~Grces. . .

,, . '. , `,, . ,' ' ' ' ' . "
. . ':' , ' ''.' . :' .~' _ 7 ~ :

. i . , .. ~. . . .. .

:~

~-`- 1 10943SZ ;; ~
The average wheel speed slgnal VA is applled to a dl~fer-enSlator clrcuit AD which serves to provide an output slgnal I havlng a magnitude representative of the rate of change of the ¦ average wheel speed. Slmllarly, the high wheel speed signal VH
¦ ls applled to a differentlator circuit HD to provlde an GUtpUt - ¦ slgnal havlng a magnitude representative o~ the rate of change the faster wheel speed. The output signal~ obtained from di~-ferentiatGrs HD and AD are applied to a deceleration loglc circult l DL. This deceleration loglc circuit, as will be described in 0 1 greater detail herelnafter with reference to Fig. 2, compares the ¦ greater Or the slgnals taken from differentiators HD and AD -¦ agalnst a reference signal V~l, which varies in accordance with ;
the s~peed of the faster wheel. If the greater signal is the-I average wheel speed deceleration signal and if thls signal is ~ -~
¦ greater than the reference, then a skid signal is prGvided. mis ¦ skid signal is delayed by the adaptive time delay circuit DT fcr a time duratiGn ln dependence upGn the magnitude of the decelera-tiGn of the faster wheel. The delayed skid signal is then applied ;~
to the valve driver circuit VD which, in turn, actuates the valve -~0 1 solenGid VS to relleve braking forces. If, however, the greater I of the tWG deceleration slgnals is that obtained from differenti- : -¦ ator circuit HD and lf this is greater than the reference signal,a skld signal is provided by the deceleration lcglc circuit DL.
l Thls skid signal, as will be brought out ln the descriptlGn with ,5 1 respect to ~ig. 2, is nct delayed by the adaptive tlme delay cir-cuit TD before being applled to the valve drlver circult VD tG
actuate the valve solenoid.

. . ,, , , . ,: ' . - 8 _ . : , ' ' ' ';
,,, . ~ . . ~
. . .. . .

I.
. . . : ,.
. . - .
. ~ ` 104435Z :
. . ....... ... . . .....
m e dirrerentlatGr clrcuit ~D also applles lts output 91gnal tG an acceleration logic circuit AL. As wlll be described ln greater detail hereina~ter with rererence to Fig. 3, the `acceleratlon lcgic circuit AL employs a two stage comparator by ~-whlch a skld slgnal is provided if the acceleratlon Or the faster wheel exceeds a 1GW rererence and then the skid slgnal is removed i~ the acceleration exceeds a hlgh re~erence. However, the skld slgnal was prevlously developed by Gne of the other skld logic circuits, such as the ~ixed bleed circuit FB, cr the difrerential -10wheel speed circuit DWS, Gr the deceleration logic circuit DL.
- -Having brierly described the general Gperation Gr the skid -contrGl system with rererence to the block diagram of Fig. l, attention ls nGw directed to the mGre speclflc aspects of the -circuitry witb reference to Figs. 2 and 3. -- -,. , ' - . ' ' : .

Dir~erential ~heel Speed(D~S) Lcgic ` -The differential wheel speed loglc circuit DWS is illus-trated in detail in the upper left hand portion Gf Fig. 2. This circuit serves tG prGvide a skid signal when a fixed percentage - of the high wheel speed signal VH is greater than the 1GW wheel ~-; speed slgnal VL. The lGgic circuit includes an op2ratiGnal amplifier 10 ~hich serve~ as a cGmparatGr tG compare the magnltude Or the reduced high wheel speed signal VH' with the 1GW speed signal VL. If signal VH' ls greater, then the operatiGnal ampli ~ier 10 prGvides a positive skid signal which ls applied tG a tlme ;~5 delay circult TD (see Flg. 1), which will then energize a valve driver circuit VD to actuaté ~he valve sclenoid VS. The reduced : .. ' " : ' ' . -:
- . ~, . , . ~, ' ' . `'.

~,-" ~
' `,~
'' ' . ' i' ' ~
. . . ~ .

~ . . .. ~. .. . .. ,; . . : . .
, . . - . ~ . - ~ . . .. . , . : ., . :;- , -, . . . .. .

.~ ` ~ ` . :::
~ )44352 ` :
,' . I ' . ` ` ' ' ' . ' " ', -signal V~' is obtained from a percentage circuit which basically :~
comprises a voltage divider including resistors 12, 14, and 16.
Diodes 18 and 20 are connected in series across resistor 1~. The high wheel speed signal V~ is reduced in accordance with the mag-nitude of resistors 12 and 14 so that the reduced high wheel spee signal VH' is on the ordex of approximately 1/4 of that of the- .-magnitude of the high wheel speed signal VH. Diodes 18, 20, an~ resistor 16 shapè the percentage circuit at low speed to mod-ify the DWS reference below 10 miles per hour to psovide noise.
immunity. The values of resistors 12 and 14 are chosen such that .:
when the high wheel speed signal represents a speed on the order ....
- oflOMPH,~affd~ ~ ifference between the high speed signal and the low speed signal ~L is on the order of 7.~ MæE,then a sXid signal . .
will be provided. Similarly, a skid signal will be provided when the high speed signal is on the order of 20 MPH and the differ- .
ence is on the order of 15 MPH. Also, when the high speed signal represents a speed on the order of 60 MPH, a skid signal will be .. .
provided when the speed difference is on the order o 4S MPH.

Hiqh Deceleration Circuit ~
The high deceleration circuit HD is illustrated in ` ..
greater detail in Fig. 2. This circuit serves to receive the hig~ speed wheel signal VH and provide an output signal that var- :
ies in accordance with the.rate of change of the wheel speed sig- ~, nal so that the oubput signal is representative of acceleration o~

. , , ' ' ', ' ., . . , ,~ , , ::
_10,_ ;, - ~

' 1044;~52` ;~ .
deceleratlon, depending on the direc~ion Gr the rate Or change.
The hlgh wheel deceleration clrcuit HD includes a lcw speed cut-out circuit to avoid ripple noise at 1GW speeds. This low speed CUtGUt circult, ln effect, deactlvates the dirferentiator cir-cuitry ror speeds below 5 MPH. This 1GW speed cutout circuit includes an NPN transistor 30 having its base connected to receive the hlgh wheel signal VH and its collector connected to a B~
voltage supply sGurce. The emitter ol this transistor is con-nected through a resistor 32 tG grcund and thrGugh a resistor 3 to a B- voltage supply sGurce. The cGmpcnents are chosen such that the voltage level at which the 1GW speed cutof~ cccurs ls determined by the offset vGltage and the base emitter drop G~ . -transistor 30. This is chGsen to be on the order of 5 MPH. High wheel speed signals above thls level are passed by resistor 40 and coupled through a capacitor ~2 to the invertlng input of an operatiGnal amplifier 44 ~aving its ncn-inverting input connected to ground. This operatiGnal ampli~ier is prcvided ~ith a parallel RC feedback path between its output and its lnverting lnput with thi~ path including a resistor 46 and a capacitor 48. This cir-,0 cultry defines a differentiator to prGvide a derivative function SG the output signal exhiblts a ~alue in accordance with the rate of change o~ ~he input signal applied thereto. The circuitry is such that a positive golng cutput signal is representative o~
deceleration and a negatlve going signal is repre~entative or -,5 acceleration. As best shGwn in Fig. 1, the cutput o~ the hlgh wheel speed dlfferentiator circult HD is applied to the tlme delay c circult TD as well as to thé deceleration lGgic clrcult DL and to the acceleratlon loglc circuit AL.

.' . , .. .. . ~
': ' . `, ,. , ,: , . "'' ' ~ .
, - 11 - . '~

- ' . : .~ ~ ~ , . - : , . , - , - - ~ , ~

... .. . . . . ~ . . . . . . . .. .

::

1~435'~ ~
.' : ;: . ,i The average wheel speed differentiator circuit AD receives the average wheel speed signal VA and provides an output signal that varies in accordance with the rate o~ change o~ the average wheel speed. The output signal is positive going if the rate of change is deceleration and is negative going i~ the rate o~ change is acceleration; -A low spèed cutout circuit assures that the differentiator . i9 effectively inactive for low average wheel speed signals, such as those below S MæH. The low speed cutout is determined by a diode 60 which must ~e forward biased by the average wheel speed ;~
signal`~VA before the time varying signal can be applied to the differentiating circuitry. This requires a signal representative of a~ least 5 MP~.
The average wheel speed signal passed by diode 60 de-velops an input voltage acr-oss a resistor 62. This voltage is coupled through a capacitor 64 to the inverting input of an operational amplifier 66 having its non-inverting input con-nected to ground. This operational amplifier has a parallel RC
circuit connected between its output circuit and its investing ~. -input circuit. This RC network includes a resistor 68 and a capacitor 70. The output signal obtained from amplifier 66 is a voltage signal exhibiting a magnitude which varies with the rate o change of the avexage wheel speed signal VA . I~ the rate o~ change is acceleration, then the output signal is a nega-tive going signal. Conversely, i the rate o change is decelera-tion, then the output signal is a positive going signal. T~e : . . ,~' . ~:
-12- :

~` :
` 1~35Z
-' `'' ` ' ` '' ` ` "' ~'`'.' . :;:'.
GUtpUt signal taken rrGm the average wheel ~peed differentlator clrcult AD, as best shown ln ~lg. 1~ is ~pplied to the decelera-tlon logic clrcult DL. `
. ` ` ' ' . ',' Deceleration Lcgic Clrcuit - ' ' The deceleratlon logic circuit DL receives the high wheel deceleration signal and the average uheel deceleration slgnal and ' determines which signal is the greater. The greater slgnal i~
compared against a reference slgnal, which varies with the hlgh wheel speed. If the greater deceleratlGn signal is, in turn,' greater than the reference signal, a skid signal is prGvided. -The deceleraticn lGgic circuit is illustrated in detail in the `
lGwer\portion o~ ~lg. 2. "- ' ~- ' The positive going high wheel deceleration signal taken rrGm the GUtpUt Gf amplifier 44 is applied to the nGn-inverting input of an GperatiGnal amplifier 70 by means cf a diGde 72.
; Similarly, the positive gGing average wheel deceleration signal obtained rrGm the GUtput of amplifier 66 is applied to the non-inverting input Gr GperatiGnal ampl~fier 70 by means Gr a diode 74. Diodes 72 and 74 effectively serve as an OR gate to pass Gnly ~ :`
the greater Or the two deceleratiGn signals. The greater signal . 'ls'~applied~across an lnput~res~s'tor 7~,~ccnnec'ted between~grcund 'an~`the~nbn'-invèrting lnput'of amplifier`70.~A variable reference slgnal VRl 1~ applied to the inver~ing input Or the operational amplirler frcm a reference circuit Rl (~ig. 1). The re~erence .
clrcuit is a voltage dlvlder comprlsed of reslstors 80 and 82.
The hlgh`wheel specd signal ls applied to thls voltage dlvlder . " '',' .,' " ., . -.
' ~ . '~'' ' ~' .; . , . :~
- 13 - ' 1 10d~435 .: ` . . ' . ' '' ' .
. and the ~unctlGn o~ the divider is ccnnected to the lnvertlng ,. lnput Or amplirler 70. Conse~uently, the rererence signal appllec .
to amplirler 70 varies with the magnitude Or the hlgh wheel speed sl~nal VH. When the decele,r,atlon signal (the greater of that ~ ~
: 5 obtained rrGm ampliriers'44 and 66~, ls greater than that G~ ~he : -. rererence signal, the operational ampll~ier 70 will provide a ' pGsitive skid slgnal. ' . . . . .
': ' . \' ' ' , ., ,. . , `;. '' Time Delay Circult - :~
_.. .. . , The time delay circult TD may be termed as an adaptive time delay since it serves the functlon cf delaylng the skid . ..
slgnal obtained ~rcm the differentlal wheel speed lGgiC circult DW~ Gr frGm the deceleratlon,lGgic circuit DL for a time duraticn .- which varles as a functiGn Gr the magnitude Gr the high wheel ' :...... ..speed signal ~H. Specifically, the time duratlGn varies as a.. .
,,'15 - function of the deceleratiGn o~ the high speed wheel. The time delay is essentially 0 seconds at 0.5g deceleraticn and apprcxl- ;,,'" , ,, mately 0.5 seconds ~ith zero deceleratiGn. As will be brGught .
. out in greater detail hereinafter, the time delay is also essen- ;~;
: tially zero seconds ~or a skid signal Gbtained ~rom the decelera- ;: .
"~0 tion lGglc clrcuit DL ~Ihen the high wheel deceleratiGn slgnal ls ..... ...
'. , greater than the average wheel deceleratiGn signal. , . The adaptive time delay circuit TD is illustrated ln :. .
- .detall in Fig. 2. A skid signal provided by the difrerential ., wheel speed logic circult DWS ls applied to the clrcuitry through ':' '5 . a dlode 100 whereas a skid signal provlded by the deceleration.
. lGglc clrcuit DL is applied through a diGde 102. A skid slgnal '.

'' ':' ~ "' ' - ' ' , ~ ' , ,. - 11 ;:` `' ~ `
` ~04435z .
.. - ,- ': . ,. .;, ' .~ '' ;- ..
obtalned thrcug-l dlode 100 or dicde loe, ls.applied to the valve drlver clrcult VD through diGde 104 and resistor 10~ Gnly when an NPN transistor 108 is in a nGn-conducting conditiGn. The delay tlmer clrcuitry normally maintalns transistor 108 ln a conductlve .
condition to prevent a skid slgnal frGm belng applied to the valve drive circuit VD. .-. Transi~tor 108 in the time delay circuit is held in aCGndUCtiVe CCnditiGn SG lGng as transistGr 110 is in a ncn-conductive conditlGn. TranslstGr l10 has its collectcr cGnnected ::
to the base of transistor 108 and this ~unctlon is, in turn, .. ~
connected thrGugh a reslstGr li2 tG a B+ vGltage supply source. .
This ~aintains fGrward bias for transistor 108 until the bias.ls .
removed upGn conductlon Or transistor 110. -The cutput voltage taken ~rom amplifier 44 in the h~ghwheel differentiator circuit HD is amplified and of~set by an --: ...
operatiGnal amplifier 120 in the time delay circuit ~D. The ~. .
Gf~set and gain are deten~ne~ by resistors 122,.124,.and 126. ;.: :
The output taken frcm amplifier 120 is applied to the pGsitive ; ~.
side of a capacitGr 130 through a dicde 132. Capacitor 130 is .
cGnnected from a B- voltage supply scurce and thrcugh a resistor 134 to the base of translstor 110. Normally, the output vcltage .~
from amplifler 120 is several vclts negative and thls serves to ~ :
keep transistor 110 in a non-conducti~e ccndltiGn, there~y per- .. .
mlttlng transistor 108 to be ccnductive. This,in turn, prcvides a short circuit to ground ~or load resistor 106 to prevent a skid slgnal received thrcugh dlcde 100 or dlode lOQ frcm being applied :-to the valve driver clrcult VD. When such a skid signal i3 .
.' . . :,-' ;"
.~ . ~
'2 ,';.';,,'. ' - 15- ' ~ ~' ' ' . . ' ' ' . ~`
. . . ,. ' '. ``'`~ ~' ` ~ :: :

. i~;)443SZ - ::
` ~: . : . ~ . - , - . . :' ' ', . '; . :: .
received thrGugh either diode 100 or 1 oe, it ls applied thrGugh . a diode 140 and thence through a resistor 142 to charge capacltor .
130 in a positi~e direction. During thls charging period, a diode 150 blocks current ~1GW thrcugh resistor 152 in a biaslng .
. 5 Detwork made up o~ resistor 152 and resistor 154. When the charge on the capacltor 130 becomes sufficiently positive, (on the order o~ apprcximately ~o.6 volts) transisto~ 110 wili con-duct, thereby remGving the ~G~ard bias f~r transistor 108. :.
- Transistor 108 will become ncn-ccnductive removing the short -10 c~rcuit to grGund for load resistor 106. With the resistor 106 nGw being ungrGunded, a skid signal received thrGugh diGde 100 . cr diode 1~2 will be passed thrcugh dicde 10~ and load resistor .10~ tG the valve driver circuit VD. :
.- The delay which takes place after receipt Or a skid signal . and before the skid ~ignal ls passed is dependent on the ~utput voltage taken from amplifier 120. If the deceleraticn cf the .
high speed wheel increases, then a more pGsitive signal is applied .
by amplifler 44 to the non-inverting input of amplifier 120.
. This results in a more pGsitive voltage being applied to the ;.,~ positive end Gf capacitor 130 in the timing circuit and, hence, ~
reduces the delay time before capacitor 120 becGmes suf~iciently ~ -positlve to b~as transist-or 110 lnto a ccnductive ccndition. ~ On -~the other hand, lf the output obtained frcm amplifier 44 in the ~-.
high wheel differentiatGr circuit HD is negat~ve, representative ,5 Or an acceleraticn ccndition cf the high speed wheel to this wlll . produce a more negative going output frcm ampllfier 120. This will reverse bias transistor 108 by means of a voltage divider circultry comprlsed Gr resistor 112 and resistGr 160.

'. . ' ' ' ' ' , ' . ' ,''~. .

~' . - 16 - : ~ .
~:.' . . - . ' ' . .:.
.,, , : - . . :

. -ll ' i ' lV4435Z
:'- . , ,:, , . .
Ccnsequently then~ lt is seen that there ls essentially no tlme delay during acceleratlon cGndltions cr the hlgh speed wheel~ The compGnents have been chosen such that thls delay ls essentially negligible with an acceleration level on the order o~
O.lG. If the hlgh speed wheel is in a deceleratlon condition, then the greater the deceleration, the shorter will be the tlme delay. The ccmponents-have been chcsen such that the delay ls Gn the order of 0.4 secGnds when-the de~eleration level is on the order of O.lG and thls delay wlll reduce tc approxlmately 0.1 O second ~hen the deceleratiGn has increased to a ievel on the order of o. 4G. - ~ ; ~

AcceleratiGn Loglc Clrcuit - - ~ -- me acceleration lGgiC c~rcuit is illustrated in detail ~n Fig. 3 to which reference ls no~7 m2de. The cutput Gf ampli~ier ~
4~ in the high wheel differentiation circuit HD (Flg. 2) is ,~ -applied to the inverting input of an operatiGnal amplifier 200 in ;~
the acceleratiGn logic circuit thrcugh a resistor 202. The pGSi- '.
tive or nGn-inverting input for this operatiGnal amplifler ls re~erenced to a ne~ative level through a resistor 204 to a B-voltage supply sGurce. The reference is set such that the GUt pUt `
ampli~ler 200 will go hlgh to provlde a positive skid signal :`~
: only ~Ihen the acceleration level of the high speed w~eel exceeds the rererence level, which is set at apprGximately 0.3G. This ~id signal is applied to the valve driver clrcuit VD through the ¦¦ enabl n clrcult EN (rlg. 1) only lf a prevlous skld slgnal exlsts¦
. , ~ , ,' ' . ~
,. .' ''' ' ' , . ,'.' :. ' '' ',~ . ' ' ' ~ . " ' , ! - 17 - .:

: ~ ~ ~ ~ ~

' ~ 5Z ~:
. ~he enablln~g clrcul~ EN includes a PNP transistGr 220 :
having its emitter-collector path cGnnected to the GutpUt circult of ampll~ier 200. Normally, this transistGr ls held in a non- . -:
.; conducting conditlGn slnce lts base circult is re~erenced to a .
S positlve reverse biasing potential thrGugh a diode 222 and re-- .
sistors 224 and 226 to a B~ voltage supply sGurce. However, when . a.skid signal ls provided by ariother skid logic circuit, such as :-. . the DWS.circuitry or the deceleratlon logic circuitry l)L (Fig. 2), :
such a skid signal is applied to drive an NPN transistor 230 in~-o ccnductlon. Current wlll flow frcm a B+ voltage supply scurce -thrGugh a resistGr 231 and thence through the collector to emltter circuit tG ground. Since the collector of transistGr 230 is .
connected to resistGr 224 through a reslstor 232 and a diGde 234, . . the base o~ transistGr 220 will be referenced to essentially - . :: :
ground potential. .This then enables transistor 220 to pa~s a positive skid signal from the output Or amplirier 200 and, thence, thrGugh the emltter to cGllector path of transistGr 220 .- and thrcugh a diode 240 to the valve driver circuit V3). This - ;~
~Jill energize the valve drlver clrcuit and thereby actuate the valve solenoid VS. Capacitor 242, ccnnected between grGund and ;... .-the ,~unction cf resistors 232 and 224, provides a memory effect :
~n the enabling circult. . With no skid signal being :~ :
present,-capacitGr .~L~? and the base of transistcr 220 is held , pcsitive thrGugh resistor 226 t~ prevent turn on of transistor 220. Ccnsequently then, it ls seen that a skid slgnal obtained :
. frGm the acceleration lGgic clrcuit is effectlve only lf a pre-vlou~ Id slgnal IS preserst.

.. ' ' " "' ' ' '' ' ..
.- . '~ . ., . . ' - 18 - - ' .
'::.' : ' '' ' - :' ' , :~
.,:
: . - .-` 1~ 352 . . :
. , . ::
The acceleration cGmparison functlon carrled out by the acceleration loglc clrcult AL i~ a two stage comparlson in that a skid signal is developed when the acceleration signal Gbtained ;: rrom the high wheel dif~erentlator circuit HD exceeds a 1GW level . 5 representatlve of 0.3g. If, however, the acceleration increases ;
sufficien~ly to attain a level representative o~ 1.0 at a speed o~ 25 MPH Gr 2.0g at a speed Gf 10 MPH, then an acceleratlcn inhibitGr clrcuit respGnds to this conditlon to inhlbit the . operatlGnal amplifier 200 frcm providing a skid signal. The . ,~
.~0 circultry tG accomplish this inhibiting ~unction is discussed below with reference to Fig. 3. . : . .
The high speed signal VH is applied acrcss a lcad reslstor .:~
260 and, thence, tG the emitter of a PNP transistGr 262. The .
collector of this transistGr ls connected to an RC circuit ccm-1~ `prised Gf a resistor 2~4 and a capacitGr 266 wnicn are connec~ed.
together in parallel between ground and the collector of the ~ ~ :
~ transistor. The base of the transistor is normally referenced . -; to a reverse bia~ing positive potential through a diGde 268 and .
: resistors 270 and 272 to a B+ vcltage supply source. CGnsequently :~
~0 the transistor is normally held in a nGn-conductive condltiGn.
The base of this transistGr is connected to the output of amplifle .
: ~4 in the high ~Jheel di~ferent~atcr c~rcu~t through diGde 268, reslstor 270 and a resistor 274, During acceleration cGnditlGns, ~.
the output from amplifier 44 increases in a negative sense.
When the acceleratlon beccmes sufficiently great, transistor 262 :
will be blased into cGnduct10n causing a positlve voltàge to be .
I! develo d crG s reslstor 254. Thls voltage ls applied thrcugh ¦

. ' ', ' , ' . ' . '` ' . '. ~`.~ ,' ' . ` ' , , .
. - 19 - ' ' , ,, . ,..v, ,, ,~ , ,","~ ~;" ,""~ " ,,~" ~,,,, ,,, ~,~, I. .
. .
.. . . .
~ 135Z . :
dlode 280 to the lnverting lnput Or operational ampll~ler 200 so as to cancel the errect of the nega'ive goln~ GUtpUt frGm cpera- :
tional amplifier 44 ln the high wheel di~rerentlator circult. :
Thls will remove the positive skid signal rrcm the GUtpUt of .
amplifier 200, Capacitcr 266 serves to provide a degree o~
memory on the inhibitlng operation to cover the reverse transl-tion. -. `~ . . ~:
Sumnary :
~ rGm the ~oregoing descrlption, it i8 seen then that the ..
improved di~ferential ~heel speed lGgic circuit DWS provides a skld signal when a fixed percentage Gf the high wheel speed slgnal VH ls greater than the magnitude Gr the lcw wheel speed signal VL. This s~id signal is obtained from the GUtpUt Gf .operational ampl~fier 10 and is applied thrGugh diode 100 tG the :
time delay circuit TD. This is an adaptive t~me delay and serves to delay application cf the skid signal to the valve driver VD
rcr a time duration that is dependent upcn the level of decelera- .
tiGn cf the high speed ~Iheel. The greater the deceleration, the shorter will be the time delay befGre the s~id signal is applied .~
to the valve drlver c~rcuit. .
It is also seen from the fGregoing descriptiGn that a :determinatiGn ls-made by the:circultry as to whether the--high wheel deceleraticn signal Gbtained frGm amplifier 44 is greater .
or less than the average wheel deceleraticn signal obtained frcm amplirier 66. The greater Or these tWG signals is passed by Gne of the diodes 72 and 74 to the operational ampllfier 70, Ir thi~ ,-greate lgnal ls, ln turn, more pGsltlve than ehe ~ererence ! :
..............
.. ... . .
. .

i~3S2 `
. .' .. ' .' , : .. , "` ', . '`"'' ' ' ~', '' '.
signal applied to the inverting lnput o~ the amplifier, then a ;~
skid signal is provided. Thi~ skid signal is applied to the time delay circult TD thrGugh dlode 102. The time delay before appll- ~ -~
; catlon Gf the skld signal to t~e valve drlver circult VD is ~
dependent on the level o~ deceleration Gf the ~aster wheel. The greater the deceleratlon, the shorter the time delay. Ccnsequent-ly, if the greater slgnal passed by diodes 72 and 74 is the high wheel deceleratiGn signal, then the time delay is essentlally -~
zero. --~10 Lastly, it is seen from the foregGlng descriptlon that the acceleratlon logic circuitry (F~gs. l and 3) applies a skid - signal to the valve driver circuit VD when the acceleration cr the faster wheel exceeds a reference acceleration level. Hawever, `~ ;
that skid signal is applled to the valve drive~- ci~cùit only .~-an-cther skid slgnal ls present tG enable the enabllng circult EN. -~
Althcugh the invention has been described in con~unctiGn with a preferred embcdiment, it is tG be appreciated that various mGdi~icatiGns may be made without departing frcm the spirit and - ~ scope the present lnventlGn as dcflned by tAe appended alalrs.

. . ' '' ','.
, . ' ' ' ' . ' "
.' ' ' , , . '~,:' ' '.'' , . '~ . , . ., i , . , .' ' ' '. ` .'"
. . . . ' ' ' . '':
; . - 21 _ , -.

Claims (2)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A skid control system for use with a vehicle having at least first and second spaced apart, independently rotatable wheels and having a braking system for applying braking forces to said wheels and comprising:
brake means responsive to an applied skid signal for controlling said braking system to relieve the braking forces on said wheels;
means for providing first and second wheel speed signals respectively representative of the wheel speeds of said first and second wheels;
first logic circuit means for utilizing at least one of said first and second wheel speed signals to determine an in-cipient skid condition of at least one of said wheels and pro-viding a first skid signal in dependence upon a said determin-ation;
second logic circuit means for providing a second skid signal when the acceleration of the faster of said first and second wheels exceeds a first reference acceleration level; and said second logic circuit means including amplifier means hav-ing an output circuit for carrying a said second signal only when the acceleration of the faster wheel exceeds said first reference level;
means responsive to-a said first skid signal for pass-ing a said second skid signal for application to said brake control means, said passing means including circuit means inter-posed between said output circuit and said brake means for pass-ing a said second skid signal, and means for inhibiting said second logic means from providing a said second skid signal when the acceleration of the faster wheel exceeds a second acceleration level representative of a greater acceleration than that of said first acceleration level.

2. A skid control system for use with a vehicle having at least first and second spaced apart, independently rotatable wheels and having a braking system for applying brak-ing forces to said wheels and comprising:
brake means responsive to an applied skid signal for controlling said braking system to relieve the braking forces on said wheels;
means for providing first and second wheel speed sig-nals respectively representative of the wheel speeds of said first and second wheels;
first logic circuit means for utilizing at least one of said first and second wheel speed signals to determine an incipient skid condition of at least one of said wheels and providing a first skid signal to said brake means to relieve said braking forces in dependence upon a said determination;
second logic circuit means for providing a second skid signal when the acceleration of the faster of said first and second wheels exceeds a first reference acceleration level said first logic circuit means comprising means for providing said first skid signal irrespective of said second skid signal;
means responsive to a said first skid signal for passing a said second skid signal for application to said brake control means to relieve said braking forces; and latching means connected with the output of said passing means and responsive to at least said second signal when said second signal is passed by said passing means, for maintaining said passing means in a passing condition to pass said second signal.