BRPI0821772A2 - Esboço e divisão de procedimento baseado em contagem de blocos - Google Patents

Esboço e divisão de procedimento baseado em contagem de blocos

Info

Publication number
BRPI0821772A2
BRPI0821772A2 BRPI0821772-6A BRPI0821772A BRPI0821772A2 BR PI0821772 A2 BRPI0821772 A2 BR PI0821772A2 BR PI0821772 A BRPI0821772 A BR PI0821772A BR PI0821772 A2 BRPI0821772 A2 BR PI0821772A2
Authority
BR
Brazil
Prior art keywords
outline
division
procedure based
block count
count
Prior art date
Application number
BRPI0821772-6A
Other languages
English (en)
Inventor
Grant A Richins
Original Assignee
Microsoft Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corp filed Critical Microsoft Corp
Publication of BRPI0821772A2 publication Critical patent/BRPI0821772A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44557—Code layout in executable memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Executing Special Programs (AREA)
  • Debugging And Monitoring (AREA)
  • Stored Programmes (AREA)
BRPI0821772-6A 2008-01-17 2008-12-29 Esboço e divisão de procedimento baseado em contagem de blocos BRPI0821772A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/016,099 US8677336B2 (en) 2008-01-17 2008-01-17 Block count based procedure layout and splitting
PCT/US2008/088483 WO2009091493A2 (en) 2008-01-17 2008-12-29 Block count based procedure layout and splitting

Publications (1)

Publication Number Publication Date
BRPI0821772A2 true BRPI0821772A2 (pt) 2015-06-16

Family

ID=40877462

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0821772-6A BRPI0821772A2 (pt) 2008-01-17 2008-12-29 Esboço e divisão de procedimento baseado em contagem de blocos

Country Status (5)

Country Link
US (1) US8677336B2 (pt)
EP (1) EP2250551A4 (pt)
CN (1) CN101918917B (pt)
BR (1) BRPI0821772A2 (pt)
WO (1) WO2009091493A2 (pt)

Families Citing this family (13)

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US8793602B2 (en) 2004-01-15 2014-07-29 The Mathworks, Inc. System and method for scheduling the execution of model components using model events
US11681531B2 (en) 2015-09-19 2023-06-20 Microsoft Technology Licensing, Llc Generation and use of memory access instruction order encodings
US11977891B2 (en) 2015-09-19 2024-05-07 Microsoft Technology Licensing, Llc Implicit program order
CN108027735B (zh) * 2015-09-19 2021-08-27 微软技术许可有限责任公司 用于操作处理器的装置、方法和计算机可读存储介质
US10652319B2 (en) * 2015-12-16 2020-05-12 Dell Products L.P. Method and system for forming compute clusters using block chains
US10452428B2 (en) * 2016-03-14 2019-10-22 International Business Machines Corporation Application execution with optimized code for use profiles
US10585648B2 (en) * 2016-06-01 2020-03-10 The Mathworks, Inc. Systems and methods for aggregating implicit and explicit event code of executable models
CN106878528A (zh) * 2017-01-23 2017-06-20 北京思特奇信息技术股份有限公司 一种基于区块链技术的骚扰来电短信拦截方法及系统
US10581621B2 (en) * 2017-05-18 2020-03-03 International Business Machines Corporation Enhanced chaincode analytics provenance in a blockchain
US10719970B2 (en) * 2018-01-08 2020-07-21 Apple Inc. Low latency firmware command selection using a directed acyclic graph
US11336455B2 (en) 2019-09-25 2022-05-17 International Business Machines Corporation Consensus protocol for blockchain DAG structure
US11221835B2 (en) 2020-02-10 2022-01-11 International Business Machines Corporation Determining when to perform and performing runtime binary slimming
US20230315453A1 (en) * 2022-04-01 2023-10-05 Intel Corporation Forward conditional branch event for profile-guided-optimization (pgo)

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5212794A (en) * 1990-06-01 1993-05-18 Hewlett-Packard Company Method for optimizing computer code to provide more efficient execution on computers having cache memories
US5732273A (en) 1995-08-11 1998-03-24 Digital Equipment Corporation System for monitoring compute system performance
US6006033A (en) 1994-08-15 1999-12-21 International Business Machines Corporation Method and system for reordering the instructions of a computer program to optimize its execution
US5768592A (en) 1994-09-27 1998-06-16 Intel Corporation Method and apparatus for managing profile data
US5778232A (en) 1996-07-03 1998-07-07 Hewlett-Packard Company Automatic compiler restructuring of COBOL programs into a proc per paragraph model
US5999738A (en) * 1996-11-27 1999-12-07 Hewlett-Packard Company Flexible scheduling of non-speculative instructions
US5950009A (en) 1997-03-10 1999-09-07 International Business Machines Coporation Method and apparatus for profile-based reordering of program portions in a computer program
US6073230A (en) 1997-06-11 2000-06-06 Advanced Micro Devices, Inc. Instruction fetch unit configured to provide sequential way prediction for sequential instruction fetches
US5966541A (en) * 1997-12-04 1999-10-12 Incert Software Corporation Test protection, and repair through binary-code augmentation
US6481008B1 (en) 1999-06-30 2002-11-12 Microsoft Corporation Instrumentation and optimization tools for heterogeneous programs
US6976260B1 (en) * 1999-09-24 2005-12-13 International Business Machines Corporation Method and apparatus for serializing a message queue in a multiprocessing environment
US7100157B2 (en) * 2002-09-24 2006-08-29 Intel Corporation Methods and apparatus to avoid dynamic micro-architectural penalties in an in-order processor
US7155708B2 (en) * 2002-10-31 2006-12-26 Src Computers, Inc. Debugging and performance profiling using control-dataflow graph representations with reconfigurable hardware emulation
US7386838B2 (en) 2003-04-03 2008-06-10 International Business Machines Corporation Method and apparatus for obtaining profile data for use in optimizing computer programming code
US20050044538A1 (en) * 2003-08-18 2005-02-24 Srinivas Mantripragada Interprocedural computing code optimization method and system
US7210135B2 (en) * 2003-08-26 2007-04-24 Microsoft Corporation Data flow analysis of transactional processes
US7661095B2 (en) 2005-04-14 2010-02-09 Hewlett-Packard Development Company, L.P. System and method to build a callgraph for functions with multiple entry points
US7792666B2 (en) * 2006-05-03 2010-09-07 Sony Computer Entertainment Inc. Translation block invalidation prehints in emulation of a target system on a host system

Also Published As

Publication number Publication date
WO2009091493A2 (en) 2009-07-23
US20090187887A1 (en) 2009-07-23
US8677336B2 (en) 2014-03-18
WO2009091493A3 (en) 2009-10-08
CN101918917A (zh) 2010-12-15
EP2250551A2 (en) 2010-11-17
CN101918917B (zh) 2017-08-08
EP2250551A4 (en) 2012-06-13

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE AS 5A, 6A E 7A ANUIDADES.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2343 DE 01-12-2015 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.