BRPI0721042A2 - Sistemas eletrônico seguros, processo de segurança e utilização dos respectivos sistemas - Google Patents

Sistemas eletrônico seguros, processo de segurança e utilização dos respectivos sistemas Download PDF

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Publication number
BRPI0721042A2
BRPI0721042A2 BRPI0721042-6A BRPI0721042A BRPI0721042A2 BR PI0721042 A2 BRPI0721042 A2 BR PI0721042A2 BR PI0721042 A BRPI0721042 A BR PI0721042A BR PI0721042 A2 BRPI0721042 A2 BR PI0721042A2
Authority
BR
Brazil
Prior art keywords
variant
memory
addresses
module
heuristic
Prior art date
Application number
BRPI0721042-6A
Other languages
English (en)
Portuguese (pt)
Inventor
Patrice Hameaux
Guillaume Phan
Cedric Mesnil
Axelle Apvrille
Original Assignee
Trusted Logic
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trusted Logic filed Critical Trusted Logic
Publication of BRPI0721042A2 publication Critical patent/BRPI0721042A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1408—Protection against unauthorised use of memory or access to memory by using cryptography
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Storage Device Security (AREA)
  • Multi Processors (AREA)
BRPI0721042-6A 2006-12-22 2007-12-21 Sistemas eletrônico seguros, processo de segurança e utilização dos respectivos sistemas BRPI0721042A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0611283A FR2910658B1 (fr) 2006-12-22 2006-12-22 Systemes electroniques securises,procedes de securisation et utilisations de tels systemes
FR0611283 2006-12-22
PCT/FR2007/002152 WO2008096076A2 (fr) 2006-12-22 2007-12-21 Systemes electroniques securises, procedes de securisation et utilisations de tels systemes

Publications (1)

Publication Number Publication Date
BRPI0721042A2 true BRPI0721042A2 (pt) 2014-07-29

Family

ID=38318668

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0721042-6A BRPI0721042A2 (pt) 2006-12-22 2007-12-21 Sistemas eletrônico seguros, processo de segurança e utilização dos respectivos sistemas

Country Status (5)

Country Link
EP (1) EP2104893A2 (ja)
JP (1) JP2010514039A (ja)
BR (1) BRPI0721042A2 (ja)
FR (1) FR2910658B1 (ja)
WO (1) WO2008096076A2 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020226054A1 (ja) * 2019-05-07 2020-11-12 株式会社日立製作所 情報処理方法、情報処理装置及び記憶媒体

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63157365A (ja) * 1986-12-19 1988-06-30 Fuji Xerox Co Ltd 物理アドレス変換装置
FR2745924B1 (fr) * 1996-03-07 1998-12-11 Bull Cp8 Circuit integre perfectionne et procede d'utilisation d'un tel circuit integre
TW494306B (en) * 1998-10-27 2002-07-11 Winbond Electronics Corp Secret code protection circuit capable of protecting read only memory data
JP3936630B2 (ja) * 2002-06-20 2007-06-27 株式会社日立製作所 半導体試験装置または半導体装置の検査方法または半導体装置の製造方法
TWI258658B (en) * 2003-07-07 2006-07-21 Sunplus Technology Co Ltd Device in CPU using address line to proceed scrambling processing and method thereof
US7506178B2 (en) * 2004-05-04 2009-03-17 International Business Machines Corporation Tamper-resistant re-writable data storage media

Also Published As

Publication number Publication date
FR2910658B1 (fr) 2009-02-20
EP2104893A2 (fr) 2009-09-30
WO2008096076A2 (fr) 2008-08-14
JP2010514039A (ja) 2010-04-30
FR2910658A1 (fr) 2008-06-27
WO2008096076A3 (fr) 2008-10-02

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Legal Events

Date Code Title Description
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 7A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2285 DE 21/10/2014.