BR9404327A - Process of manufacturing integrated circuits - Google Patents

Process of manufacturing integrated circuits

Info

Publication number
BR9404327A
BR9404327A BR9404327A BR9404327A BR9404327A BR 9404327 A BR9404327 A BR 9404327A BR 9404327 A BR9404327 A BR 9404327A BR 9404327 A BR9404327 A BR 9404327A BR 9404327 A BR9404327 A BR 9404327A
Authority
BR
Brazil
Prior art keywords
integrated circuits
manufacturing integrated
manufacturing
circuits
integrated
Prior art date
Application number
BR9404327A
Other languages
Portuguese (pt)
Inventor
Glenn J Leedy
Original Assignee
Glenn J Leedy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/146,470 external-priority patent/US5512397A/en
Application filed by Glenn J Leedy filed Critical Glenn J Leedy
Publication of BR9404327A publication Critical patent/BR9404327A/en

Links

BR9404327A 1993-11-02 1994-11-03 Process of manufacturing integrated circuits BR9404327A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/146,470 US5512397A (en) 1988-05-16 1993-11-02 Stepper scanner discretionary lithography and common mask discretionary lithography for integrated circuits

Publications (1)

Publication Number Publication Date
BR9404327A true BR9404327A (en) 1995-07-18

Family

ID=22517508

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9404327A BR9404327A (en) 1993-11-02 1994-11-03 Process of manufacturing integrated circuits

Country Status (1)

Country Link
BR (1) BR9404327A (en)

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Legal Events

Date Code Title Description
FA10 Dismissal: dismissal - article 33 of industrial property law