BR8100763A - Dispositivo de controle do funcionamento correto de um par de processadores que funcionam de acordo com o principio master-slave, um como reserva do outro - Google Patents

Dispositivo de controle do funcionamento correto de um par de processadores que funcionam de acordo com o principio master-slave, um como reserva do outro

Info

Publication number
BR8100763A
BR8100763A BR8100763A BR8100763A BR8100763A BR 8100763 A BR8100763 A BR 8100763A BR 8100763 A BR8100763 A BR 8100763A BR 8100763 A BR8100763 A BR 8100763A BR 8100763 A BR8100763 A BR 8100763A
Authority
BR
Brazil
Prior art keywords
reserve
processors
master
pair
control
Prior art date
Application number
BR8100763A
Other languages
English (en)
Inventor
G Donzello
Bellis V De
Original Assignee
Italtel Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Italtel Spa filed Critical Italtel Spa
Publication of BR8100763A publication Critical patent/BR8100763A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2025—Failover techniques using centralised failover control functionality
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54558—Redundancy, stand-by
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2028—Failover techniques eliminating a faulty processor or activating a spare
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2033—Failover techniques switching over of hardware resources
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)
BR8100763A 1980-02-11 1981-02-09 Dispositivo de controle do funcionamento correto de um par de processadores que funcionam de acordo com o principio master-slave, um como reserva do outro BR8100763A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8019830A IT1209187B (it) 1980-02-11 1980-02-11 Dispositivo di controllo del corretto funzionamento di una coppia di elaboratori funzionanti uno come riserva calda dell'altro.

Publications (1)

Publication Number Publication Date
BR8100763A true BR8100763A (pt) 1981-08-25

Family

ID=11161634

Family Applications (1)

Application Number Title Priority Date Filing Date
BR8100763A BR8100763A (pt) 1980-02-11 1981-02-09 Dispositivo de controle do funcionamento correto de um par de processadores que funcionam de acordo com o principio master-slave, um como reserva do outro

Country Status (9)

Country Link
BR (1) BR8100763A (pt)
DE (1) DE3104927A1 (pt)
ES (1) ES500046A0 (pt)
FR (1) FR2475762A1 (pt)
GB (1) GB2070391A (pt)
IE (1) IE810252L (pt)
IT (1) IT1209187B (pt)
PT (1) PT72489B (pt)
SE (1) SE8100697L (pt)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1133349B (it) * 1980-10-07 1986-07-09 Italtel Spa Rete di transito perfezionata per sistemi di telecomunicazioni a divisione di tempo
JPS6061850A (ja) * 1983-09-12 1985-04-09 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション コンピユ−タシステム
DE3334765A1 (de) * 1983-09-26 1985-04-11 Siemens AG, 1000 Berlin und 8000 München Pruefungseinrichtung zur fehlererkennung bei gedoppelten schaltungen, insbesondere prozessoren eines fernsprechvermittlungssystems
DE4241319A1 (de) * 1992-12-09 1994-06-16 Ant Nachrichtentech Rechnersystem

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2319456A1 (de) * 1973-04-17 1974-10-31 Siemens Ag Anordnung, insbesondere fernsprechvermittlungsanlage, mit zwei jeweils programmgesteuerten echt-zeit-datenverarbeitungsanlagen
IT1036311B (it) * 1975-06-17 1979-10-30 Cselt Centro Studi Lab Telecom Sistema duplicato per la supervi sione e il controllo di impianti di telecomunicazione duplicati
FR2352344A1 (fr) * 1976-05-18 1977-12-16 Labo Cent Telecommunicat Dispositif et procede pour faciliter la maintenance et/ou le diagnostic des systemes multicalculateurs
DE2647137C2 (de) * 1976-10-19 1983-11-10 Siemens AG, 1000 Berlin und 8000 München Anordnung aus zwei, dieselben Informationen verarbeitenden Datenverarbeitungsanlagen
DE2813079C3 (de) * 1978-03-25 1984-08-16 Standard Elektrik Lorenz Ag, 7000 Stuttgart Mehrrechnersystem hoher Sicherheit

Also Published As

Publication number Publication date
IE810252L (en) 1981-08-11
DE3104927A1 (de) 1981-12-24
IT1209187B (it) 1989-07-16
FR2475762A1 (fr) 1981-08-14
SE8100697L (sv) 1981-08-12
ES8202224A1 (es) 1982-02-01
PT72489B (en) 1982-03-12
IT8019830A0 (it) 1980-02-11
ES500046A0 (es) 1982-02-01
PT72489A (en) 1981-03-01
GB2070391A (en) 1981-09-03

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