BR7201929D0 - Circuito logico aperfeicoado - Google Patents

Circuito logico aperfeicoado

Info

Publication number
BR7201929D0
BR7201929D0 BR721929A BR192972A BR7201929D0 BR 7201929 D0 BR7201929 D0 BR 7201929D0 BR 721929 A BR721929 A BR 721929A BR 192972 A BR192972 A BR 192972A BR 7201929 D0 BR7201929 D0 BR 7201929D0
Authority
BR
Brazil
Prior art keywords
perfected
logic circuit
logic
circuit
perfected logic
Prior art date
Application number
BR721929A
Other languages
English (en)
Inventor
C Ananiades
H Stopper
Original Assignee
Burroughs Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burroughs Corp filed Critical Burroughs Corp
Publication of BR7201929D0 publication Critical patent/BR7201929D0/pt

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H03K19/0863—Emitter function logic [EFL]; Base coupled logic [BCL]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
BR721929A 1971-04-05 1972-05-04 Circuito logico aperfeicoado BR7201929D0 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13107071A 1971-04-05 1971-04-05

Publications (1)

Publication Number Publication Date
BR7201929D0 true BR7201929D0 (pt) 1973-06-14

Family

ID=22447725

Family Applications (1)

Application Number Title Priority Date Filing Date
BR721929A BR7201929D0 (pt) 1971-04-05 1972-05-04 Circuito logico aperfeicoado

Country Status (2)

Country Link
US (1) US3719830A (pt)
BR (1) BR7201929D0 (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3828202A (en) * 1971-07-06 1974-08-06 Burroughs Corp Logic circuit using a current switch to compensate for signal deterioration
US3783307A (en) * 1972-01-03 1974-01-01 Trw Inc Analog transmission gate
US3921007A (en) * 1974-04-08 1975-11-18 Burroughs Corp Standardizing logic gate
US3916216A (en) * 1974-04-08 1975-10-28 Burroughs Corp Digital logic circuit having internal compensation for signal deterioration
US4311926A (en) * 1977-08-11 1982-01-19 Gte Laboratories Incorporated Emitter coupled logic programmable logic arrays
US4400632A (en) * 1978-10-11 1983-08-23 Kushner Jury K Method and logic circuit for converting signals
JPH0720059B2 (ja) * 1984-05-23 1995-03-06 株式会社日立製作所 トランジスタ回路
TWI459188B (zh) * 2012-03-09 2014-11-01 Phison Electronics Corp 具智慧卡功能的記憶卡及其電源控制方法與電源控制電路
WO2013184965A1 (en) * 2012-06-07 2013-12-12 Masimo Corporation Depth of consciousness monitor

Also Published As

Publication number Publication date
US3719830A (en) 1973-03-06

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