BR112019002735B1 - PASSIVE DEVICE AND RADIOFREQUENCY FRONT END MODULE, RF - Google Patents

Abstract

IM CAPACITOR FOR IMPROVED PASSIVE GLASS (POG) MULTIPLEXER PERFORMANCE. A passive device may include an inductor with interconnected trace segments. The passive device may also include parallel plate capacitors. Each of the plurality of parallel plate capacitors may have a dielectric layer sandwiched between a pair of conductive plates. Parallel plate capacitors cannot overlap more than one of the interconnected trace segments.

Description

BACKGROUND Field

[001] Aspects of the present disclosure relate to semiconductor devices and, more particularly, to a multi-density metal-insulator-metal (MIM) capacitor for improved performance of the passive multiplexer on glass (POG).

Background

[002] One of the goals of the wireless industry is to provide consumers with greater bandwidth. The use of carrier aggregation in current generation communications provides a possible solution to achieve this goal. Carrier aggregation allows a wireless carrier, with licenses for two frequency bands (for example, 700 MHz and 2 GHz) in a specific geographic area, to maximize bandwidth by simultaneously using both frequencies for a single communication stream . Although a larger amount of data is provided to the end user, the implementation of carrier aggregation is complicated by the noise created at harmonic frequencies, due to the frequencies used for data transmission. For example, 700 MHz transmissions can create harmonics at 2.1 GHz, which interfere with data transmission at 2 GHz frequencies.

[003]For wireless communication, passive devices are used to process signals in a carrier aggregation system. In carrier aggregation systems, signals are communicated with high and low band frequencies. On a chipset, a passive device (for example, a diplexer) is typically inserted between an antenna and a tuner (or radio frequency (RF) switch) to ensure high performance. Typically, a diplexer design includes both inductors and capacitors. Diplexers can achieve high performance by using inductors and capacitors that have a high quality factor (Q). High-performance diplexers can also be achieved by reducing the electromagnetic coupling between components, which can be achieved by arranging the geometry and direction of the components.

[004]Mobile RF chip designs (e.g., mobile RF transceivers), including high-performance multiplexers, have migrated to a deep submicron process node due to considerations of cost and power consumption. The design of these mobile RF transceivers becomes complex at this deep submicron process node. The design complexity of these mobile RF transceivers is further complicated by additional circuitry functions to support communication enhancements such as carrier aggregation. Other design challenges for mobile RF transceivers include analog/RF performance considerations including incompatibility, noise, and other performance considerations. The design of these mobile RF transceivers includes the use of additional passive devices, for example to suppress resonance and/or to perform filtering, bypassing and coupling.

[005] Passive in glass devices involves high-performance capacitor and inductor components that have a variety of advantages over other technologies, such as surface mount technology or multi-layer ceramic chips that are commonly used in the manufacture of radio frequency chip designs mobile (RF). The design complexity of mobile RF transceivers is complicated by the migration to a deep sub-micron process node due to considerations of cost and power consumption. Spacing considerations also affect mobile RF transceiver design deep submicrometer process nodes, such as the large capacitor, which can cause a performance bottleneck during design integration of RF multiplexers.

SUMMARY

[006] A passive device may include an inductor with interconnected trace segments. The passive device may also include parallel plate capacitors. Each of the plurality of parallel plate capacitors may have a dielectric layer sandwiched between a pair of conductive plates. Parallel plate capacitors cannot overlap more than one of the interconnected trace segments.

[007] A passive device may include a set of metal-insulator-metal (MIM) capacitors in a common plane. A first MIM capacitor of the MIM capacitor array may include a first single layer of dielectric material of a first dielectric constant and a second MIM capacitor of the MIM capacitor array. Capacitors may further include a second single layer of dielectric material of a second dielectric constant that differs from the first dielectric constant.

[008] A passive device may include a set of metal-insulator-metal (MIM) capacitors in a common plane. A first capacitor may have a first dielectric thickness and a first dielectric constant of a first dielectric layer. A second capacitor may also have a second dielectric thickness of a second dielectric layer. The first dielectric thickness can differ from the second dielectric thickness. The first dielectric layer and the second dielectric layer are of the same material.

[009] A radio frequency (RF) front end module may include a multiplexer. The multiplexer may include an inductor with interconnected trace segments and parallel plate capacitors. Each of the plurality of parallel plate capacitors has a dielectric layer sandwiched between a pair of conducting plates. Each of the parallel plate capacitors overlaps no more than one of the interconnected trace segments. The RF front end module may also include an antenna coupled to a multiplexer output.

[0010] This has outlined, quite broadly, the features and technical advantages of the present disclosure, in order that the following detailed description may be better understood. Additional features and advantages of the reveal will be described here below. It should be appreciated by those skilled in the art that this disclosure can readily be used as a basis for modifying or designing other structures to accomplish the same purposes as the present disclosure. It should also be understood by those skilled in the art that such equivalent constructions do not depart from the teachings of the disclosure as set out in the appended claims. The innovative features believed to be characteristic of the disclosure, as to its organization and method of operation, together with objects and advantages, will be better understood from the following description when considered in connection with the appended figures. It should be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only, and is not intended to be a definition of the limits of the claims.

BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1A is a schematic diagram of a radio frequency (RF) front end module (RFFE) providing a diplexer in accordance with an aspect of the present disclosure.

[0012] Figure 1B is a schematic diagram of a radio frequency (RF) front end module (RFFE) that provides a diplexer to a chipset to provide carrier aggregation in accordance with aspects of the present disclosure.

[0013] Figure 2A is a diagram of a diplexer design in accordance with an aspect of the present disclosure.

[0014] Figure 2B is a diagram of a radio frequency (RF) front end module (RFFE) in accordance with an aspect of the present disclosure.

[0015] Figure 3 shows a cross-sectional view of a multiplexer with capacitors having different thicknesses of dielectric material according to an aspect of the present disclosure.

[0016] Figure 4 shows a cross-sectional view of a multiplexer device with capacitors having different dielectric material constants in accordance with an aspect of the present disclosure.

[0017] Figures 5A and 5B show top-down views of multiplexers in accordance with aspects of the present disclosure.

[0018] Figure 6 shows a top-down view of two passive devices in accordance with an aspect of the present disclosure.

[0019] Figure 7 illustrates a method of manufacturing a passive device with multiple capacitors in accordance with an aspect of the present disclosure.

[0020] Figure 8 is a block diagram showing an exemplary wireless communication system in which an aspect of the disclosure can be advantageously employed.

[0021] Figure 9 is a block diagram illustrating a design workstation used for circuit, layout and logic design of a fin-based structure in accordance with an aspect of the present disclosure.

DETAILED DESCRIPTION

[0022] The detailed description presented below in connection with the accompanying drawings is intended to be a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a complete understanding of the various concepts. However, it will be apparent to those skilled in the art that these concepts can be practiced without these specific details. In some cases, well-known structures and components are shown in block diagram form, in order to avoid obscuring such concepts. As described herein, use of the term "and/or" is intended to represent an "inclusive OR", and use of the term "or" is intended to represent an "exclusive OR".

[0023] Mobile RF chip designs (eg, mobile RF transceivers), including high-performance multiplexers, have migrated to a deep submicrometer process node due to cost and power consumption considerations. The design of these mobile RF transceivers becomes complex at this deep submicron process node. The design complexity of these mobile RF transceivers is further complicated by additional circuitry functions to support communication enhancements such as carrier aggregation. Other design challenges for mobile RF transceivers include analog/RF performance considerations including incompatibility, noise, and other performance considerations. The design of these mobile RF transceivers includes the use of additional passive devices, for example to suppress resonance and/or to perform filtering, bypassing and coupling.

[0024] The successful manufacture of modern semiconductor chip products involves interaction between the materials and processes employed. In particular, the formation of passive devices during semiconductor fabrication in back-end-of-line (BEOL) processes is an increasingly challenging part of the process flow. This is particularly true in terms of keeping a resource size small. The same challenge of maintaining a small resource size also applies to passive-on-glass (POG) technology, where high-performance components such as inductors and capacitors are built on a highly insulating substrate that can also have very low loss for support mobile RF transceiver design.

[0025] Passive on glass devices involves high-performance capacitor and inductor components that have a variety of advantages over other technologies such as surface mount technology or multi-layer ceramic chips that are commonly used in manufacturing RF chip designs mobile. The design complexity of mobile RF transceivers is complicated by the migration to a sub-micron deep process node due to cost and power consumption considerations. Spacing considerations also affect mobile RF transceiver design deep submicrometer process nodes, such as the large capacitor, which can cause a performance bottleneck during design integration of RF multiplexers.

[0026] Capacitors are passive elements used in integrated circuits to store an electrical charge. Capacitors are often made using plates or structures that are conductive with an insulating material between the plates. The amount of storage, or capacitance, for a given capacitor depends on the materials used to make the plates and insulator, the area of the plates, and the spacing between the plates. The insulating material is often a dielectric material. Metal-insulator-metal (MIM) capacitors are an example of a parallel-plate capacitor, in which the insulator is a dielectric material, and the plates are made of a conductive material (eg, metal).

[0027] Parallel plate capacitors are often employed in semiconductor arrays to provide capacitance to the circuit in the semiconductor arrays. Parallel plate capacitors are increasingly used to improve the performance of devices operating at higher and higher frequencies. For example, MIM capacitors are often used in high frequency (eg radio frequency (RF)) telecommunications applications such as cell phones, wireless devices and other telecommunications products. MIM capacitors often provide various functions on an integrated circuit, such as decoupling with a power supply, analog-to-digital conversions and filtering, and termination of transmission lines. Decoupling applications generally have relatively loose leakage current specifications, whereas analog typically involves closer matching between capacitors and relatively good voltage linearity. Furthermore, in many telecommunications applications, particularly portable applications, low loss and relatively small temperature linearity are desired.

[0028] Conventionally, capacitors are designed based on a specification in which the constant and thickness of the dielectric material of capacitors cannot vary within a device, or in a plane. For an increasing number of applications, however, desired capacitance densities and capacitor sizes may vary from one capacitor to another for a passive device. For example, a high capacitance density may be desired for some capacitors, and high quality (Q) factors may be desired for others. A combination of high density and high Q-factor may be desired for a different set of capacitors.

[0029] An application example is a multiplexer or diplexer of a radio frequency (RF) front-end device (RFFE) that accommodates a wide range of radio frequencies (for example, from a baseband of 700 MHz up to 20 GHz or superior). For a specific frequency range, there is a desired capacitance density, and the desired capacitance density changes as the frequency band in use changes. Thus, it is desirable to adapt capacitors to meet the different capacitance density specifications of an application. In some other cases, different capacitance sizes or a reduced capacitance size may be desired within the same passive device to meet a specific design specification.

[0030] Aspects of the present disclosure propose varying the thickness or materials of capacitor dielectrics within a passive device to accommodate a different capacitance density or a reduced capacitor size in the form of a multi-density MIM capacitor. In accordance with one aspect of the present disclosure, only the thickness of the same dielectric material can vary between an array of capacitors in a passive device. An advantage of this approach is that the manufacturing process is relatively simple because the process is calibrated for the same dielectric material. In accordance with another aspect of the present disclosure, the dielectric material constants of an array of capacitors in the passive device can be varied while maintaining the same thickness of the dielectric materials.

[0031] In accordance with yet another aspect of the present disclosure, both the constant and the thickness of the dielectric materials can be varied, to accommodate specific design specifications of an application. An advantage of this approach is the accommodation of a wide range of capacitance densities, especially when capacitor size is constrained. Other advantages of the present disclosure include quality improvements for both capacitors and inductors manufactured on the same chip substrate. In one configuration, inductors are built next to capacitors. Capacitor sizes can be reduced while maintaining a similar capacitance value by increasing the thickness of the dielectric material of the capacitors. This in turn improves the quality factor (Q) of the inductor by reducing the overlap between the inductor trace segments and the capacitor plates.

[0032] Figure 1A is a schematic diagram of a radio frequency (RF) front end module (RFFE) 100 that engages a diplexer 200 in accordance with an aspect of the present disclosure. RF front end module 100 includes power amplifiers 102, duplexer/filters 104, and a radio frequency (RF) switching module 106. Power amplifiers 102 amplify the signal(s) to a given power level for transmission. Duplexer/filters 104 filter input/output signals according to a variety of different parameters including frequency, insertion loss, rejection, or other similar parameters. Furthermore, the RF switch module 106 can select certain portions of the input signals to pass to the rest of the RF front end module 100.

[0033] The FR 100 front end module also includes the tuner circuit 112 (for example, first tuner circuit 112A and second tuner circuit 112B), the diplexer 200, a capacitor 116, an inductor 118, a ground terminal 115 and a antenna 114. Tuner circuit 112 (e.g., first tuner circuit 12A and second tuner circuit 112B) includes components such as a tuner, a portable data entry terminal (PDET) and an internally organized analog-to-digital converter (UKADC). ). The tuner circuit 112 can perform impedance tuning (e.g., a voltage standing wave rate (VSWR) optimization) for the antenna 114. The RF front end module 100 also includes a passive combiner 108 coupled to a transceiver (WTR) 120. Passive combiner 108 combines the detected energy from first tuner circuit 112A and second tuner circuit 112B. Wireless transceiver 120 processes information from passive combiner 108 and provides this information to a modem 130 (e.g., a mobile station modem (MSM)). Modem 130 provides a digital signal to an application processor (AP) 140.

[0034] As shown in FIGURE 1A, the diplexer 200 is between the tuner component of the tuner circuit 112 and the capacitor 116, the inductor 118 and the antenna 114. The diplexer 200 can be placed between the antenna 114 and the tuner circuit 112 to provide high system performance from the RF front end module 100 to a chipset including the wireless transceiver 120, the modem 130, and the application processor 140. The diplexer 200 also performs frequency domain multiplexing at both frequency high as in low band frequencies. After diplexer 200 performs its frequency multiplexing functions on the input signals, the output of diplexer 200 is fed to an optional LC (inductor/capacitor) network including capacitor 116 and inductor 118. extra impedance mapping for antenna 114, when desired. Then, a signal of the specified frequency is transmitted or received by antenna 114. Although a single capacitor and inductor are shown, multiple components are also contemplated.

[0035] Figure 1B is a schematic diagram of a wireless local area network (WLAN) (e.g., WiFi) module 170 including a first diplexer 200-1 and an RF front end module (RFFE) 150 including a second diplexer 200-2 to a chipset 160 to provide carrier aggregation in accordance with an aspect of the present disclosure. WiFi module 170 includes the first diplexer 200-1 communicatively coupling an antenna 192 to a wireless local area network module (e.g., WLAN module 172). The RF front end module 150 includes the second diplexer 200-2 communicatively coupling an antenna 194 to the wireless transceiver (WTR) 120 via a duplexer 180. The wireless transceiver 120 and the WLAN module 172 of the WiFi module 170 are coupled to a modem (MSM, e.g., baseband modem) 130 which is powered by a power supply 152 through a power management integrated circuit (PMIC) 156. Chipset 160 also includes capacitors 162 and 164 , as well as an inductor(s) 166 to provide signal integrity. PMIC 156, modem 130, wireless transceiver 120, and WLAN module 172 each include capacitors (e.g., 158, 132, 122, and 174) and operate according to a clock 154. The geometry and arrangement of the various inductor and capacitor components in the 160 chipset can reduce electromagnetic coupling between components.

[0036] Figure 2A is a diagram of a diplexer 200 in accordance with an aspect of the present disclosure. Diplexer 200 includes a high-band input (HB) port 212, a low-band input (LB) port 214, and an antenna 216. A high-band path of diplexer 200 includes a high-band antenna switch 210- 1. A lowband diplexer path 200 includes a lowband antenna switch 210-2. A wireless device including an RF front end module can use antenna switches 210 and diplexer 200 to allow a wide range band for an RF input and an RF output from the wireless device. In addition, antenna 216 may be a multiple-input, multiple-output (MIMO) antenna. Multi-input, multiple-output antennas will be widely used for the RF front end of wireless devices to support features such as carrier aggregation.

[0037] Figure 2B is a diagram of an RF front end module 250 in accordance with an aspect of the present disclosure. RF front end module 250 includes antenna switcher (ASW) 210 and diplexer 200 (or triplexer) to allow for the wide range band seen in FIGURE 2A. Furthermore, the RF front end module 250 includes filters 230, an RF switch 220, and power amplifiers 218 supported by a substrate 202. The filters 230 may include various LC filters, having inductors (L) and capacitors (C) arranged along substrate 202 to form a diplexer, a triplexer, low pass filters, balun filters, and/or notch filters to avoid high order harmonics in the RF front end module 250.

[0038] In this configuration, the diplexer 200 is implemented as a surface mount device (SMD) on a system board 201 (eg, printed circuit board (PCB) or package substrate). In contrast, the antenna switch 210 is implemented on the substrate 202 supported by the system board 201 of the RF front end module 250. Furthermore, the various LC filters of the filters 230 are also implemented as surface mount devices on the substrate. 202 of the RF front end module 250. Although shown as filters 230, the LC filters including a low pass filter(s) and/or a notch filter(s) are arranged across the substrate using pick and place technology to avoid high order harmonics in the RF 250 front end module.

[0039] Conventionally, the RF 250 front end module would include capacitors that are designed based on a specification that the constant and thickness of the dielectric material of the capacitors cannot vary within a device, or in a plane. In the RF 250 front end module, however, desired capacitance densities and capacitor sizes vary from one capacitor to another of the various passive devices. For example, a high capacitance density may be desired for some diplexer capacitors 200, and high quality (Q) factors may be desired for others, such as antenna switching 210. A combination of high density and high Q-factor may be desired. be desired for a different set of RF 250 front end module capacitors.

[0040] In accordance with aspects of the present disclosure, a multiplexer or diplexer 200 of the RF front end module 250 includes capacitors with varying capacitance densities and sizes to accommodate a wide range of radio frequencies (e.g., from a baseband of 700 MHz up to 20 GHz or higher). For a specific frequency range, there is a desired capacitance density, and the desired capacitance density changes as the frequency band in use changes. Thus, it is desirable to adapt capacitors to meet the different capacitance density specifications of an application. In some other cases, different capacity sizes or a reduced capacity size may be desired within the same passive device to meet a specific design specification.

[0041] Various aspects of the present disclosure provide techniques for adapting capacitor materials and/or thickness of dielectric materials to meet different capacitance density and capacitor size specifications. In one configuration, the thickness of the same dielectric material can vary between a set of capacitors, for example, as shown in FIGURE 3. In another configuration, the constants of the dielectric materials between a pair of conducting plates of a set of capacitors can vary, maintaining the same dielectric material thickness, for example, as shown in FIGURE 4. These variations may allow for a reduced size capacitor (eg maximum coverage area) with equal or similar capacitance density, for example, as shown in FIGURE 5.

[0042] FIGURE 3 shows a cross-sectional view of a multiplexer 300, in which a thickness of the same dielectric material may vary between an array of capacitors arranged in a common plane in accordance with aspects of the present disclosure. In this configuration, the multiplexer 300 includes three parallel plate capacitors, including a first parallel plate capacitor 310, a second parallel plate capacitor 320, and a third parallel plate capacitor 330. The three capacitors include a first shared conductor plate 304, which is supported by a substrate 302. In this configuration, the first shared conductor plate 304 may be fabricated using a first back-end-of-line (BEOL) interconnected layer (e.g., metal one (M1)) and the substrate 302 may be a glass substrate. Lengths and widths of passive components (eg, inductors and capacitors) of multiplexer 300 are for illustration purposes and are not drawn to scale.

[0043] As further illustrated in FIGURE 3, the first parallel plate capacitor 310 may include the first shared conductor plate 304, a second conductor plate 314, and a first dielectric layer 312, disposed between the first shared conductor plate 304 and the second plate conductor 314. The second parallel plate capacitor 320 is composed of the first shared conductor plate 304, a second conductor plate 324, and a second dielectric layer 322, disposed between the first shared conductor plate 304 and the second conductor plate 324. Similarly, the third parallel plate capacitor 330 is composed of the first shared conductor plate 304, a second conductor plate 334 and a third dielectric layer 332, disposed between the first shared conductor plate 304 and the second conductor plate 334. In an exemplary configuration, the three Parallel plate capacitors are metal-insulator-metal (MIM) capacitors. In this configuration, the second conductor plate 314, the second conductor plate 324, and the second conductor plate 334 can be fabricated using a second interconnected back-end-of-line layer (e.g., metal two (M2)).

[0044] According to aspects of the present disclosure, the first dielectric layer 312, the second dielectric layer 322, and the third dielectric layer 332 are composed of the same dielectric material having the same dielectric constant. The dielectric material can be a high K dielectric material such as silicon nitride (SiN), aluminum oxide (AlO) or tantalum pentoxide (Ta2O5), or other similar dielectric material. In an exemplary configuration, the first dielectric layer 312, the second dielectric layer 322 and the third dielectric layer 332 have different thicknesses. As described herein, the term thickness can refer to a distance between the first shared conductive plate 304 and the second conductive plate (e.g., 314, 324, or 334), occupied by the first dielectric layer 312, the second dielectric layer 322, or the third dielectric layer 332.

[0045] As shown in FIGURE 3, the first dielectric layer 312 has a first dielectric thickness 316, the second dielectric layer 322 has a second dielectric thickness 326, and the third dielectric layer 332 has a third dielectric thickness 336. In this configuration, the first dielectric thickness 316, second dielectric thickness 326 and third dielectric thickness 336 are different from each other. For example, the second dielectric thickness 326 is greater than the third dielectric thickness 336, which is greater than the first dielectric thickness 316. According to aspects of the present disclosure, the dielectric layer thickness of the first, second and third capacitors is selected to meet different capacitance density specifications for a given RF application, such as multiplexer 300. In an exemplary configuration, the first dielectric thickness 316, the second dielectric thickness 326, and the third dielectric thickness 336 can vary by 0.1 micrometers (μm) to twenty (20) µm.

[0046] Figure 3 also shows an inductor 360 of the multiplexer 300. The inductor 360 is composed of a first portion 350-1 of a third conductive layer 350, a fourth conductive layer 366, and a path 364 disposed between the first portion 350- 1 of the third conductive layer 350 and the fourth conductive layer 366. A conductive protrusion 370 is coupled to the fourth conductive layer 366 to allow for a package connection. In an exemplary configuration, inductor 360 may be a conductive redistribution layer (RDL) inductor (e.g., copper). In this configuration, the third conductive layer 350 can be fabricated using an interconnected third back-end-of-line layer (e.g., metal three (M3)). Furthermore, the fourth conductive layer 366 may be fabricated using an interconnected fourth back-end-of-line layer (e.g., fourth metal (M4)).

[0047] The multiplexer 300 also includes a first path 342 that couples the second conductor plate 314 to the first portion 350-1 of the third conductor layer 350; a second path 344 that couples the second conductive plate 324 to a second portion 350-2 of the third conductive layer 350; and a third path 346 that couples the second conductive plate 334 to a third portion 350-3 of the third conductive layer 350. In an exemplary configuration, a fourth portion 350-4 of the third conductive layer 350 allows access to the shared first conductive plate 304 via a fourth path 340. The multiplexer 300 includes a passivation layer 372 provided in a dielectric interlayer (TLD) 374 surrounding the passive components of the multiplexer 300.

[0048] Figure 4 shows a cross-sectional view of a multiplexer 400 including an array of parallel plate capacitors arranged within the same plane, but using different dielectric materials, in accordance with aspects of the present disclosure. In this configuration, the multiplexer 400 also includes a first parallel plate capacitor 410, a second parallel plate capacitor 420, and a third parallel plate capacitor 430. The three capacitors each include a first shared conductor plate 404, which is supported by a layers of substrate 402. In this configuration, the first shared conductor plate 404 is fabricated using the first interconnected back-end-of-line layer, and the substrate 402 may be a glass substrate.

[0049] As further illustrated in FIGURE 4, the first parallel plate capacitor 410 includes the first shared conductor plate 404, a second conductor plate 414, and a first dielectric layer 412, disposed between the first shared conductor plate 404 and the second conductor plate 424. The second parallel plate capacitor 420 is composed of the first shared conductor plate 404, a second conductor plate 424, and a second dielectric layer 422 disposed between the first shared conductor plate 404 and the second conductor plate 424. Similarly, the third parallel plate capacitor 430 is composed of the first shared conductor plate 404, a second conductor plate 434, and a third dielectric layer 432, disposed between the first shared conductor plate 404 and the second conductor plate 434. In this configuration, the second conductor plate 414 , the second conductor plate 424 and the second conductor plate 434 are manufactured using the second back-end-of-line interconnected layer M2.

[0050] According to aspects of the present disclosure, the first dielectric layer 412, the second dielectric layer 422, and the third dielectric layer 432 are of the same thickness, but are manufactured using different dielectric materials having different dielectric constants. For example, first dielectric layer 412 can have a first dielectric constant, second dielectric layer 422 can have a second dielectric constant, and third dielectric layer 432 can have a third dielectric constant. In an exemplary configuration, an array of metal-insulator-metal (MIM) capacitors (eg, 410, 420, and 430) are arranged in a common plane. A first MIM capacitor (eg, 410) of the MIM capacitor set includes a first single layer of dielectric material (eg, 412) of a first dielectric constant. A second MIM capacitor (eg, 420) of the MIM capacitor set has a second, single layer of dielectric material (eg, 422) of a second dielectric constant that differs from the first dielectric constant.

[0051] The different dielectric materials may include, but are not limited to, silicon nitride (SiN), aluminum oxide (AlO), tantalum pentoxide (Ta2O5), silicon dioxide, hafnium silicate, zirconium silicate, dioxide of hafnium and zirconium dioxide, among others. In accordance with this aspect of the present disclosure, the first parallel plate capacitor 410, the second parallel plate capacitor 420 and the third parallel plate capacitor 430 are fabricated with different dielectric materials having different dielectric constants to meet different density specifications. capacitance and capacitor size of an RF application such as the 400 multiplexer.

[0052] Figure 4 also shows an inductor 460 of the multiplexer 400. The inductor 460 is composed of a first portion 450-1 of a third conductive layer 450, a fourth conductive layer 466 and a path 464 disposed between the first portion 450-1 of the third conductive layer 450 and the fourth conductive layer 466. A conductive protrusion 470 is coupled to the fourth conductive layer 466 to allow for a package connection. In an exemplary configuration, inductor 460 may be a conductive redistribution layer inductor (e.g., copper). In this configuration, the third conductive layer 450 is fabricated using the back-end-of-line interconnected third layer M3. Furthermore, the fourth conductive layer 466 can be fabricated using the fourth off-line back-end interconnected layer M4.

[0053] The multiplexer 400 also includes a first path 442 that couples the second conductor plate 414 to the first portion 450-1 of the third conductor layer 450; a second path 444 that couples the second conductive plate 424 to a second portion 450-2 of the third conductive layer 450; and a third path 446 that couples the second conductive plate 434 to a third portion 450-3 of the third conductive layer 450. In an exemplary embodiment, a fourth portion 450-4 of the third conductive layer 450 allows access to the shared first conductive plate 404 via a fourth path 440. The multiplexer 400 includes a passivation layer 472 provided in a dielectric interlayer (ILD) 474 surrounding the passive components of the multiplexer 300.

[0054] Figures 5A and 5B illustrate top-down views of a first multiplexer 500 and a second multiplexer 550, respectively, with different levels of overlap between capacitors and inductors in accordance with aspects of the present disclosure. Again, first multiplexer 500 and second multiplexer 550 are provided for the purpose of illustration and are not drawn to scale. The top-down views in FIGURES 5A and 5B each show an output port 502 and 552, and multiple conductor plates and traces that form parallel plate capacitors and inductors of the first multiplexer 500 and second multiplexer 550, respectively.

[0055] With reference to Figure 5B, the second multiplexer 550 includes a first parallel plate capacitor 580, a second parallel plate capacitor 590 and shared plate, serially coupled parallel plate capacitors 560. In this configuration, the parallel plate capacitors Coupled in series overlap trace segments (TS1, TS2, TS3) of a planar two-dimensional (2D) spiral wound inductor 570. A shared first plate capacitor 560-1 is composed of a shared first conductor plate 562 and a second conductor plate 564 In addition, a second shared plate capacitor 560-2 is composed of the first shared conductor plate 562 and a second conductor plate 566. The parallel plate capacitors 560 coupled in series are arranged to provide a capacitance density specified by the design of the second multiplexer 550. In this configuration, the first shared conductor plate 562, the second conductor plate 564 and the second conductor plate 566 of the parallel coupled parallel plate capacitors 560 substantially overlap a first trace segment TS1 and a second trace segment TS2 of the 570 2D spiral inductor.

[0056] In this exemplary configuration, the dielectric thickness of the series-coupled parallel plate capacitors 560 is fixed and cannot be changed to accommodate a specific capacitance density or capacitance size specification of an RF application. As a result, the series-coupled parallel plate capacitors 560 overlap an entirety of the first trace segment TS1 and a portion of the second trace segment TS2 of the 2D spiral inductor 570. Unfortunately, this overlapping arrangement of the coupled parallel plate capacitors in series 560 and segments TS1 and TS2 of 2D spiral inductor 570 substantially degrade the performance of 2D spiral inductor 570, resulting in reduced quality factor (Q) and degraded insertion loss of the multiplexer.

[0057] With reference to Figure 5A, the first multiplexer 500 includes a first parallel plate capacitor 530, a second parallel plate capacitor 540 and a parallel plate capacitor, of variable dielectric thickness 510. The parallel plate capacitor, of thickness variable dielectric 510, is comprised of a first conductive plate 512, a dielectric layer of variable thickness, and a second conductive plate 514. Similar to FIGURE 5B, the first multiplexer 500 also includes a planar two-dimensional (2D) spiral inductor 520 composed of a first trace segment TS1, a second trace segment TS2 and a third trace segment TS3.

[0058] In contrast to the second multiplexer 550, the first multiplexer 500 is arranged with a reduced overlap between varying dielectric thicknesses, parallel plate capacitor 510 and the trace segments (TS1, TS2, TS3) of the 2D spiral inductor 520. In accordance with one aspect of the present disclosure, the varying dielectric thickness of the parallel plate capacitor 510 can correspond to the first parallel plate capacitor 310 of the multiplexer 300 of FIGURE 3. In an exemplary configuration, the dielectric layer thickness of the plate capacitor parallel 510 is scaled down to satisfy a given capacitance density and capacitor size specification. As a result, parallel plate capacitor 510 has reduced overlap with trace segments (TS1, TS2 and TS3) of 2D spiral inductor 520. In particular, parallel plate capacitor 510 overlaps only a portion of the first segment TS1 trace of the 2D spiral inductor 520.

[0059] In an exemplary configuration, the overlap area can be expressed as a percentage of the total area of a conducting plate of a capacitor. In another setting, the area of overlap can be expressed as a specific measurement, such as 0.1 micron (μm). In yet another embodiment, the area of overlap can be expressed in terms of a number of trace segments of a spiral inductor. For example, parallel plate capacitor 510 is said to overlap 2D spiral inductor 520 by a portion of the first trace segment TS1, and series coupled parallel plate capacitors 560 are said to overlap 2D spiral inductor 570 by more than one dash segment.

[0060] FIGURE 6 shows a top-down view 600 of series-coupled first capacitors 610 and series-coupled second capacitors 620, in accordance with an aspect of the present disclosure. In an exemplary aspect of the disclosure, the series-coupled second capacitors have a fixed thickness. For example, a fixed dielectric layer thickness of 50 x 50 µm can be achieved with two SiNx capacitors that have a fixed, large gap 623 between the two capacitors 622 and 624.

[0061] Still referring to Figure 6, the first series-coupled capacitors 610 have an increased dielectric layer thickness to achieve a different capacitance density and package size specification. For example, the thickness of the dielectric layer is increased by connecting four capacitors 612, 614, 616 and 618 in series on the same board, with a reduced gap 613 between capacitor 614 and capacitor 616. An exemplary configuration, as shown in the first capacitors coupled in series 610, can result in a thicker dielectric layer and larger capacitor size. This can, in turn, achieve better tolerance control and capacitance density for passive devices, which is desirable for some applications. In an exemplary configuration, the first series-coupled capacitors 610 may have a thickness of 100 µm x 100 µm when the four capacitors 612, 614, 616 and 618 are connected on the same board in series with the reduced gap 613 between the capacitors.

[0062] FIGURE 7 is a method for making a passive device with multiple capacitors having varying thicknesses. At block 702, a first conductive layer is deposited on a substrate to form a first shared conductive pad. The substrate may be substrate 302 and the first shared conductive plate may be the first shared conductive plate 304 of FIGURE 3. On block 704, a first dielectric layer, having a first dielectric layer thickness, is deposited on a first portion of the first Shared driver board. The first dielectric layer can be the first dielectric layer 312 of the first parallel plate capacitor 310 of Figure 3.

[0063] Referring again to Figure 7, at block 706, a second dielectric layer, having a second thickness, is deposited on a second portion of the first shared conductive plate. The second portion of the first shared conductive plate may be adjacent the first dielectric layer with a predetermined gap between the first dielectric layer and the second dielectric layer. In an exemplary embodiment, the first dielectric layer and the second dielectric layer are of the same dielectric material and the second dielectric layer thickness is different from the first dielectric layer thickness. The second dielectric layer may be the second dielectric layer 322 of the second parallel plate capacitor 320, having the second dielectric thickness 326, as shown in FIGURE 3.

[0064] Referring again to Figure 7, at block 708, method 700 includes depositing a second conductive layer on the first dielectric layer to form a second plate of a first parallel plate capacitor. At block 710, the second conductive layer is deposited on the second dielectric layer to form a second plate of a second parallel plate capacitor. In an exemplary configuration, the blocks 708 and 710 form the first parallel plate capacitor 310 having the first dielectric thickness 316 and the second parallel plate capacitor 320 having the second dielectric thickness 326 less than the first dielectric thickness 316, as shown in Fig. FIGURE 3.

[0065] Conventional capacitors are designed based on a specification in which the constant and thickness of the dielectric material of capacitors cannot vary within a device or a plane. For an increasing number of applications, however, desired capacitance densities and capacitor sizes may vary from one capacitor to another within, for example, a passive RF device. For example, a high capacitance density may be desired for some capacitors, and high quality (Q) factors may be desired for others. A combination of a high density and a high Q-factor may be desired for a different set of capacitors.

[0066] An application example is a multiplexer or diplexer of a radio frequency (RF) front-end device (RFFE) that accommodates a wide range of radio frequencies (for example, from a baseband of 700 MHz to 20 GHz or superior). For a specific frequency range, there is a desired capacitance density, and the desired capacitance density changes as the frequency band in use changes. Thus, it is desirable to adapt capacitors to meet the different capacitance density specifications of an RF application. In some other cases, different capacitance sizes or a reduced capacitance size may be desired within the same passive device to meet a specific design specification.

[0067] Aspects of the present disclosure propose varying the thickness or materials of capacitor dielectrics within a passive device to accommodate a different capacitance density or reduced capacitor size in the form of multi-density MIM capacitors. According to one aspect of the present disclosure, only the thickness of the same dielectric material can vary between a set of capacitors. An advantage of this approach is that the manufacturing process is relatively simple because the process is calibrated for the same dielectric material. In accordance with another aspect of the present disclosure, the constants of the dielectric materials of an array of capacitors can be varied while maintaining the same thickness of the dielectric materials.

[0068] In accordance with yet another aspect of the present disclosure, both the constant and the thickness of the dielectric materials can be varied, to accommodate specific design specifications of an application. An advantage of this approach is the accommodation of a wide range of capacitance densities, especially when capacitor size is constrained. Other advantages of the present disclosure include quality improvements for both capacitors and inductors manufactured on the same chip substrate. In one configuration, inductors are built next to capacitors. Capacitor sizes can be reduced while maintaining a similar capacitance value by increasing the thickness of the capacitor's dielectric material. This in turn can improve the performance of the inductors by reducing an insertion loss of the inductors.

[0069] Figure 8 is a block diagram showing an exemplary wireless communication system 800 in which an aspect of the disclosure can be advantageously employed. For purposes of illustration, Figure 8 shows three remote units 820, 830 and 850, and two base stations 840. It will be recognized that wireless communication systems can have many more remote units and base stations. Remote units 820, 830, and 850 include IC devices 825A, 825B, and 825C that include multi-density MIM capacitors. It will be recognized that other devices may also include the multi-density MIM capacitors, such as base stations, switching devices, and network equipment. Figure 8 shows forward link signals 880 from base station 840 to remote units 820, 830, and 850 and 890 and reverse links 790 from remote units 820, 830, 850 to base stations 840.

[0070] In Figure 8, the remote unit 820 is shown as a mobile telephone, the remote unit 830 is shown as a portable computer, and the remote unit 850 is shown as a fixed location remote unit in a wireless local loop system. wires. For example, the remote unit could be a cell phone, a portable personal communications systems (PCS) unit, a portable data unit such as a personal digital assistant (PDA), a GPS-enabled device, a navigation device, a decoder, music player, video player, communication device, entertainment unit, fixed location data unit such as meter reading equipment, or other devices that store or retrieve data or instructions computer, or combinations thereof. While Figure 8 illustrates remote units in accordance with aspects of the present disclosure, this disclosure is not limited to these illustrated exemplary units. Aspects of disclosure can be suitably employed in many devices, which include the disclosed multi-density MIM capacitors.

[0071] Figure 9 is a block diagram illustrating a design workstation used for circuit, layout, and logic design of the multi-density MIM capacitors disclosed above. A design workstation 900 includes a hard drive 901 which contains operating system software, support files and design software such as Cadence or OrCAD. The design workstation 900 also includes a display 902 to facilitate the design of a circuit 910 or the multi-density MIM capacitors 912. A storage media 904 is provided to tangibly store the circuit design 910 or the capacitors Multi-density MIM 912. Circuit design 910 or multi-density MIM capacitors 912 may be stored on storage media 904 in a file format such as GDSII or GERBER. Storage media 904 can be a CD-ROM, DVD, hard disk, flash memory, or other suitable device. Furthermore, design workstation 900 includes a drive apparatus 903 for accepting input from or recording output to storage media 904.

[0072] Data written to storage media 904 may specify logic circuit configurations, default data for photolithography masks, or default mask data for serial recording tools such as electron beam lithography. The data may further include logic verification data, such as timing diagrams or network circuits associated with logic simulations. Providing data on storage media 904 facilitates circuit design 910 or multi-density MIM capacitors 912 by decreasing the number of processes for designing semiconductor chips.

[0073] For a software and/or firmware implementation, methodologies can be implemented with modules (eg, procedures, functions, and so on) that perform the functions described here. Machine-readable media that tangibly contain instructions can be used in implementing the methodologies described here. For example, software codes can be stored in memory and executed by a processor unit. Memory can be implemented within the processor unit or external to the processor unit. As used herein, the term "memory" refers to types of memory, long-term, short-term, volatile, non-volatile, or other memory and is not to be limited to a specific type of memory or number of memories, or type of media upon which memory is stored.

[0074] If implemented in firmware and/or software, functions may be stored as one or more instructions or code on computer-readable media. Examples include computer readable media encoded with a data structure and computer readable media encoded with a computer program. Computer readable media includes physical computer storage media. A storage media can be available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or other media that may be used for storing the desired program code in the form of instructions or data structures and accessible by a computer; disk and floppy disk as used herein includes compact disk (CD), laser disk, optical disk, digital versatile disk (DVD), floppy disk and Blu-ray disk where floppy disks generally reproduce data magnetically, while disks reproduce data optically with lasers. Combinations of the foregoing should also be included within the scope of computer-readable media.

[0075] In addition to storage on computer-readable media, instructions and/or data may be provided as signals on transmission media included in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicative of instructions and data. The instructions and data are configured to cause one or more processors to perform the functions described in the claims.

[0076] While the present disclosure and its advantages have been described in detail, it is to be understood that various changes, substitutions and modifications can be made herein without departing from the technology of the disclosure as defined by the appended claims. For example, relational terms such as “above” and “below” are used in relation to an electronic substrate or device. Of course, if the substrate or electronic device is reversed, above becomes below and vice versa. Also, if oriented sideways, above and below can refer to the sides of an electronic substrate or device. Furthermore, the scope of the present application is not intended to be limited to the specific process, machine, fabrication, composition of matter, means, methods and steps described in the specification. As will be readily understood by one skilled in the art from the disclosure, the processes, machines, fabrication, compositions of matter, means, methods, or steps, currently existing or later to be developed which perform substantially the same function or achieve substantially the same As a result, the corresponding configurations described herein can be used in accordance with the present disclosure. Accordingly, the appended claims are intended to include within their scope these processes, machines, manufacture, compositions of matter, means, methods, or steps.

[0077] Those skilled in the art would further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in connection with the present disclosure may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above, generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the application and specific design limitations imposed on the overall system. Persons skilled in the art may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be construed as causing a departure from the scope of the present disclosure.

[0078] The various logic blocks, modules and illustrative circuits described in connection with the present disclosure can be implemented or executed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA) signal or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but alternatively the processor may be any conventional processor, controller, microcontroller, or conventional state machine. A processor can also be implemented as a combination of computing devices (for example, a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other type of configuration).

[0079] The steps of a method or algorithm described in relation to disclosure can be incorporated directly in hardware, in a software module executed by a processor, or in combination of the two. A software module may reside in RAM, flash memory, ROM, EPROM, EEPROM, registers, the hard disk, a removable disk, a CD-ROM, or any other form of storage media known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from, and write information to, the storage medium. Alternatively, the storage media can be an integral part of the processor. The processor and storage media can reside in an ASIC. The ASIC can reside on a user terminal. Alternatively, the processor and storage media can reside as separate components in a user terminal.

[0080] In one or more exemplary designs, the described functions can be implemented in hardware, software, firmware or any combination thereof. If implemented in software, functions may be stored in or transmitted via one or more instructions or code on computer-readable media. Computer-readable media include computer storage media and communication media, including any medium that facilitates the transfer of a computer program from one place to another. A storage medium can be any available medium that can be accessed by a general-purpose or special-purpose computer. By way of example, and not limitation, such computer-readable media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that may be used to carry or store specified program code media in the form of instructions or data structures and which may be accessed by a general purpose computer or special purpose computer, or a general purpose processor or special purpose processor. Also, any connection is properly called a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source over coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, so coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of media. Disk and floppy disk as used herein include compact disk (CD), laser disk, optical disk, digital versatile disk (DVD), floppy disk and Blu-ray disk where floppy disks generally play data magnetically while disks play data optically with lasers. Combinations of the foregoing should also be included within the scope of computer-readable media.

[0081] The foregoing description of the disclosure is provided to enable anyone skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other variations without departing from the spirit and scope of the disclosure. Thus, the description is not intended to be limited to the examples and drawings described herein, but is to be within the widest scope consistent with the principles and novel features described herein.

Claims (15)

1. Passive device, comprising: a plurality of parallel plate capacitors (410, 420, 430, 510, 530, 540) in a common plane, each of the plurality of parallel plate capacitors (410, 420, 430, 510, 530, 540) having a dielectric layer between a pair of conductive plates; characterized in that the passive device further comprises: a first parallel plate capacitor of the plurality of parallel plate capacitors having a first single layer of dielectric material of a first dielectric constant and a second parallel plate capacitor of the plurality of plate capacitors parallels having a second single layer of dielectric material of a second dielectric constant that differs from the first dielectric constant; and a two-dimensional spiral inductor (460, 520) comprising a plurality of interconnected trace segments; where only one of the parallel plate capacitors (410, 420, 430, 510, 530, 540) overlaps an interconnected trace segment and the other parallel plate capacitors (410, 420, 430, 510, 530, 540) do not overlap none of the trace segments interconnected. 2. Passive device, according to claim 1, characterized in that the passive device comprises a passive device in glass, POG. 3. Passive device, according to claim 1, characterized by the fact that the plurality of parallel plate capacitors comprises metal-insulator-metal capacitors, MIM. 4. Passive device, according to claim 3, characterized by the fact that the metal-insulator-metal capacitors, MIM, are composed of different dielectric materials. 5. Passive device according to claim 3, characterized in that it additionally comprises a third MIM capacitor having the same single layer of dielectric material and dielectric constant as the first MIM capacitor, the third MIM capacitor connected in series with the first MIM capacitor. 6. Passive device, according to claim 1, characterized in that the passive device is part of a multiplexer. 7. Passive device, comprising: a plurality of parallel plate capacitors (310, 320, 330, 510, 530, 540) in a common plane, each of the plurality of parallel plate capacitors (310, 320, 330, 510, 530, 540) having a dielectric layer between a pair of conductive plates; characterized in that the passive device further comprises: a first parallel plate capacitor of the plurality of parallel plate capacitors having a first dielectric thickness and a first dielectric constant of a first dielectric layer and a second parallel plate capacitor of the plurality of capacitors of parallel plates having a second dielectric thickness of a second dielectric layer, the first dielectric thickness differing from the second dielectric thickness, wherein the first dielectric layer and the second dielectric layer are of the same material; and a two-dimensional spiral inductor (360, 520) comprising a plurality of interconnected trace segments; where only one of the parallel plate capacitors (310, 320, 330, 510, 530, 540) overlaps an interconnected trace segment and the other parallel plate capacitors (310, 320, 330, 510, 530, 540) do not overlap none of the trace segments interconnected. 8. Passive device, according to claim 7, characterized in that the passive device comprises a passive device in glass, POG. 9. Passive device, according to claim 7, characterized by the fact that the plurality of parallel plate capacitors comprises metal-insulator-metal capacitors, MIM. 10. Passive device according to claim 9, characterized in that it additionally comprises a third MIM capacitor having the same dielectric thickness and dielectric constant as the first MIM capacitor, the third MIM capacitor connected in series with the first MIM capacitor. 11. Passive device, according to claim 9, characterized by the fact that the dielectric layers comprise silicon nitride, SiN, aluminum oxide, AlO, and tantalum pentoxide, Ta2O5. 12. Passive device according to claim 9, characterized in that the passive device is part of a multiplexer. 13. Passive device, according to claim 9, characterized in that the passive device is part of a mobile device. 14. Passive device according to claim 9, characterized in that a range of the first thickness and the second thickness comprises 0.1 micrometer to 1 micrometer. 15. Radio frequency, RF front end module, characterized in that it comprises: a multiplexer (200), comprising the passive device, as defined in any one of claims 1 to 14; and an antenna (114) coupled to an output of the multiplexer.