BR112017014359A2 - método e aparelho para detectar conflito de transação e sistema de computador. - Google Patents

método e aparelho para detectar conflito de transação e sistema de computador.

Info

Publication number
BR112017014359A2
BR112017014359A2 BR112017014359A BR112017014359A BR112017014359A2 BR 112017014359 A2 BR112017014359 A2 BR 112017014359A2 BR 112017014359 A BR112017014359 A BR 112017014359A BR 112017014359 A BR112017014359 A BR 112017014359A BR 112017014359 A2 BR112017014359 A2 BR 112017014359A2
Authority
BR
Brazil
Prior art keywords
computer system
detecting transaction
system conflict
conflict
transaction
Prior art date
Application number
BR112017014359A
Other languages
English (en)
Inventor
Zhu Guanyu
Liu Haiyan
Xu Jun
Original Assignee
Huawei Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Tech Co Ltd filed Critical Huawei Tech Co Ltd
Publication of BR112017014359A2 publication Critical patent/BR112017014359A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614—Improving the reliability of storage systems
    • G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
BR112017014359A 2014-12-31 2014-12-31 método e aparelho para detectar conflito de transação e sistema de computador. BR112017014359A2 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2014/096043 WO2016106738A1 (zh) 2014-12-31 2014-12-31 事务冲突检测方法、装置及计算机系统

Publications (1)

Publication Number Publication Date
BR112017014359A2 true BR112017014359A2 (pt) 2018-04-10

Family

ID=56284008

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112017014359A BR112017014359A2 (pt) 2014-12-31 2014-12-31 método e aparelho para detectar conflito de transação e sistema de computador.

Country Status (7)

Country Link
US (1) US20170300255A1 (pt)
EP (1) EP3232320A4 (pt)
JP (1) JP2018500697A (pt)
KR (1) KR20170100643A (pt)
CN (1) CN106662998A (pt)
BR (1) BR112017014359A2 (pt)
WO (1) WO2016106738A1 (pt)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10102233B1 (en) * 2018-04-30 2018-10-16 Merck Sharp & Dohme Corp. Indexing for database privacy and anonymization
CN111490906B (zh) * 2020-06-29 2020-09-25 武汉思普崚技术有限公司 一种网关设备策略的分析方法、装置及可读存储介质
CN112685241A (zh) * 2021-01-27 2021-04-20 中国科学院微电子研究所 一种多粒度的内存检测方法、内存设备以及电子设备
CN114327263A (zh) * 2021-12-15 2022-04-12 中国航空工业集团公司成都飞机设计研究所 一种飞控计算机nvm多层次管理方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080005504A1 (en) * 2006-06-30 2008-01-03 Jesse Barnes Global overflow method for virtualized transactional memory
US7711678B2 (en) * 2006-11-17 2010-05-04 Microsoft Corporation Software transaction commit order and conflict management
US8060482B2 (en) * 2006-12-28 2011-11-15 Intel Corporation Efficient and consistent software transactional memory
US8321637B2 (en) * 2007-05-14 2012-11-27 International Business Machines Corporation Computing system with optimized support for transactional memory
US7941411B2 (en) * 2007-06-29 2011-05-10 Microsoft Corporation Memory transaction grouping
US8180986B2 (en) * 2008-09-17 2012-05-15 Microsoft Corporation Memory conflict detection via mapping of the physical heap to control access permissions to the memory
CN102460376B (zh) * 2009-06-26 2016-05-18 英特尔公司 无约束事务存储器(utm)系统的优化
CN101667211B (zh) * 2009-08-20 2011-04-20 华中科技大学 一种数据库中动态多粒度锁的事务冲突判决方法
US8209499B2 (en) * 2010-01-15 2012-06-26 Oracle America, Inc. Method of read-set and write-set management by distinguishing between shared and non-shared memory regions
CN101872299B (zh) * 2010-07-06 2013-05-01 浙江大学 冲突预测实现方法及所用冲突预测处理装置事务存储器
US8914586B2 (en) * 2012-07-31 2014-12-16 Advanced Micro Devices, Inc. TLB-walk controlled abort policy for hardware transactional memory

Also Published As

Publication number Publication date
US20170300255A1 (en) 2017-10-19
EP3232320A4 (en) 2018-01-24
CN106662998A (zh) 2017-05-10
EP3232320A1 (en) 2017-10-18
JP2018500697A (ja) 2018-01-11
WO2016106738A1 (zh) 2016-07-07
KR20170100643A (ko) 2017-09-04

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Legal Events

Date Code Title Description
B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 5A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: EM VIRTUDE DO ARQUIVAMENTO PUBLICADO NA RPI 2547 DE 29-10-2019 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDO O ARQUIVAMENTO DO PEDIDO DE PATENTE, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013.