BG44841A1 - - Google Patents

Info

Publication number
BG44841A1
BG44841A1 BG7002685A BG7002685A BG44841A1 BG 44841 A1 BG44841 A1 BG 44841A1 BG 7002685 A BG7002685 A BG 7002685A BG 7002685 A BG7002685 A BG 7002685A BG 44841 A1 BG44841 A1 BG 44841A1
Authority
BG
Bulgaria
Application number
BG7002685A
Inventor
Khristo A Turlakov
Venelin G Barbutov
Stefan S Machev
Original Assignee
Khristo A Turlakov
Venelin G Barbutov
Stefan S Machev
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Khristo A Turlakov, Venelin G Barbutov, Stefan S Machev filed Critical Khristo A Turlakov
Priority to BG7002685A priority Critical patent/BG44841A1/xx
Priority to DD28975486A priority patent/DD271438A7/de
Priority to HU179286A priority patent/HUT41147A/hu
Priority to DE19863614612 priority patent/DE3614612A1/de
Publication of BG44841A1 publication Critical patent/BG44841A1/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/285Halt processor DMA
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4009Coupling between buses with data restructuring
    • G06F13/4018Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Bus Control (AREA)
BG7002685A 1985-04-30 1985-04-30 BG44841A1 (US20030204162A1-20031030-M00002.png)

Priority Applications (4)

Application Number Priority Date Filing Date Title
BG7002685A BG44841A1 (US20030204162A1-20031030-M00002.png) 1985-04-30 1985-04-30
DD28975486A DD271438A7 (de) 1985-04-30 1986-04-29 Einrichtung zur steuerung des direkten bytesreihenfolgezugriffs zum speicher eines 16-stelligen microprozessorssystems
HU179286A HUT41147A (en) 1985-04-30 1986-04-29 Equipment for direct acces control of a memory in 16-bit microprocessor system according to the bit sequence
DE19863614612 DE3614612A1 (de) 1985-04-30 1986-04-30 Inrichtung zum steuern des direkten bytesreihenfolgezugriffs zu einem speicher eines 16-stelligen mikroprozessorsystems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
BG7002685A BG44841A1 (US20030204162A1-20031030-M00002.png) 1985-04-30 1985-04-30

Publications (1)

Publication Number Publication Date
BG44841A1 true BG44841A1 (US20030204162A1-20031030-M00002.png) 1989-02-15

Family

ID=3915565

Family Applications (1)

Application Number Title Priority Date Filing Date
BG7002685A BG44841A1 (US20030204162A1-20031030-M00002.png) 1985-04-30 1985-04-30

Country Status (4)

Country Link
BG (1) BG44841A1 (US20030204162A1-20031030-M00002.png)
DD (1) DD271438A7 (US20030204162A1-20031030-M00002.png)
DE (1) DE3614612A1 (US20030204162A1-20031030-M00002.png)
HU (1) HUT41147A (US20030204162A1-20031030-M00002.png)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4831514A (en) * 1986-02-14 1989-05-16 Dso "Izot" Method and device for connecting a 16-bit microprocessor to 8-bit modules
US4965723A (en) * 1987-10-23 1990-10-23 Digital Equipment Corporation Bus data path control scheme
US5159679A (en) * 1988-09-09 1992-10-27 Compaq Computer Corporation Computer system with high speed data transfer capabilities
US5109332A (en) * 1988-09-09 1992-04-28 Compaq Computer Corporation System for controlling the transferring of different widths of data using two different sets of address control and state information signals
CA1326715C (en) * 1989-07-10 1994-02-01 Paul R. Culley Computer system with simplified master requirements

Also Published As

Publication number Publication date
DE3614612A1 (de) 1986-10-30
HUT41147A (en) 1987-03-30
DD271438A7 (de) 1989-09-06

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