BE735607A - - Google Patents
Info
- Publication number
- BE735607A BE735607A BE735607DA BE735607A BE 735607 A BE735607 A BE 735607A BE 735607D A BE735607D A BE 735607DA BE 735607 A BE735607 A BE 735607A
- Authority
- BE
- Belgium
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017545—Coupling arrangements; Impedance matching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/06—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element
- G11C11/06007—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using single-aperture storage elements, e.g. ring core; using multi-aperture plates in which each individual aperture forms a storage element using a single aperture or single magnetic closed circuit
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Insulated Conductors (AREA)
- Sewage (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19681774500 DE1774500B1 (de) | 1968-07-03 | 1968-07-03 | Speicheranordnung |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BE735607A true BE735607A (https=) | 1970-01-05 |
Family
ID=5702164
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BE735607D BE735607A (https=) | 1968-07-03 | 1969-07-03 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3648262A (https=) |
| BE (1) | BE735607A (https=) |
| DE (1) | DE1774500B1 (https=) |
| FR (1) | FR2014492A1 (https=) |
| GB (1) | GB1264530A (https=) |
| LU (1) | LU59001A1 (https=) |
| NL (1) | NL6909593A (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19914781A1 (de) * | 1999-03-31 | 2000-10-12 | Siemens Ag | Elektronisches Gerät, insbesondere Feldgerät |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1264853A (fr) * | 1959-08-17 | 1961-06-23 | Sperry Rand Corp | Mémoire à noyaux magnétiques |
| US3110888A (en) * | 1959-09-01 | 1963-11-12 | Texas Instruments Inc | Magnetic switching core matrices |
| NL6504349A (https=) * | 1965-04-06 | 1966-10-07 | ||
| DE1254693B (de) * | 1965-09-17 | 1967-11-23 | Telefunken Patent | In Speicherbereiche unterteilter Magnetkernmatrixspeicher |
| US3439352A (en) * | 1966-03-30 | 1969-04-15 | Bell Telephone Labor Inc | Magnetic wall domain shift register |
| US3579209A (en) * | 1968-09-06 | 1971-05-18 | Electronic Memories Inc | High speed core memory system |
-
1968
- 1968-07-03 DE DE19681774500 patent/DE1774500B1/de not_active Ceased
-
1969
- 1969-06-23 NL NL6909593A patent/NL6909593A/xx unknown
- 1969-06-25 US US836496A patent/US3648262A/en not_active Expired - Lifetime
- 1969-06-27 FR FR6921692A patent/FR2014492A1/fr not_active Withdrawn
- 1969-07-01 LU LU59001D patent/LU59001A1/xx unknown
- 1969-07-02 GB GB1264530D patent/GB1264530A/en not_active Expired
- 1969-07-03 BE BE735607D patent/BE735607A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| DE1774500B1 (de) | 1972-01-20 |
| LU59001A1 (https=) | 1969-11-14 |
| GB1264530A (https=) | 1972-02-23 |
| NL6909593A (https=) | 1970-01-06 |
| US3648262A (en) | 1972-03-07 |
| FR2014492A1 (https=) | 1970-04-17 |