BE673625A - - Google Patents
Info
- Publication number
- BE673625A BE673625A BE673625DA BE673625A BE 673625 A BE673625 A BE 673625A BE 673625D A BE673625D A BE 673625DA BE 673625 A BE673625 A BE 673625A
- Authority
- BE
- Belgium
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30018—Bit or string instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Executing Machine-Instructions (AREA)
- Complex Calculations (AREA)
- Devices For Executing Special Programs (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US417973A US3634882A (en) | 1964-12-14 | 1964-12-14 | Machine-processing of symbolic data constituents |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BE673625A true BE673625A (OSRAM) | 1966-04-01 |
Family
ID=23656119
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BE673625D BE673625A (OSRAM) | 1964-12-14 | 1965-12-13 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3634882A (OSRAM) |
| JP (1) | JPS523252B1 (OSRAM) |
| BE (1) | BE673625A (OSRAM) |
| CH (1) | CH465280A (OSRAM) |
| DE (1) | DE1499289A1 (OSRAM) |
| FR (1) | FR1456417A (OSRAM) |
| GB (1) | GB1128223A (OSRAM) |
| NL (1) | NL6516192A (OSRAM) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3800292A (en) * | 1972-10-05 | 1974-03-26 | Honeywell Inf Systems | Variable masking for segmented memory |
| US4087852A (en) * | 1974-01-02 | 1978-05-02 | Xerox Corporation | Microprocessor for an automatic word-processing system |
| US3911405A (en) * | 1974-03-20 | 1975-10-07 | Sperry Rand Corp | General purpose edit unit |
| JPS512302A (en) * | 1974-06-24 | 1976-01-09 | Fujitsu Ltd | Johotensohoshiki |
| US3969704A (en) * | 1974-07-19 | 1976-07-13 | Nanodata Corporation | Word transformation apparatus for digital information processing |
| JPS5421931U (OSRAM) * | 1977-07-15 | 1979-02-13 | ||
| JPS60107203U (ja) * | 1983-12-27 | 1985-07-22 | ワイケイケイ株式会社 | 縦枠材と横枠材の連結装置 |
| US6552730B1 (en) | 1984-10-05 | 2003-04-22 | Hitachi, Ltd. | Method and apparatus for bit operational process |
| US5034900A (en) * | 1984-10-05 | 1991-07-23 | Hitachi, Ltd. | Method and apparatus for bit operational process |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3111648A (en) * | 1960-03-31 | 1963-11-19 | Ibm | Conversion apparatus |
-
1964
- 1964-12-14 US US417973A patent/US3634882A/en not_active Expired - Lifetime
-
1965
- 1965-11-25 GB GB50131/65A patent/GB1128223A/en not_active Expired
- 1965-12-08 FR FR41370A patent/FR1456417A/fr not_active Expired
- 1965-12-10 CH CH1705665A patent/CH465280A/de unknown
- 1965-12-11 DE DE19651499289 patent/DE1499289A1/de active Pending
- 1965-12-13 NL NL6516192A patent/NL6516192A/xx unknown
- 1965-12-13 BE BE673625D patent/BE673625A/xx not_active IP Right Cessation
- 1965-12-14 JP JP40076548A patent/JPS523252B1/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| FR1456417A (fr) | 1966-10-21 |
| CH465280A (de) | 1968-11-15 |
| NL6516192A (OSRAM) | 1966-06-15 |
| GB1128223A (en) | 1968-09-25 |
| JPS523252B1 (OSRAM) | 1977-01-27 |
| DE1499289A1 (de) | 1972-04-13 |
| US3634882A (en) | 1972-01-11 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RE | Patent lapsed |
Owner name: WESTERN ELECTRIC CY INC. Effective date: 19841213 |