ATM cell switching device having a non blocking structure. The invention falls within the field of digital data transmission. More precisely, the invention relates to ATM cell switching (Asynchronous Transmission Mode) between several incoming channels and several outgoing channels, notably in the case of ATM services with variable rate. The general principle of ATM transmission is well known, and numerous techniques have already been proposed to implement switching nodes between inputs and outputs. One of the criteria for assessing the efficiency of these techniques is the cell loss rate or, in other words, the risk of blockage within the switching node. According to the known techniques, and in particular with regard to services at variable rate, this risk is relatively high. Indeed, it can happen that cells accepted at an input of the switching node cannot be transferred to the required output, due to the congestion of one of the internal links of the switching node. Currently, the most often used techniques are those based on the Clos structure, described notably in "A Study of Non Blocking Switching Networks, by C.Clos (The Bell System Technical Journal, PP 406-424, March 1953). Figure 1 illustrates a Clos network. It includes three stages; - an incoming stage (11), containing a plurality of matrixes (111) with R inputs (112) and K outputs (113), - a central or intermediate stage (12) containing K matrixes (121), each connected to one of the outputs (113) of each of the input matrixes (111); - an output stage (13), containing as many matrixes (131) as the input stage (11), each of the matrixes (131) containing each K inputs (132) connected respectively to K matrixes (121) of the central stage (12), and R outputs (133). The use of several stages allows to minimize the number of connection points and the size of the matrixes. This technique proves to be efficient when the switched calls have a fixed rate. It can then be checked that, in order for the network to be non blocking, it is sufficient that K be greater than or equal to 2R-1. It is reminded that blocking does not occur when any available input (i.e. capable of accepting a new call) can be connected to any available output. The main problem of the ATM technique is that it is destined to transmit variable rate calls, which may at times require a very low or even a nil rate, and at other times a high rate, up to a given peak rate. Hence, when implementing a Clos structure, it must be considered that every call has a fixed rate equal to its peak rate. It is easy to understand that this method is particularly inefficient, especially when calls occur in bursts, and have long periods of low rate. A high passband is then needlessly reserved permanently. Indeed, if we consider for example the case of two calls with low activity ratio but with a high passband when they are active, it can be seen that they could use the same path, if there was a low probability that the activity periods would be the same. On the other hand, if we consider the peak rate, cohabitation on the same path is impossible. We could, for a given switching structure, test, at every instant, the validity of the chosen itinerary, with regard to the specific multiplexing law implemented. However, considering the infinity of possible traffic combinations over the input and output links, it is not possible to assess beforehand the blockage of such a network. A particular objective of the invention is to remedy these various drawbacks of the state of the art. More precisely, the first objective of the invention is to provide an ATM cell switching device that is non blocking. In other words, the invention has for objective to provide such a device capable of ensuring switching between any available input and any available output. The invention applies to call switching, in particular to variable rate calls, multiplexed at the input and/or output. For this type of system, a traffic acceptance law is defined, guaranteeing a saturation probability lower than a given threshold (typically 10 -"). A call can then be accepted over a link if the total traffic shows an acceptable saturation probability. According to this method, the objective of the invention is to provide a switching device that guarantees over the intermediate links a saturation probability lower than or equal to the one accepted (according to the same law) over the input and output links.
In other words, one of the objectives of the invention is to provide such a device which is statistically non blocking. These objectives, as well as others that will come to light thereafter, are achieved according to the invention with the help of an ATM cell switching device, establishing a single path by means of a virtual circuit, having N.R inputs and N.R outputs, N and R being two integers at least equal to two, this device comprising at least two stages, including an input stage having R.N sets of Q outputs, and an output stage having R.N sets of Q' inputs, characterised in that, in order that the data flow carried by any intermediate link belonging to the single path established between an input and an output be a subset of the data flow incoming via this input and also be a subset of the data flow outgoing via this output, each input stage input can be connected to an input stage output, selectable only among Q outputs associated exclusively with this input; and characterised in that, each output stage output can be connected to an output stage input, selectable only among Q' output stage inputs, associated exclusively with this output. Thus, the device according to the invention implements a tree structure, with perfect networking at link level. Advantageously, the same multiplexing rule is applied to the incoming and outgoing links of all the said stages. It can easily be checked that each intermediate link can then only transport a subset (or, in an extreme situation, the same set) of the traffic accepted over each input link and each output link. Therefore, we can be sure that the saturation probability is lower than or equal to that of the input and output links. In other words, the switching network is transparent, with regard to blocking probability. From the moment a traffic (or a service) can be accepted at an input and an output, one can be sure that it can be transmitted from one to the other. Furthermore, it should be noted that the invention is independent of the multiplexing law adopted on the inputs and outputs. Several architectures can be considered to implement such a device. In particular, it may only include one input stage and one output stage, each containing N switching matrixes, and be characterised in that: Q being equal to N, each input stage matrix includes R inputs and R.N outputs arranged into R sets of N outputs, each set corresponding respectively to one of the R inputs; it is also characterised in that, each input of this matrix can be connected to an output, of this matrix, selectable only among the N outputs of the set of outputs corresponding to this input; Q' being equal to N, each output stage matrix includes R outputs and N.R inputs; it is also characterised in that, each output of this matrix can be connected to an input, of this matrix, selectable only among R.N inputs of this matrix; each of the N outputs of each set of outputs of the first stage is connected respectively to an input of one of N matrixes of the output stage. However, this structure involves large matrixes for the second stage. Another method of implementation includes an input stage, a central stage, and an output stage; and is characterised in that: - Q being equal to R, the input stage includes N matrixes, each comprising R inputs and Ra outputs, these outputs being arranged into R sets of R outputs each corresponding to one of the said R inputs, and is further characterised in that, each input of this matrix can be connected to an output, of this matrix, selectable only among the R outputs of the set of outputs corresponding to this input; - the central stage includes R sets of R matrixes having each N inputs and N outputs, the R outputs of each set of outputs of the input stage being connected to inputs belonging to the same set of R matrixes of the central stage, - Q' being equal to R, the said output stage includes N matrixes, each of these matrixes having R 2 inputs and R outputs, these R 2 inputs being arranged into R sets of R inputs, each set corresponding respectively to one of these R outputs; and is further characterised in that, each output of this matrix can be connected to an input, of this matrix, selectable only among R inputs of the input set corresponding to this output; and is further characterised in that, R inputs of each set are respectively connected to R outputs belonging respectively to the P sets of matrixes of the central stage. It is thus possible to use conventional type matrixes of much smaller size,.
According to another method of implementation, the device according to the invention may include an input stage, a central stage, and an output stage; and is characterised in that: - Q and Q' are equal to R; - the central stage comprises R2 matrixes, - both the input stage and the output stage comprise R.N switching matrixes, - input stage matrixes and central stage matrixes are arranged into R sets each comprising N input stage matrixes and R central stage matrixes, and output stage matrixes are arranged into N sets of R matrixes; - each of the R.N input stage matrixes comprises one only input and R outputs; - each of the R 2 central stage matrixes comprises N inputs and N outputs, these N inputs being respectively connected to an output of each of the input stage matrixes, that belongs to the same set of matrixes; - each of the R.N output stage matrixes comprises P inputs and only one output, these R inputs being connected to outputs belonging respectively to the R sets of matrixes of the central stage and of the input stage. A new type of matrix specifically adapted to the invention is then used. Preferably, N and R are chosen such as N=2.R 2 when the device comprises three stages. This structure is indeed the most efficient, in particular for ensuring homogeneity between narrow band and wideband networks, because it allows for the use of the same matrixes. Other features and advantages of the invention will come to light further to the reading of the following description of the preferred methods of implementation of the invention, given as simple illustrative examples and not to be considered as restrictive, and of the appended drawings, where: - figure 1, already discussed in the preamble, represents the known principle of a Clos network; - figure 2 represents a schematic circuit diagram of a switching network according to the invention, comprising two stages; - figure 3 illustrates another method of implementation of a switching network with three stages; - figures 4A and 4B illustrate an advantageous structure, based on figure 3 network, and which allows for both wideband transfer (fig. 48) and narrow band transfer (fig. 4A). - figure 5 represents also a switching network with three stages according to the invention, comprising 1 x R matrixes. The invention therefore relates to a non blocking ATM cell switching device, or network, with statistical multiplexing, notably for ATM services with variable rate. Figure 2 illustrates the general principle of the invention in the case of a two-stage network, one incoming stage (21) and one outgoing stage (22). The incoming stage (21) includes N input matrixes (2111 to 2 11N) each receiving P incoming links (or inputs) (2121 to 212R) and each having available to them R.N intermediate links ( 2 131,1 to 2 13RN). The outgoing stage (22) includes N output matrixes (2211 to 2 2 1N) each also receiving R.N intermediate links (222,1 to 2 2 2 N,R) and delivering R outputs (2231 to 223 R), Each of the links (212i, 2 13j and 2 2 3 ) abides by the same traffic acceptance law (for example, a saturation probability smaller than 10 x). Input matrixes (21i) are arranged so that the data flow incoming at each input (212i) can be directed toward any of the outgoing stage matrixes (22,). In other words, we use a tree structure allowing to define N possible connections, and not more (N being here the number of matrixes of the output stage, for this example of implementation), for each input. Similarly, each output stage matrix (221i) can receive data from each input ( 2 12j) of the input stage. The data flow transported by each of the intermediate links ( 2 2 2 ) arriving in a matrix (221i) can be transmitted to any of its outputs (223,). We check that there is no risk of blocking over the intermediate links ( 2 2 2 k). Indeed, it always carries: - a subset (or, possibly the complete set) of the traffic that is accepted over the input link where it comes from; and - a subset (or possibly the complete set) of the traffic that is accepted over the output link where it ends up. However, by definition, the traffic accepted on these input and output links abide by a preset multiplexing law. Nevertheless, it should be noted that figure 2 structure requires big matrixes for the second stage, due to the large number of possible connections. It is possible to implement the invention with matrixes of much smaller size by building a switching network with three stages, such as the one illustrated in figure 3. The incoming stage (31) includes N matrixes (3111 to 3 11N) each associating P inputs (312i to 3 12p) with R 2 outputs (313,1 to 313RP). Symmetrically, the outgoing stage (33) also presents N matrixes (331 1 to 331 N) each receiving P 2 inputs (332 1 to 3 3 2 R,) and each delivering R outputs (331 1 to 3 3 3 R). As for the intermediate or central stage (32), it includes R groups of R matrixes (NxN 321 1, to 321 ap). Links between the different stages are arranged so that the data flow received by each input of an input stage matrix (311j) can be transmitted to any of the R corresponding matrixes (321 i,1 to 321 j,p) . Similarly, each output matrix ( 3 11j) can receive data from each central stage matrix ( 3 2 1) . More precisely, each output link (331;) can receive data from any of the R matrixes (321 ij to 321 a,). As in the case of figure 2 and for the same reasons, we check that this figure 3 network is non blocking. For example, this network may be implemented with the help of conventional 16 x 16 matrixes. For a network with 16 x 3 = 58 ATM links at 622 Mb/s, equivalent to a known type of network with 58 links (or 16 x 4 limited to 80%), we use: - 16 input/output matrixes used in 3 x 9; - and 9 central matrixes used in 16 x 16, i.e. twenty-five 16 x 16 matrixes, instead of 24 in the known type of network. Therefore, the device according to the invention requires an additional matrix. But in counterpart, it allows the multiplexing of all service types (including at 600 Mb/s). For example, for services at 10 or 20 Mb/s of peak, multiplexing allows to connect up to five times more traffic. Thus, the device according to the invention makes it possible to envisage a rate of 3000 Mb/s, whereas a network operating on the basis of peak rate alone, without taking into account the sporadicity, can evidently only switch 600 Mb/s per link. Besides, in practice, this link is also subjected to a restriction to a maximum rate of 150 Mb/s (otherwise, the expansion should be even greater). Advantageously, the values N and R are chosen so that N = 2R, when the device comprises three stages. This makes it possible to simply ensure homogeneity between the narrow band and wideband networks. This is illustrated by figures 4A and 4B. In this example, N is worth 32, and R is worth 4. Matrixes (41) of the input stage and (42) of the output stage are 16 x 16 matrixes. Matrixes (43) of the central stage are 32 x 32 matrixes. A switching device for narrow band network is shown in figure 4A. Each of the 16 inputs of a matrix of the first stage (41) can be connected to any of the sixteen outputs of this matrix. Each of the 16 outputs of a matrix of the last stage (42) can be connected to any of the sixteen inputs of this matrix. A device for wideband network, shown in a general manner in figure 3, is illustrated for N=32 and R=4 in figure 4B. Only four inputs (out of sixteen) of each matrix of the first stage (41) are used. Each can be connected to one of the four outputs, of this matrix, which are exclusively associated with this input. Only four outputs (out of sixteen) of each matrix of the last stage (42) are used. Each can be connected to one of the four inputs, of this matrix, which are exclusively associated with this output. We can easily change from a wideband network to a narrow band network, as shown in figure 4A since it is sufficient to use 16 inputs per matrix (41), and 16 outputs per matrix (42), for the narrow band network; or only 4 inputs per matrix (41), and 4 outputs per matrix (42), for the wideband network. The overall switching device remains unaltered. In practice, the change will occur rather from the narrow band network (figure 4A) to the wideband network (figure 48). To this end, it is sufficient to utilise a sub-equipment (only 4 inputs or 4 outputs), and a routing restricted in input and output matrixes.
Figure 5 illustrates another method of implementation of the invention technique. Instead of using matrixes of known type (NxN) in an incomplete way, we use especially designed matrixes, of the type 1 x R (associating an input with R outputs or, symmetrically, R inputs with an output). According to this technique, we can distinguish R input blocks (41 1 to 41,) and N output blocks (42 1 to 4 2 N). Each input block (41j) is broken down into; - N input matrixes (4111 to 4 1 1 N), each containing a unique input (4121 to 4 12 N) and P outputs (4131,1 to 4 1 3 N,R). With this method of implementation, each input is associated with P links corresponding respectively to R matrixes of the next stage; - R central matrixes (4141 to 4 14p), each presenting N inputs and N outputs. Each input corresponds to a distinct input matrix. Each of the N output blocks (42j) includes R matrixes (4211 4 2 1 p), each presenting a unique output (4221 42 2 R), and receiving R links (423;.1 to 423iR) respectively coming from the P input blocks (411 41R). Again, according to this structure, we verify that each link (413i) carries only a subset of the traffic of the input with which it is associated, and that each link (423j) carries only a subset of the traffic of the output with which it is associated. This structure highlights the way in which the invention operates, i.e. incoming traffic demultiplexing, then outgoing traffic remultiplexing, such that we avoid some traffic mixing. Furthermore, it should be noted that the matrixes used have an optimal size. It also appears clearly in this figure 5, that the structure of the device according to the invention very easily allows for broadcasting, which is important, in particular, for wideband services. Of course, the use of 1 x R matrixes, described in a system with three stages, can easily be transposed to the device with two stages shown in figure 2.