AU733423B2 - Solid state switching device circuit - Google Patents

Description

WO 99/03027 PCT/AU98/00518 -1- SOLID STATE SWITCHING DEVICE CIRCUIT FIELD OF THE INVENTION This invention relates to an electrical circuit that incorporates a gate controlled solid state switching device and, in particular, to a circuit that provides for controlled load current flow during non-conducting intervals of the switching device. The invention has been developed in relation to circuits in which the switching device comprises as triac, and the invention is hereinafter described in the context of triac circuits that are employed for controlling lamp illumination levels.

However, it will be understood that the invention does have broader application, for example in circuits that employ SCR's and other solid state switching devices to meet various controlled voltage and/or current supply requirements.

BACKGROUND OF THE INVENTION Current conduction through a triac cannot be established until the current rises to a level that is at least equal to the latching current level of the device.

Similarly, conduction cannot be sustained if the current falls below the holding current level of the device. These limitations determine that current flow through a triac cannot be sustained for the entire duration of each halfcycle of an alternating current supply and, in an extreme situation, when would-be load current does not rise to the latching current level, the triac will not be gated into conduction. This limits the application of triac circuits and, as one example of the consequences of the limitation, a 500 VA lamp illumination level control circuit may not be used for controlling operation of a lamp at a 25 VA level.

This problem exists particularly in illumination level control circuits for compact fluorescent lamps that typically are rated at 9 watts or 15 watts.

A further limitation in a triac circuit is that low power triacs typically are not capable of carrying large WO 99/03027 PCT/AU98/00518 2 surge or transient currents, even for short durations, and to locate a current limiting element in series with a triac, for the purpose of minimising damage, would normally reduce the operating efficiency of the circuit to an unacceptable level. One example of a consequence of this limitation is that the power factor correction capacitor for a fluorescent lamp must be placed on the supply side of an illumination level control circuit rather than, as would normally be preferred, at the lamp side of the control circuit.

The present invention seeks to avoid the above difficulties and to provide generally for controlled current flow in a circuit that incorporates a triac or other similar solid state switching device.

SUMMARY OF THE INVENTION The invention may be defined broadly as providing an electrical circuit comprising a primary solid state switching device which is arranged to be connected in circuit with a load across a supply voltage, means for generating and periodically applying a gating signal to a gate of the primary switching device, and at least one secondary solid state switching device located in parallel with the primary switching device. The or each secondary switching device comprises a device that is arranged to be biased into conduction and means are provided for generating and periodically applying a biasing signal to the or each secondary switching device in intervals during which the primary switching device is non-conducting.

The primary switching device preferably comprises a triac and the or each secondary switching preferably comprises a transistor.

Because the primary and secondary switching devices are located in parallel, they provide alternative paths for load current, and the path which is conductive during any given time interval will be dependent upon whether the primary switching device is gated into conduction or the WO 99/03027 PCT/AU98/00518 3 secondary switching device is biased into conduction.

Also, because the secondary switching device is one which can be biased into conduction, in the manner of a transistor, the device will not be subject to the constraints of a gated device such as an SCR or a triac.

Thus, the secondary switching device may be employed to conduct current at a level that instantaneously is below the latching current or holding current level of the primary switching device.

The secondary switching device may be located in series with a current limiting element and so form a path which, when conductive, may be used to limit the magnitude of load current that would otherwise flow through the primary switching device.

The invention will be more fully understood from the following description of various (alternatively preferred) embodiments that incorporate aspects of the present invention. The description is provided with reference to the accompanying largely schematic drawings.

BRIEF DESCRIPTION OF THE DRAWINGS In the drawings Figure 1 shows a circuit which is suitable for controlling current flow through a load, Figure 2 shows a modified form of the circuit as shown in Figure i, and one which is arranged for controlling the flow of energising current through a load in the form of an incandescent lamp, Figure 3 shows an application of the circuit of Figure 2 to a fluorescent lamp circuit, and Figure 4 shows a variation of the circuit of Figure 1 for controlling current flow to a generalised load.

DETAILED DESCRIPTION OF THE INVENTION The circuit as illustrated in Figure 1 incorporates a primary solid state switching device in the form of a triac 10 which is connected in series with a load 11 across an alternating current supply 12. A control circuit 13 is WO 99/03027 PCT/AU98/00518 4provided for applying gating signals to the triac, either for gating the triac into conduction during a fixed interval of time during each half-cycle of the supply or, by exercising phase angle control, during a selectively variable interval of time during each half-cycle of the supply.

An alternative path for load current flow is provided by way of a secondary solid state switching device in the form of a transistor 14. The transistor is located in a rectifier bridge circuit 15 and is arranged to provide a current path in parallel to the triac current path when the transistor 14 is biased into conduction by way of a control circuit 16..

The control circuit 16 is arranged to provide base bias for the transistor 14 at times during which the triac is not gated into conduction, so that the collector-emitter circuit of the transistor 14 provides an alternative path for current flow when the transistor is biased into conduction and the triac is not gated into conduction.

Thus, for example, the two control circuits 13 and 16 may be arranged to provide for current flow through the load 11 for the whole of each half-cycle of the supply, even though the load current may from time-to-time have an instantaneous value which is lower than the latching and/or holding current levels of the triac The circuit as shown in Figure 2 of the drawings illustrates a particular application of the invention to light level (ie, so-called dimmer) control of an incandescent lamp 23. In this case the triac 10 is connected in series with the lamp 23 and both are connected across the alternating current supply 12.

The control circuit 13 is provided for applying gating signals to the triac 10, as in the case of the circuit shown in Figure i, but in Figure 2 the control circuit 13 comprises a gating circuit which is adjustable as to the phase angle at which the gating signal is generated during WO 99/03027 PCT/AU98/00518 each half-cycle of the supply voltage. The gating circuit may be configured in any of the ways that are well known in the context of dimmer control circuits and it incorporates a potentiometer for selectively varying the phase angle at which the gating signal is generated during each half-cycle of the supply.

In the circuit of Figure 2, two transistors 17 and 18 are provided as an alternative to the single-transistor arrangement shown in Figure i. Also, separate base biasing circuits 19 and 20 are provided for the respective transistors 17 and 18. Diodes 21 and 22 provide load current paths during alternating periods of conduction of the two transistors 17 and 18, and current limiting resistors 24 and 25 are located in the collector circuits of thetwo transistors.

As in the circuit of Figure i, in the circuit of Figure 2 the gating circuit 13 and the base biasing circuits 19 and 20 are electrically connected in a manner such that base bias is applied to one or the other of the transistors 17 and- 18 (in-successive half-cycles of the supply) during the intervals during which the triac 10 is not gated into conduction.

The circuit as shown in Figure 3 of the drawings comprises a further adaptation of that shown in Figures 1 and 2, in that it illustrates a fluorescent lamp circuit which provides for illumination level control. The lamp circuit incorporates a lamp 26, a wire-wound, iron-cored ballast 27 in series with the lamp, and a power factor correction capacitor 28 connected across the lamp/ballast circuit. Some circuit elements that would normally be incorporated in such a circuit, for example, a filament transformer (or a so-called filament driver) and a glow discharge starter switch, have been omitted from Figure 3 as being not directly relevant to the present invention.

The power factor correction capacitor 28 would normally have a capacitive value in the order of one micro- WO 99/03027 PCT/AU98/00518 -6- Farad to ten micro-Farads, and the charging current would typically be in the order of 300 amps during the initial period (say 100 microseconds) of each half-cycle of the supply. In order to protect the triac against this surge current, the power factor correcting- capacitor 28 would normally be located at the supply side of the illumination level (dimmer) control circuit, with attendant disadvantages. However, the present invention permits the location of the capacitor at the lamp side of the illumination level control circuit, as illustrated in Figure 3.

As in the previously described circuits, the transistor 14 is located in parallel with the triac 10 and the transistor base bias control circuit 16 is arranged to provide for the transistor to be biased into conduction during the initial period of each half-cycle of the supply.

A resistor 29 is located in circuit with the transistor 14 and its value is selected to limit the rate at which the capacitor 28 is charged and discharged during each halfcycle.

The gate control circuit 13 for the triac 10 is arranged to apply a gating signal to the triac slightly before the base bias is removed from the transistor 14.

That is, the triac is gated into conduction only after the circuit current falls to a level that can be accommodated by the triac.

Figure 4 shows a circuit and component values that might typically be employed in implementing the present invention in controlling current flow through a load 11.

The load 11 might comprise the fluorescent lamp circuit as shown in Figure 3, in which case the circuit of Figure 4 will be employed for selectively controlling the illumination level of the lamp.

In the circuit of Figure 4 components of a typical gating circuit 13 are shown, and the current limiting resistor 25 is identified as a 100Q resistor. The WO 99/03027 PCT/AU98/00518 7 transistors 14 are connected in cascade in order to provide for a collector-emitter current flow at an appropriate level, typically in the order of 1 amp As indicated previously in this specification, the circuits which are shown in Figures 1 to 4 are illustrated in a largely schematic way and it will be understood that further circuit connections will need be provided, for example to provide supply voltages to the control circuits 13, 16, 19 and 20. It will be further understood that circuitry will need be provided for synchronising operation of the triac gating circuit and the transistor base biasing circuit(s) in the manneras above described.

Claims (9)

1. 2. The electric circuit as claimed in claim 1 wherein the primary switching device comprises a triac.
2. 3. The electric circuit as claimed in claim 1 or claim 2 wherein the or each secondary switching device.comprises a transistor.
3. 4. The electric circuit as claimed in any one of claims 1 to 3 wherein the or each secondary switching device is connected in a rectifier circuit. The electric circuit as claimed in any one of claims 1 to 4 wherein the or each secondary switching device is connected across a bridge rectifier which is connected in parallel with the primary switching device.
4. 6. The electric circuit as claimed in any one of claims 1 to 5 wherein the means for generating the gating signal is arranged to apply the gating signal to the primary switching device in a manner to gate the primary switching device into conduction during a fixed interval of time during each half-cycle of the supply voltage.
5. 7. The electric circuit as claimed in any one of claims 1 to 5 wherein the primary switching device is arranged to be connected in series with a load in the form of an electric lamp, and wherein the gating circuit incorporates means for adjusting the phase angle at which the gating signal is WO 99/03027 PCT/AU98/00518 9 generated during each half-cycle of the supply voltage whereby the primary switching device may be gated into conduction during a selectively variable interval of time during each half-cycle of the supply voltage.
6. 8. The electric circuit as claimed in any one of claims 1 to 6-wherein the primary switching device is arranged to be connected in series with a load in the form of a fluorescent lamp circuit having a fluorescent lamp, a ballast connected in series with the lamp and a power factor correction capacitor connected across the lamp- ballast circuit.
7. 9. The electric circuit as claimed in any one of claims 1 to 8 wherein the means for generating the biasing signal is arranged to generate the biasing signal during a first interval of each half-cycle of the supply voltage and wherein the means for generating the gating signal is arranged to generate the gating signal during a second interval of each half-cycle of the supply voltage. The electric circuit as claimed in. claim. 9 wherein the means for generating the biasing signal is controlled to maintain the biasing signal for a first interval of time that overlaps with the second interval of time of each half-cycle of the supply voltage.
8. 11. The electric circuit as claimed in any one of the preceding claims wherein a current limiting device is located in series with the or each secondary switching device.
9. 12. An electrical circuit substantially as shown in any one of Figures 1 to 4 and substantially as hereinbefore described with referenced thereto.