AU7145300A - Residual current devices - Google Patents

Description

Regulation 3.2

AUSTRALIA

PATENTS ACT, 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT

ORIGINAL

Name of Applicant: Actual Inventor: Address for service in Australia: Invention Title: PDL HOLDINGS LIMITED DEVILEE, Petrus Johannes; COIA, Richard Anthony; TEO, Kenneth Boh Khin A J PARK, Level 11, 60 Marcus Clarke Street, Canberra ACT 2601 RESIDUAL CURRENT DEVICES The following statement is a full description of this invention, including the best method of performing it known to me/us

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Field of the Invention The present invention relates to detecting faults in electrical circuits. In particular, although not exclusively, the invention relates to a distribution-board mountable device for detecting current leakage in domestic dwellings.

Background to the invention Residual current devices used in domestic dwelling employ electromechanical relays and latches for opening the main contacts in the event of a fault. Hence these device should be regularly tested to ensure that both the mechanism and the electronics are functioning properly. When these devices are mounted on the distribution board, it has been found that homeowners do not carry out regular tests because the devices are out of sight.

Furthermore, there is often a reluctance on the part of the homeowner to carry out the test because the supply to the circuit will be interrupted in doing so. This will be especially inconvenient where devices need to be reset when the power supply is interrupted eg clock radios, VCR's, cooking appliances.

It is therefore an object of the present invention to provide a device which overcomes or ameliorates the foregoing disadvantages or at least provides the public with a useful choice to known devices.

Summary of the Invention According to a first aspect of the present invention, there is provided a current leakage/earth fault detector and interrupter device for a circuit including: a sensor to detect current leakage, the sensor operable to generate a fault signal in the event of fault; a circuit interrupter responsive to the fault signal to interrupt the circuit; and a tester operable to implement a test sequence to verify the operation of the sensor and the circuit interrupter wherein the tester is operable to periodically carry out a test automatically.

Preferably the tester operates to simulate a real fault which generates a fault signal and hence interrupts the current to the circuit. In this embodiment, it is preferred that invention incorporates means to establish an auxiliary circuit by-passing the interruption in the main circuit. Preferably, interruption of the main circuit is timed to coincide with current zero crossing.

-3- In accordance with a second aspect of the present invention, there is provided a current leakage/earth fault detector and interrupter device for a circuit including: a sensor to detect current leakage, the sensor operable to generate a fault signal in the event of fault; a circuit interrupter responsive to the fault signal to create an interruption in the circuit; and a tester operable to implement a test sequence to verify the operation of the sensor and the circuit interrupter wherein the device further includes means to establish an auxiliary circuit to by-pass the interruption.

Preferably, the tester is operable to carry out test automatically, with the auxiliary circuit being created automatically. This preferably occurs on a periodic basis, say weekly.

Preferably, interruption of the main circuit is timed to coincide with current zero crossing.

In accordance with yet another aspect of the present invention, there is provided a current leakage/earth fault detector and interrupter device for a circuit including: a sensor to detect current leakage, the sensor operable to generate a fault signal in the event of fault; a circuit interrupter responsive to the fault signal to create an interruption in the circuit; a tester operable to implement a test sequence to verify the operation of the sensor and the circuit interrupter; a current zero crossing detector to detect the recurring incidence of current zero crossing wherein the circuit interrupter is operable to approximately coincide the interruption in the circuit with the current zero crossing.

Where the circuit interrupter involves a mechanical contrivance, suitable account in taken of the mechanical delay in operating the contrivance.

This invention may also be said broadly to consist in the parts, elements and features referred to or indicated in the specification of the application, individually or collectively, and any or all combinations of any two or more of said parts, elements or features, and where specific integers are mentioned herein which have known equivalents in the art to which this invention relates, such known equivalents are deemed to be incorporated herein as if individually set forth.

The invention consists in the foregoing and also envisages constructions of which the following gives examples.

Brief Summary of the Drawings One preferred form of the present invention will now be described with reference to the accompanying drawings in which: Figure 1 is a schematic circuit diagram for the RCD self-testing device according to a preferred embodiment of the present invention; Figure 2 illustrates in more detail the sensors employed in the circuit of Figure 1; Figure 3 illustrates in detail the portion of the circuit of Figure 1, including the microprocessors carrying out the circuit protection function and the self testing function; Figure 4 is a diagram of the timing sequence of the device in the event of a fault during normal operation; Figure 5 is a diagram of the timing sequence of the device during the self-testing regime; Figure 6 is a diagram of the timing sequence to open the main contacts during the selftesting regime; and Figure 7 is a diagram of the timing sequence of the device to open the main contacts in the event of failure of the device detected during the self testing regime.

Overview From the schematic diagram illustrated in Figure 1, it can be seen that the RCD device consists of a main contact set 12 and an auxiliary contact set 14. The main contact set 12, which carries the circuit current during normal operation, has a mechanical latching mechanism operated by main contact latching solenoid 16 (see Figure The latching mechanism can be latched open or closed. The auxiliary contact set 14, which is used only during a testing, is a normally open contact. The auxiliary contact set 14 may be driven closed by auxiliary contact latching solenoid 18.

During normal operation, the main contact set 12 is closed to carry the circuit current.

The auxiliary contact set 14 is open. Under normal operation, current flows through the sensor coil 20 in the RCD fault detection sensor 22 (see Figure When a residual current fault is detected by the sensor 22, the main contact set 12 opens by the operation of main contact latching solenoid 16 and breaks the current. As will be explained, the circuit current is broken at the zero-crossing point such that minimal arcing occurs. This preserves the life of the main contacts and allows larger fault currents to be broken. The maximum trip out time of the RCD is designed to be 40ms. Once the main circuit current is broken, the power to the device 10 is off and power to the circuit can only be restored through a manual reset (not shown).

An automatic self test is performed periodically (eg. weekly) to ensure the integrity of the RCD circuitry and the main contacts. During a self test, the auxiliary contacts 14 are closed to divert the circuit current. Hence, power will not be interrupted to any electrical devices in the circuit. A test current is then passed through the sensor coil 20 to emulate a residual current fault. The RCD circuitry detects this test current (as for a real fault) and opens the main contacts 12 through the operation of main contact latching solenoid 16.

However, in the event of a successful self testing operation, power to the circuit and the RCD circuitry will be maintained because the auxiliary contacts are closed. With a successful self test, the main contacts 12 will re-close automatically. With the main contacts 12 carrying the circuit current, the auxiliary contacts 14 can re-open.

The entire self test is performed in 300ms. During this time, power is not interrupted as the circuit current is diverted via the auxiliary contact momentarily. Moreover, the circuit is designed to detect extended residual current faults during the self test sequence to provide additional safety. As will be explained, if a fault occurs during a self test, the maximum trip out time is degraded to between 40ms and 170ms (depending on when the fault occurred during the test).

If the RCD device 10 fails an automatic self test, it will trip out to open the main circuit.

This is because the RCD should not remain in circuit if it can no longer offer any protection. If the contacts 12 are jammed shut and the RCD is unable to trip, it will emit a loud noise using the buzzer.

Detailed Description of the Preferred Embodiment As illustrated in Figure 1, the device 10 is connected between the phase and neutral of a 240v, 50 Hz power supply. The device 10 also includes auxiliary circuitry 21 to supply and 47 volts phase to power various parts of the circuit. Associated with the main contacts 12 and the auxiliary contact 14 are main and auxiliary contact sensors 36, 38 respectively. These sensors detect the positions of the main and auxiliary contacts 12,14 and are inputs to the multiplexer circuit 30 illustrated in Figure 3 and explained in further detail below.

The bottom of Figure 2 shows the Current Zero Crossing (CZC) circuitry. It consist of an amplifier circuit which has been biased so that whenever it receives a mains (50 Hz) current above zero amps the amplifier 26 will be driven full on to produce a square pulse output. Whenever the amp 26 receives a current below zero amps, the amp will be driven fully off to produce a zero output. Thus the transition between the amp being fully on and fully off occurs when the mains current crosses zero. This occurs twice a 50Hz cycle, ie -6every 1 Oms. This square pulse output is fed into the RCD configured chip 28 (Figure 3) on pin As already explained, it is desirable to open/close the main contacts when the current is zero to avoid arcing across the contact. In order to coincide latching of the main contacts 12 with current zero crossing, an estimate is made of the mechanical delay time for latching the main contacts such that a signal can be sent to the main contact latching solenoid 16 in advance of the next zero crossing by an amount equal to the mechanical delay. In this way, the latching of the main contacts will, as far as possible, coincide with current zero crossing. Therefore, the RCD chip will require a counter.

The timing for the RCD chip 28 is based on instruction cycle times which in turn are based on its own internal oscillator. In this embodiment, each instruction cycle takes lts.

Thus 64 cycles is 64 ,s which is defined as one count. 1 Oms equates to 156 counts. The RCD chip 28 uses these counts for timing. However it calibrates these counts with the CZC pulses it receives at GP5 to ensure that the accuracy is adequate. To calibrate, it detects how many of its internal counts occur during one full 50Hz cycle. If the number of counts is not within predetermined acceptable limits, then this number is disregarded.

If disregarded, the RCD chip 28 uses a default value or a previously measured value. If the number of counts is within acceptable limits then each count is considered to be accurate enough to be used as an internal timer. The number of internal counts is equated to the mechanical delay of the closing of the main contacts. Hence, by its own internal oscillator, self-calibrated to the power supply, the RCD chip 28 controls the signal from pin GP 1 to the main contacts latching solenoid 16 so as to coincide with current zero crossing, hence minimising the risk of arcing and consequent damage to the circuit. The STC chip also incorporates an internal counter operating in the same manner.

At this point, reference should also be made to the 3-way multiplexer circuit illustrated at the left hand bottom corner of Figure 3. The inputs to the multiplexer circuit include Neutral (sine wave), the auxiliary position sensor 38 and the main position sensor 36. The output is the collector of Q2. Under normal operation with the auxiliary contacts open R4 is at 0 volts (turning on Q2). Further, with the auxiliary contact sensor 38 sensing the open position of the auxiliary contacts, 47 volts is provided at R3 (turning on Q1). Under normal operation, the main contacts 12 are closed and hence no voltage is provided at R6.

The output is a 50Hz sync signal square wave. A different output will be provided under self test operation of the device and this will be explained subsequently under the heading "self test operation" below.

-7- Normal operation Referring to Figure 2, an earth leakage fault will be detected by the sensor in the form of a toroid 20. The resulting current is amplified by U1A and passed through the threshold detector comprising U1B and U1C. An RCD Fault detect pulse is then fed to the RCD chip 28 at pin GP3.

When the RCD chip 28 receives this pulse it realises there is a fault and attempts to open the main contacts 12. As already explained, the RCD chip 28 waits for the next zero crossing (this is determined from the CZC signal received at GP5) and then uses the estimated contact delay time to decide when to trip the contacts 12 so that they are opened at the next but one zero current crossing (as explained above, it uses the number of counts equated to mechanical delay to approximate when this occurs). This timing sequence is explained graphically in Figure 4. The signal to open the main contacts is sent from GP1 of RCD chip 28 to the main contacts latching solenoid 16. Thus power to the circuit being protected will be cut. By opening the main contacts when the auxiliary contacts are also open, the RCD device will also be turned off since it is powered from the same circuit.

The only way to restart the RCD is to physically reclose the main contacts 12 with a manual reset button (not shown).

If a zero crossing is not detected at pin GP5 after 10ms, then the RCD chip 28 foregoes the desirability of zero current crossing, and instead trips the main contacts 12 instantly.

This is a safety feature since if a zero crossing has not been detected in 10ms then it means that something is wrong with the supply which could be a result of a further fault.

The fault detect signal is also fed into GP5 of the self test chip (STC) 40. If the RCD chip 28 does not react within 40ms, then the STC 40 will attempt to open the main contacts 12.

The STC knows the main contacts have not opened because the input at GP3 senses no change as a results of no change from the main contact. The STC therefore serves as a safety back-up for the RCD chip 28.

Self Testing Procedure Prior to the self testing procedure, as previously explained, the output of the multiplexer will be a 50 Hz square wave sync signal. The STC 40 counts the number of mains -8cycles. This provides a counter for the STC to determine when the next test will be conducted. The STC chip also has an internal oscillator. The voltage zero crossing information provides calibration for the internal counter as with the RCD chip. There is also an input from multiplexer 30 to pin GPO on RCD chip. This keeps the two chips synchronised.

At a predetermined frequency, say weekly, a self test of the RCD device 10 is initiated by the STC 40. The sequence can be understood in connection with Figure 5. Prior to the self test, the input to pin GP3 of the STC 40 is a 50 Hz sync signal as illustrated. The STC sends a signal on GPO to the auxiliary solenoid 18 to drive the auxiliary contacts 14 closed. The signal on GPO remains high for a period of time as will be explained. With the auxiliary contacts closed, the auxiliary contact sensor 38 will sense this and thus no voltage will be provided at R3 of the multiplexer 30 turning off Ql 1. Additionally with the auxiliary solenoid operating to drive the auxiliary contacts closed, 5 volts will be provided at R4 thereby turning off Q2. With the main contacts still closed, 0 volts will be provided at the output of the multiplexer 30 and hence at pin GP3 of STC 40. No input at GP3 of the STC provides an indication to the STC that the auxiliary contacts 14 have closed.

The STC waits for a predetermined time to ensure the auxiliary contacts 14 have "debounced". The STC then puts a square pulse on output GP4 as illustrated in Figure The square pulse is held high for a predetermined time and then is turned off. This square pulse generates a test current which goes through the differential toroid 20 of the RCD fault detector sensor 22 which detects the "deliberately induced" fault in the normal manner as explained above. Thus an RCD fault signal is fed to GP3 of the RCD chip 28.

With an RCD fault detect signal at pin GP3 of the RCD chip 28, the RCD chip 28 sends a pulse on output GP 1 to main contact solenoid 16. This pulse is depicted in phantom in Figure 5. Provided the mechanism is working, the main contacts 12 will open.

The test current from GP4 of the STC is now off but the STC waits for the period "test_current_settle_time" as depicted in Figure 5. This provides time for the level detection capacitor C3 in the sensor 22 to bleed off. Since the RCD fault detection signal also goes to pin GP5 of the STC, this bleeding off of the level detection capacitor is also indicated graphically Figure 5. The STC then waits a further period "waitmain_contactsofftime" and then begins sampling the input at GP3 to verify that the main contacts have indeed opened. In order to do so, the main contacts sensor 36 will detect that the main contacts are open and thus provide 47 volts (phase) at R6. The output of the multiplexer in this case is 5 volts because at this stage, R6, D1 and R5 act as a voltage divider. When the STC samples the 5 volt signal at pin GP3 of the STC, the STC can determine that the main contacts 12 have opened and the device 10 is functioning properly.

As shown in Figure 5, the STC then pulses on GP2 to attempt to close the main contacts 12 again which also places a reset signal on GP2 of the RCD chip. The STC can close the main contacts at any point as the auxiliary contacts are already closed. This causes the main contact solenoid 16 to close the main contacts 12. This output signal on GP2 is left on for a specified period. The STC then waits "wait _main_contactsontime" to ensure that the main contacts have "debounced" in closing, following which, the STC begins sampling the input at GP3 to verify that the main contacts have closed. The main contact sensor 36 detects if the main contacts have reclosed. If so, then the multiplexer 30 puts 0 volts on the STC input GP3. A sample of 0 volts tells the STC 40 that the main contacts have successfully closed.

By removing the signal on GPO of the STC 40 as illustrated in Figure 5, the auxiliary contacts 14 are able to open. The STC then waits "auxofftime" for "debouncing" of the auxiliary contacts 14, following which, it samples the input of GP3 to verify that the auxiliary contacts have opened. With the main contacts 12 closed and the auxiliary contacts 14 open, the multiplexer output will then return to its normal state with the 50 Hz square wave sync signal on STC input GP3. This will enable the STC 40 to determine that the self test has been successful.

As explained, the STC will verify that the main contacts have opened in a test by the volt input at pin GP3. If the STC does not detect this then the STC fires the test signal again to initiate another simulated test. It will try this a number of times if there is no verification of the main contacts opening at GP3. Figure 6 illustrates the delay between repeated attempts by the RCD chip 28 to open the main contacts 12. In the event of unsuccessful opening of the main contacts, as mentioned above, the test current will be fired again. If the RCD chip is operating properly, another pulse will be generated from GP1 of the RCD chip. "Timetoretrip" is the delay between successive pulses from the RCD chip to open the main contacts. During this delay, the RCD chip waits for a reset signal from the STC on pin GP2. Once this time has elapsed, RCD chip waits for another zero crossing and in advance of the mechanical delay sends a pulse for opening the main contacts at zero crossing.

If there is still no success then the STC assumes a failure of the device has occurred. The STC will then trigger a trip sequence as a fail safe method to turn off the circuit. This involves driving open the auxiliary contact 14 and then putting a signal on the STC GP2 output to try to open the main contacts 12 (ie try to open the main contacts using the using STC 40 rather than RCD chip 28). If this is successful then there will be no power to the circuit nor to the device 10. Thus the device will probably require replacement since it is faulty. If this still fails to work (ie there is a physical problem with the main contacts) then a signal is put on GP 1 of the STC 40 to start the buzzer as a warning.

Similarly if during the testing sequence the main contacts fail to close (as will be detected by the STC), the STC will resend the pulse on GP2. If after a predetermined number of times, the main contacts 12 have still not closed, the STC will allow the auxiliary contacts 14 to open and thus all power to the circuit and the device will be cut.

Figure 6 also illustrates that after the first pulse on GP1 of the RCD chip 28, there will be a delay before the RCD chip 28 can accept a reset (in the event of successful opening of the contacts) from the STC to allow the main contact pin to settle. A reset can be accepted thereafter. In the event of failure to receive a reset, the RCD chip will trip out again to open the main contacts.

All throughout the self test (except for a small "deaf' time the RCD chip is still testing for an actual fault in the circuit. The RCD chip 28 is deaf from when the test current is fired until the level detect capacitor bleeds off(as depicted in Figure 5 by the input to of the STC). This period extends for between 130-170 ms. Apart from this deaf time, the RCD functions to detect faults in the circuit. Furthermore, the RCD will detect residual current faults extending beyond the very short period of deafness. In the event of detecting a fault during the self-testing regime, the STC opens the auxiliary contacts if they are not open already. The RCD chip should function to open the main contacts within a predetermined time. This is evidenced by a pulse on GP 1 of the RCD. As depicted in Figure 7, the STC waits for a predetermined time ("waitforRCD_chip_to_trip") for the RCD chip to open the main contacts 12. If this does not occur then the STC will operate to open the main contacts 12 by a pulse on GP2. The STC then waits for a predetermined time ("time to retrip"). If the RCD still has not tripped the main contacts (and there is still power to the device) then the STC will repeatedly try to trip both contacts.

If, when a fault is detected during a self-test, the main contacts are already open, the STC will open the auxiliary contacts. If power to the device remains after the "timetoretrip" -11then the STC will proceed with the fail-safe procedure, trying to trip both contacts.

Manual Test There are two types of manual tests which can be invoked by pressing the test button 39.

A testing routine can be implemented by pressing the test button for a short length of time.

This initiates essentially the same type of test as the self-testing procedure. In the event of a successful test, the power to the circuit is maintained via the auxiliary contacts 14 as per the self testing regime. Following a manually initiated test, the next self test will occur after the preset test period eg one week later.

If a failure is detected during a manually initiated self test, a different procedure is followed. First the state of the main and auxiliary contacts [both?] are determined (using the main and auxiliary contact sensors) then the buzzer 43 sounds a buzzer sequence according to whether the main contacts are jammed open, or failed to close or if the auxiliary contacts 14 cannot be opened. For example, the buzzer sequence for the RCD failing to trip the main contacts might be "beep beep beeeeeeeeeeeeep".

Pressing the test button 39 for a longer time will perform a test akin to the conventional RCD test whereby, in the event of a successful test, all power to the circuit is cut (ie not use the auxiliary contact). Thus, all power to the device 10 will be cut thereby requiring a manual reset to restore power to the circuit. If the power is not cut, the buzzer 43 sounds until the test button is released. Then the buzzer plays the buzzer sequence as explained above for the main contacts failing to open. The RCD repeatedly attempts to open the main contacts.

Other features In figure 1, the RCD chip 28 is also connected to LED1 as shown. The LEDI is on to show that the RCD is operational.

The foregoing describes only one embodiment of the present invention and modifications may be made thereto without departing from the scope of the present invention. For example, the invention while specifically described for 50Hz mains frequency may be adapted for 60Hz mains frequency without departing from the scope of the invention.

This may require reprogramming of the microprocessors. Furthermore, while the 12invention is described with particular reference to current leakage detectors, the invention may also be adapted to ground fault detector and interruption devices.

Claims (2)

13- The claims defining the invention are as follows: 1. A current leakage/earth fault detector and interrupter device for a mains circuit including: a sensor to detect current leakage, the sensor operable to generate a fault signal in the event of a fault; a circuit interrupter responsive to the fault signal to interrupt the mains circuit; and a tester operable to implement a test sequence to verify the operation of the sensor and the circuit interrupter wherein the tester is operable to periodically carry out a test automatically. 2. The current leakage/earth fault detector and interrupter device as claimed in claim 1 wherein the tester operates to simulate a real fault detectable by the sensor to generates a fault signal to which the circuit interrupter is responsive to interrupt the current to the mains circuit. 3. The current leakage/earth fault detector and interrupter device as claimed in claim 1 or claim 2 incorporating means to establish an auxiliary circuit by-passing the interruption in the mains circuit. 4. The current leakage/earth fault detector and interrupter device as claimed in any one of the preceding claims wherein interruption of the mains circuit is timed to coincide with current zero crossing. The current leakage/earth fault detector and interrupter device as claimed in claim 4, dependent on claim 3 including: a first processor which receives the fault signal from the sensor and which is operable to actuate the circuit interrupter in response to a fault signal to open the main contacts at current zero crossing; and a second processor which controls the operation of the tester and is operable to close the auxiliary circuit. 6. The current leakage/earth fault detector and interrupter device as claimed in claim 5 wherein the second processor is operable to actuate the circuit interrupter in the event that the mains contacts fail to open when a fault signal is generated. 7. A current leakage/earth fault detector and interrupter device for a mains circuit including: a sensor to detect current leakage, the sensor operable to generate a fault signal in the event of fault; a circuit interrupter responsive to the fault signal to create an interruption in the mains circuit; and a tester operable to implement a test sequence to verify the operation of the sensor and the circuit interrupter wherein the device further

14- includes means to establish an auxiliary circuit to by-pass the interruption. 8. The current leakage/earth fault detector and interrupter device as claimed in claim 7 wherein the tester is operable to carry out test automatically, with the auxiliary circuit being created automatically. 9. The current leakage/earth fault detector and interrupter device as claimed in claim 8 wherein the tester is operable to conduct the test on a periodic basis. 10. The current leakage/earth fault detector and interrupter device as claimed in claim wherein the interruption of the mains circuit is timed to coincide with current zero crossing. 11. A current leakage/earth fault detector and interrupter device for a circuit including: a sensor to detect current leakage, the sensor operable to generate a fault signal in the event of fault; a circuit interrupter responsive to the fault signal to create an interruption in the circuit; a tester operable to implement a test sequence to verify the operation of the sensor and the circuit interrupter; a current zero crossing detector to detect the recurring incidence of current zero crossing wherein the circuit interrupter is operable to approximately coincide the interruption in the circuit with the current zero crossing. 12. The current leakage/earth fault detector and interrupter device as claimed in claim 12 wherein the circuit interrupter involves a mechanical contrivance and suitable allowance is made of the mechanical delay in operating the contrivance. 13. A current leakage/earth fault detector and interrupter device as claimed in any one of the preceding claims substantially as hereinbefore described with reference to the accompanying figures.