AU680964B2

AU680964B2 - Radio set

Info

Publication number: AU680964B2
Application number: AU10624/95A
Authority: AU
Inventors: Manfred Hof
Original assignee: Robert Bosch GmbH
Current assignee: Siemens AG
Priority date: 1993-12-04
Filing date: 1994-11-29
Publication date: 1997-08-14
Anticipated expiration: 2014-11-29
Also published as: EP0732010A1; DE4341435A1; AU1062495A; WO1995015620A1; CN1044956C; EP0732010B1; DE59410430D1; CN1136870A

Description

*1 Radio set The invention is based on a radio set of the type mentioned in the main claim.

Various standards have become known for radio networks wherein a great number of transmission channels is produced by frequency and time division multiplexing. In the case of the GSM standard, which is used in the D1 network, frequencies of 890 MHz to 915 MHz with a 200 kHz grid are used to transmit from mobile radio stations to base stations and frequencies of 935 MHz to 960 MHz also in the 200 grid kHz to transmit from the base stations to the mobile stations. For a newer standard, the DMCS 1800, frequencies between 1710 MHz and 1785 MHz or 1805 MHz to 1880 MHz are also provided with a channel spacing of 200 kHz.

Due to the time division multiplex transmission within the individual channels limited by the carrier frequency an accurate clock and frequency preparation in the radio set is required both at the transmitting and the receiving ends.

The object of this invention is to develop the frequency and clock preparation in a radio set with the least possible number of components in such a manner that for various frequency ranges, particularly for those of the GSM standard and of the DMCS 1800 standard, the most important components, like, for example, oscillators or filters, have the same design.

This objective is achieved for a radio set according to the invention by the measures specified in the characterising part of patent claim 1.

The radio set according to the invention has the advantage that for both frequency ranges the same oscillators and the circuits associated with them can be used.

1 -e _L g~ I C I A development of the radio set according to the invention is that for the reception an intermediate frequency is formed as the difference of the frequency of the received signal and the frequency of the second controllable oscillator. This makes it feasible to use the same selection means in the receiving part also.

In case of this development it could be preferably provided that by forming a difference from the intermediate frequency and the frequency of the first controllable oscillator a further intermediate frequency is produced. This has the advantage that a subsequent demodulation can be carried out with a relatively low frequency. The signal will be preferably quadrature modulated with the further intermediate frequency, while a reference carrier necessary for the quadrature modulation is produced by a third controllable oscillator, which is coupled to the first controllable oscillator.

Another development of the invention is that the second controllable oscillator can be controlled with the aid of a phase comparison circuit, to which the output signal of the first controllable oscillator divided with regard the frequency by a first frequency divider and the output signal of the second controllable oscillator divided with regard the frequency by a second frequency divider can be supplied.

Preferably the divider ratio of the second frequency divider can be controlled.

By this development a simple selection of the radio channel is feasible by setting the divider ratio with the aid of a microprocessor which also controls other functions of the radio set. For this reason the signals which have been divided with regard the frequency and can be supplied to the phase comparison circuit have a frequency corresponding to the channel pattern.

In case of a radio set according to the invention the second ontrollable oscillator can be used both for transmission and I

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reception. The frequency required for the respective time slot to transmit and to receive is then set by a corresponding adjustment of the frequency divider by the microprocessor.

Depending on the prerequisites in each individual case, according to a further development of the invention for transmission and reception a second controllable oscillator each can be provided with a phase comparison circuit and a second frequency divider for each case.

An advantageous development of the invention is in that for the control of the frequency of the first controllable oscillator, a microprocessor, by comparing the system clock of the received signal and the system reference frequency and by measuring the temperature, produces a control signal for the first controllable oscillator, which signal can be supplied to the first controllable oscillator via a digital/analog converter.

In this manner an excellent stability of the frequency of the first controllable oscillator can be achieved.

Corresponding to the GSM standard and the DMCS 1800 standard a further advantageous embodiment with a lower frequency range of 890 MHz to 915 MHz for transmission and of 935 MHz to 960 MHz for reception and with an upper frequency range of 1710 MHz to 1785 MHz for transmission and of 1805 MHz to 1880 MHz for reception and with a system clock of 13 MHz provides that the frequency of the first controllable oscillator is an integral multiple of 13 MHz, preferably the 33-fold multiple.

Embodiments of the invention are illustrated in the drawing based on several figures and explained in detail in the following description. Shown is in: Fig.l a block circuit diagram of a first emhodiment, and Fig.2 a block circuit diagram of a second embodiment.

In the figures the same parts are designated with the same erence numerals. The figures illustrate those parts of a I l~s radio set which are necessary for the explanation of the invention, while further devices, like, for example, operating devices, the processing of low frequency signals and the control necessary for the time division multiplex technique are not shown in detail for clarity's sake.

In the radio set illustrated in Fig.l a first controllable oscillator 1 is provided operating with a fixed frequency of 429 MHz. This is the 33-fold multiple of 13 MHz, namely of the system clock established by the GSM standard.

A second controllable oscillator 2 can be tuned in the range of 1281 MHz to 1434 MHz in steps of 200 kHz. The oscillator 2 is coupled to the oscillator 1 via an adjustable frequency divider 3, a phase comparison circuit 4 ind a fixed frequency divider and it supplies a carrier signal for a modulator 6 to which the modulation signals I and Q can be supplied in a manner known per se in the transmitting part and for a mixer 7 which receives signals received by an antenna (not illustrated) via the amplifier 8 in the receiving part.

The divider ratio n of the frequency divider 3 can be adjusted between 6405 and 7170 with the aid of a microprocessor 9. By dividing the frequency of the oscillator 1 in 5 the phase comparison is carried in 4 with signals the frequency of which is 200 kHz. Due to this an increments of the divider factor n represent a frequency jump of 200 kHz.

A coupling of the output signal of the oscillator 1 with the system clock contained in the received signals is carried out with the aid of the microprocessor 9, to which the output signal of the oscillator 1 is supplied via a frequency divider and which microprocessor conveys a control signal to the oscillator 1 via a digital/analog converter 11. In the case of radio sets of suitable types the microprocessor 9 receives in a manner known per se the demodulated received signals, from which it derives the system clock for the purpose of a 4 01 I_ I _I comparison with the system reference frequency produced by the frequency divider After mixing the signals I apd Q with the output signal of the second oscillator 2 a further iling is carried out in 12 with the output signal of the oscillator 1. Depending on whether the radio set is to be used in a GSM network or in a 1.8 GHz network, a band filter 13, 13' is connected to the output of the mixer 12. Afterwards in 14 an amplification of the signals is carried out which are then fed to the antenna.

After the mixing in 7 with the output signal of the oscillator 2 an intermediate frequency of 474 kHz is filtered out from the mixed product on the receiving side with the aid of a band filter 15, which intermediate frequency is mixed subsequently in 16 with the frequency of the oscillator 1. The mixed product is conveyed through a band filter 17, so that a second intermediate frequency of 45 MHz is produced. This is demodulated in a quadrature modulator 18 from which the signals I' and Q' can be obtained. A carrier of also 45 MHz required for the quadrature modulator 18 is produced with a third controllable oscillator 19, which with the aid of a phase comparison circuit 20 and two frequency dividers 21, 22 is coupled to the oscillator 1.

For the transmitting frequencies lying on the band limits the frequency of the oscillator 2 is to be set as follows: 1319 MHz 429 MHz 890 MHz 1344 MHz 429 MHz 915 MHz 1281 MHz 429 MHz 1710 MHz 1356 MHz 429 MHz 1785 MHz For the reception of the frequencies lying on the band limits the following settings of the oscillator 2 are necessary, resulting in the same intermediate frequency of 474 MHz in each case: L~L~III- -I~d-srs L- J I L -u arul- I-- 4 1409 MHz 935 MHz 474 MHz 1434 MHz 960 MHz 474 MHz -1331 MHz 1805 MHz 474 MHz -1406 MHz 1880 MHZ 474 MHz In the frequency control of the oscillator 1 with the aid of a microprocessor 9, of the frequency divider 10 and of the digital/analog converter 11 a temperature compensation can be also included, wherein based on the temperature measurement the microprocessor influences the control signal in an appropriate manner via a sensor 23.

In the case of the radio set according to Fig.l the oscillator 2 is switched over between the frequencies required in each time for the transmission and reception. This is feasible since in the suitable systems GSM standard) the time slots for transmission and reception are shifted in time relative to each other.

However, in the case of the embodiment according to Fig.2 a second oscillator 2, 2' is provided for transmission. In a corresponding manner two controllable frequency dividers 3, 3' and two phase comparison circuits 4, 4' are also provided, Otherwise the embodiment of Fig.2 corresponds to that of Fig.l.

The invention is not limited to the frequencies specified in the embodiment. Thus, for example, multiples of 13 MHz other than 33 can be produced in the oscillator 1; 416 MHz, 390 MHz or 351 MHz, for example. In this case the values of 71 MHz, 90 MHz or 133 MHz will result for the second intermediate frequency.

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Claims

1. A radio set which is designed to transmit and receive in an upper and a lower frequency band, wherein the signals to be transmitted and to be received are digital time-division multiplex signals with a system clock modulated on the carrier in the upper and lower frequency range, characterised by a first controllable oscillator from whose output signal a system reference frequency is derived by frequency division, which system reference frequency is compared with the system clock of the received signals for the purpose of controlling the frequency of the first controllable oscillator and at least one second controllable oscillator is coupled to the first controllable oscillator and can be tuned by intervals determined by a channel pattern, wherein the frequencies of the first and the second controllable oscillator are selected so, that a difference of the frequencies results in a transmission frequency in the lower frequency range and a sum of the frequencies results in a transmission frequency in the upper range.

2. A radio set according to claim 1, characterised in that for the reception an intermediate frequency is formed as the difference of the frequency of the received signal and the frequency of the second controllable oscillator

3. A radio set according to claim 2, characterised in that by forming a difference from the intermediate frequency and the frequency of the first controllable oscillator a further intermediate frequency is produced.

4. A radio set according to claim 3, characterisrd in that the signal is quadrature modulated with the further intermediate frequency, while a reference carrier necessary pr^ for the quadrature modulation is produced by a third I- I L I controllable oscillator (19) which is coupled to the first controllable oscillator A radio set according to any one of the preceding claims, characterised in that tha second controllable oscillator can be controlled with the aid of a phase comparison circuit to which the output signal of the first controllable oscillator divided with regard the frequency by a first frequency divider and the output signal of the second controllable oscillator 2') divided with regard the frequency by a second frequency divider can be supplied.

6. A radio set according to claim 5, characterised in that the divider ratio of the second frequency divider can be controlled.

7. A radio set according to claim 6, characterised in that the signals which have been divided with regard the frequency and can be supplied to the phase comparison circuit 4') have a frequency corresponding to the channel pattern.

8. A radio set according to any one of the claims 6 or 7, characterised in that for transmission and reception a second controllable oscillator each is provided with a phase comparison circuit and a second frequency divider for each case.

9. A radio set according to any one of the preceding claims, characterised in that for the control of the frequency of the first controllable oscillator a microprocessor by comparing the system clock of the received signal and the system reference frequency and by measuring the temperature, produces a control signal for the first controllable oscillator which signal can be supplied to the first controllable oscillator via a digital/analog converter (11). /4r o OA, O A radio set according to any one of the preceding claims having a lower frequency range of 890 MHz to 915 MHz for transmission and of 935 MHz to 960 MHz for reception and with an upper frequency range of 1710 MHz to 1785 MHz for transmission and of 1805 MHz to 1880 MHz for reception and with a system clock of 13 MHz, characterised in that the frequency of the first controllable oscillator is an integral multiple of 13 MHz, preferably the 33-fold multiple. I--