AU679729B2 - Power meter - Google Patents

Description

WO 94/22024 PCT/GB94/0i492 1 Power Meter Field of invention This invention concerns metering apparatus for the measurement of electrical power and methods and apparatus for continuously generating and updating reference values within such apparatus corresponding to zero current or zero voltage.

Background to the invention It is known to measure voltage aid current to ascertain the power consumption from a supply typically an alternating current supply, by generating signals corresponding to the voltage and current, producing a product of the two signals and integrating the result over a period of time.

In recent years development work has been concentrated on meters incorporating solid state devices for performing some of the computations. Potentially such devices allow more accurate measurement than older electromechanical designs of meter and will also enable remote reading to be incorporated more readily into such meters.

It is an object of the present invention to provide a method and apparatus whereby one or more zero current or zero voltage reference values, required by such a meter, can be generated.

L L I Summary of the invention According to one aspect of the present invention in power measuring apparatus adapted to produce an output signal proportional to the product of an alternating supply voltage and alternating current flowing through a load connected thereto, in which a first signal is derived proportional to the said supply voltage and a second signal is derived proportional to the said load current so that a product signal can be produced by a microprocessor corresponding to the power, and wherein third and fourth signals are produced by modulating the period of two constant period carrier signals using respectively the said first and second signals, and the said third and fourth signals are supplied to the microprocessLr for multiplication to produce the power product output signal, at least one of the said third and fourth signals is averaged by signal processing means, to provide at least one reference value for the apparatus, corresponding to zero voltage or zero current or both.

Since the voltage and current values are to be multiplied, and the product will be zero if either is zero, it is only necessary to ensure that one of the computed values reliably reverts to zero when no power is being drawn.

Since the current waveform can become very unsymmetrical in the presence of certain loads (such as 1/2 wave rectifying circuits) preferably the averaging is applied only to the said third signal (ie the voltage related signal).

The advantage of the invention is greater accuracy and stability with time and changes in temperature.

AMENDED SHEET I ~1 I I I-L CP I WO 94/22024 PCT/GB94/00492 -3- Conveniently the average value is obtained by accumulating the pulses of the voltage related or current related Deriod varying signal over a relatively long period of time and using the accumulated value to control a Lcference value corresponding to the mean voltage (or current) period value. In the case of a sinusoidal waveform, the period variations from the mean period value caused by each positive going excursion of the sinusoid should be matched by the period variations from the meani period value caused by each negative going excursion, E, that after N periods of the modulating sinusoid (during each of which the period of the pulses describing the sinusoid varies from P to back to P, down to (P-p) and back to the total number of pulses accumulated will be NP. Therefore by repetitively accumulating this value over similar numbers of periods, the value of N can be considered to be a constant and the accumulated value will in each case be proportional to P, which is the period corresponding to zero voltage (or current).

Conveniently the invention is practised by maintaining the average of the period modulated voltage related signal at zero and subtracting the instantaneous value of the voltage related signal from the average value in order to provide the signal used for the multiplication step.

For the purpose, in a preferred arrangement the successive values of the period modulated voltage related signal are accumulated and the accumulated value is periodically latched, e.g. every 20 mill.ecs, and fed to a comparator which compares successively latched values and supplies an output to an arithmatical unit which adds or subtracts the said output from a value stored in a second latch, which latter value is determined by preceding outputs obtained from the arithmatical unit.

It will be appreciated that the process is continuous, the second latch being updated in accordance with the period of the millisecs timebase.

It is the constantly updated average voltage related period provided by the second latch which is employed as the reference value for the voltage related third signal.

A modified circuit may be employed, alternatively or additionally, to maintain the average value of the fourth signal at zero in order to constitute a reference.

In accordance with another aspect of the invention, therefore, measuring apparatus as aforesaid may comprise: additional pulse counter means adapted to receive and accumulate the voltage-related period varying signal pulses during measuring sequences, means for resetting the additional pulse counter to a preset value at the beginning of each measuring sequence, timer means for determining the duration of each measuring sequence thereby to determiie the number of periods N of the alternating voltage waveform during which the pulses are to be accumulated, latch means for latching the accumulated pulse count from the said additional pulse counter at the end of each measuring sequence, AMENDED

SHEET

i '~rr further pulse counter means adapted to receive and accutmulate current-related period varying signal pulses, during measuring sequences, means for resetting the said further pulse counter to a preset value at the beginning of each measuring sequence, further timer means for determining the duration of each measuring sequence thereby to determine the number of periods N of the alternating current waveform during which the pulses are to be accumulated, and further latch means for latching the accumulated pulse count from the said further pulse counter at the end of each measuring sequence, wherein the values latched in the latching means and further latching means are used to obtain signals proportional to the voltage and the current flowing for multiplication to produce a power signal.

According to a preferred feature of the invention the said additional pulse counter may be adapted to operate continually whilst the meter is operating, so as to provide a ccntinually updated period value corresponding to the mean supply voltage.

According to another preferred feature of the invention the said further counter may be adapted to be operated only once, during or after manufacture, at a time when the meter is set to measure a supply voltage and current being delivered therefrom to a load, which is selected so that the current waveform is essentially sinusoidal, and the latched current value at the end of the one-off measuring sequence is stored permanently in the meter for use as the reference period value corresponding to zero current.

7 AMENDED SHEET WO 94/22024 PCT/GB94/00492 6 reference period value corresponding to zero current.

Metering apparatus according to the invention may include both said additional and said further counters and associated timers and latches.

Where the same measuring period is to be applied to both voltage and current related period varying signals, a common timer may be employed. A typical timing period is nillisecs.

Since the signals are in binary form they can be transmitted via electrical isolating devices to enable a user accessible port to be associated with the apparatus.

Typically opto-isolators are employed.

In an electrical power measuring apparatus as aforesaid the said third and fourth signals may be transmitted to the microprocessor via electrical isolating devices such as opto-isolators. However it is to be understood that such isolation of the microprocessor from the third and fourth signals is optional and not esse tial in all cases.

The first and second signals are preferably in the form of analogue voltages and may be derived using potential dividers and shunts in known manner. The signals may be obtained without electrical isolation from the supply line but if desired, isolation may be achieved using one or more transformers.

Where one or both of the first and second signals is or are an electrical current this is preferably converted into a voltage in any convenient manner so that both first Fi~ ~1 WO 94/22024 PCT/GB94/00492 7 and second signals are in the form of electrical voltages.

The signal to period conversion is most simply effected using voltage controlled pulse generators in which the instantaneous period between the pulses from each pulse generator is controlled by the instantaneous value of one of the first and second signal voltages respectively.

Processing the third and fourth period varying signals to obtain a power signal may comprise the following steps: 1. generating a constant frequency clock signal having a period many times smaller than that of the mean period of the said third and fourth signals, 2. continually entering said clock pulses into two counters, 3. capturing the value of one counter at the beginning of each of the pulses making up the said third signal and likewise capturing the value of the other counter at the beginning of each of the pulses making up the said fourth signal, 4. subtracting the previously captured value from the currently captured value derived from each counter to form third and fourth difference signals, subtracting from the third and fourth difference signals a period equal to the mean period of each of the said third and fourth signals respectively to form fifth and sixth signals, and 6. supplying the fifth and sixth signals to a auadrature multiplying device and supplying the output thereof as the power signal.

If the signal to period conversion of the voltage and current signals operates without error then the period value to be subtracted from the third and fourth difference signals is a fixed period which equates to the value of the period corresponding to zero voltage and zero current where the supply is an alternating supply having a generally sinusoidal waveform.

The invention also lies in a method of generating reference period values corresponding to zero voltage and zero current for use in a power measuring method as described above in which there is to be produced a product of signals proportional to the voltage of an electrical supply and the current flowing through a load connected thereto, wherein the power measuring method includes the steps of deriving a firs: signal proportional to the said supply voltage, deriving a second signal proportional to the said load current, modulating the period of two constant period carrier signals by the said first and second signals to produce third and fourth signals respectively, normalising the third and fourth signals to reference periods corresponding to zero voltage and zero current, and multiplying the two normalised third and fourth signals to form a product signal which is proporticnal to the power being absorbed by the load connected to the electrical supply, in which the period of at least one of said third and fourth signals is each averaged and the average value is employed as the reference period value zero voltage and zero current reference signals, as aforesaid.

AMENDED SHEET 'I WO 94/22024 PCT/GB94/00492 9 The invention also lies in apparatus for processing the aforementioned third and fourth signals comprising: 1. a clock pulse generator for producing a clock pulse signal having a period many times that of the mean period of the third and fourth signals, 2. two counters to which the clock pulses are supplied continually, 3. circuit means for capturing the value in each of the counters, 4. circuit means responsive to the said third and fourth signals for controlling the capture means to capture the counter values at the beginning of each pulse which appears in the said third and fourth signals respectively, means for storing each captured value, 6. means for subtracting the stored captured value from the currently captured value before the currently captured value is inserted into the storage means to form third and fourth difference signals, 7. means for deriving the mean period of the said third and fourth signals, 8. circuit means for subtracting the said mean values from the two difference signals to form fifth and sixth signals, WO 94/22024 PCT/GB94/00492 10 9. quadrature multiplying means receptive of the said fifth and sixth signals to provide an output signal corresponding to the power being absorbed by the load connected to the said electrical supply, and circuit means for averaging the third and fourth signals over a period of time to provide automatic zero power calibration for the apparatus.

Preferably a microprocessor is employed for effecting the multiplication of the fifth and sixth signals and the processor is programmed to compute therefrom not only the apparent power but also the apparent instantaneous power, the real energy and power and also the reactive energy and power supplied to the load.

Power measuring apparatus embodying the invention is equally applicable to single or multiple phase electrical supply metering. For single phase metering it is only necessary to measure the current in one line whereas for multiphase supplies, it is of course necessary to measure at least the current in each of the phases and if appropriate the voltage relating to each phase to produce three power signals which must be summed in order to produce a total power signal for the multiple phase supply.

Any of the apparatus as aforesaid may be combined with a coin freed mechanism or card reader to provide for prepayment of electricity.

Likewise any of the apparatus -as aforesaid may be combined with means for remote reading and remote control of the meter by any telemetering method or by power line signal WO 94/22024 PCT/GB94/00492 11 modulation techniques and the meter accordingly may include receiver and/or transmitter means for decoding data transmitted to the meter and appropriately modulating a carrier for transmission of data from the registers contained in the meter relating to example to the accumulated power measured by the meter.

Any of the apparatus as aforesaid may include switch means for interrupting the supply of electric current from the meter to the load. The switch means may be remotely controllable as by telemetry (for example power line signal transmission). Where receiver means is included for said remote control the receiver may be adapted to generate a control signal for operating the switch means on or off in response to the receipt and decoding of an appropriate command signel. Provision may be made for local operation of the switch means.

Any of the apparatus as aforesaid may include display means suc as an LCD display or the like for displaying in alpha numeric characters the accumulated power measured by the meter.

The voltage to period conversion may be achieved by controlling the period of a free running oscillator set to produce pulses of a period P (where P is significantly ller than the frequency of the oscillating current supply) so that as the instantaneous voltage of the supply increases from zero up to a positive peak then decreases through zero to a negative peak and back again to zero during a cycle, so the pulse period between pulses decreases from the period at zero voltage up to the negative maximum and then increases and continues to decrease until the positive maximum is reached and ,L -I -r WO 94/22024 PCT/GB94/00492 12 thereafter decreases once again to the zero voltage pulse period at the end of each cycle.

By reversing the polarity of the supply voltage (or proportion thereof which is fed to the pulse period controlling terminal of the oscillator), so the period can be varied in an opposite sense during each cycle, firstly increasing (as the supply voltage increases) and then decreasing (as the supply voltage collapses and reverses polarity) and lastly increasing again as the supr y voltage once again increases towards zero to complete the cycle.

An integrated circuit timing device whose relaxation period is controlled at least in part by a potential difference between two of its pins, may be employed.

Such a device comprises a type 555 timer.

The mean period between pulses (ie when zero voltage appears between the said two pins), of such a device, is determined by an external components and a typical mean period of 0.5 millisecs is employed if the supply period is The invention will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 is a simplified block circuit diagram of a power measuring meter, Figure 2 is a block circuit diagram of the elements which make up the processor employed in Figure 1, and show the additional counters and latches reguired by the I I I WO 94/22024 PCT/GB94/00492 13 invention, Figure 3 comprises a block circuit diagram of the voltage and current to period converters of Figure 1, Figure 4 illustrates a simplified form of meter based on Figure 1 in which no opto-isolation of the processor is required from the voltage to period and current to period circuits, Figure 5 illustrates how two or more meters can be connected to a so-called substandard meter for simultaneous calibration, Figure 6 illustrates a card controlled meter in its protective housing, Figure 7 is a perspective view of the interior of the meter with the front housing cover and card reader removed, Figure 8 is a perspective view of he card reader from one side, Figure 9 is a similar view of the card reader from the other side, and Figure 10 is a perspective view of the rear of the meter housing with the pcb and card reader removed, to reveal the contactor and current shunt.

Referring to Figure i, the instantaneous potential of the mains supply is measured between the live line 3 and the neutral line 11 of a domestic supply. The voltage is converted to a pulse train by the voltage to period converter which has a free running period of approximately millisecs which is modulated up or down in period depending on the polarity and amplitude of the potential excursion.

Typically the base period is modulated by the supply voltage waveform signal to produce a period modulated signal with a deviation of plus or minus 0.05 millisecs. The deviation is proportional to the instantaneous voltage of the waveform. The pulse train produced by the voltage to period converter 5 is coupled to input 1 of a processor 8 via an opto-isolator 7.

The instantaneous current flowing is measured by measuring the potential generated across a shunt resistor 2 connected in series with a live wire 3 of the supply to the consumer. This voltage is converted to a pulse train by a voltage to period converter 4 which also has a free running oscillator operating at a period of approximately 0.5 millisecs. This base period is modulated by the supply current waveform signal to produce a period modulated signal with a deviation of plus or minus 0.05 millisecs full scale. The deviation is proportional to the instantaneous current flowing to the consumer and the pulse train is coupled via an opto-isolator 6 to a second input of the processor 8.

The processor 8 provides signals for driving a display 106 (typically liquid crystal display) to indicate under normal operation, the accumulated numerical value of units of power measured by the meter, (as will be described in more detail with reference to Figure 2).

Likewise a contactor 108 may also be controlled by an k/S AME.'IrD SHET WO 94/22024 PCT/GB94/00492 15 output signal from the processor.

The contactor is preferably a pulse operated device held into its last switched state by a spring or permanent magnet or both.

The contactor is only required if ON/OFF control of the supply to the consumer/load is required as in the case of a coin or a card controlled meter or a meter which is to be motely controlled by the supply authority as by power line modulation.

Where provided, a power line signalling receiver or transmitter/receiver 112 provides control signals for the processor or receives data from the processor for transmission to the supply authority as for exam:,.e to indicate a fault condition in the meter or relay the authority the accumulated value of measured power.

The card reader 114 likewise is controllable by signals from the processor and in turn produces electrical signals serving as signal inputs to the processor. Thus the processor may produce a signal to enable the card reader, cancel data on a card after it has been read, may receive data read from an inserted prepayment card for validating the card and can indicate to the processor the number of units to be permitted before requiring a further card to be inserted.

DC power for the voltage/current to period converter circuits 4 and 5 and the driving elements of the optoisolators is derived from a halfwave rectifying circuit made up of diode 116 and reservoir/smoothing capacitor 118. Typically the DC voltage requirement is of the order -I WO 94/22024 PCT/GB94/00492 16 of a few volts for example 5-15 volts, and since the ac supply voltage will normally be 240 volts RMS or the like, a tapping 120 on the primary winding 122 of a transformer 124 can provide the lower ac voltage needed as input to the rectifying citcuit 116/118.

Where isolation of the processor is required (as is essential if user accessible ports are provided on the meter), the dc power for the processor (and display, card reader, powerline communication receiver/transmitter, contactor etc when fitted) is derived from a second rectifying circuit supplied from the secondary winding 126 of the transformer 124 and comprising diode 128 and smoothing/reservoir capacitor 130.

The processor may be an integrated circuit capable of performing all the functions in Figure 2, or an array of devices which collectively can perform the said functions.

In order to obtain t:ie values of voltage and current, the processor has to measure the time between pulses. In the example shown this is achieved by the same method for both current and voltage, and will be described with reference to Figure 2.

'or simplicity the processor will be assumed to be a single integrated circuit ie a customised microprocessor chip.

Also for simplicity the controlling (central processing) element of the customised device of Figure 2 is not shown, nor are the signal paths between it and the individual processing elements shown in Figure 2.

I I I csP WO 94/22024 PCT/GB94/00492 17 A 16 bit counter 40 is continuously clocked by a crystal controlled sezillator 12 running at The output of the counter is connected in parallel to the inputs of two 16 bit latches 14 and 15. Latch 14 relates to the voltage and latch 15 to current.

The clock inputs of the respective latches are fed with the pulse trains of lines 9 and 10 respectively.

On the positive edge of a pulse on line 10, the value of the counter 40 is stored in the latch 14. To obtain a number indicative of the period between pulses, the value of the previous count is subtracted from the newly counted value in a subtractor 20. This produced the value PERv in item 21.

To allow the effects of long term drifts to be catered for items 13, 16, 17, 18, 19, 22 and 34 function to maintain the average value of signal 38 at zero. Successive values of signal 38 are accumulated in 13. The accumulated value is latched into latch 16 by a 20ms timebase 34. This latched value is then compared in 17 to a newly accumulted value in 13, the result of this comparison is fed to the add/subtract element 18. 18 adds (subtracts) this value to (form) the value stored in the latch 19. The result of 18 is presented to the latch 19. Although this process is continuous, the value held in latch 19 is only updated by the 20ms timebase 34. This average voltage related period is then subtracted by 22 from the instantaneous voltage related period to give a numerical output value at 38 proportional to the instantaneous voltage.

I- I WO 94/22024 PCT/GB94/00492 18 A second channel accepts the signal representative of current along line 9 and produces a value 39 proportional to the instantaneous current in exactly the same way as the signal 38 is produced corresponding to voltage.

The current value channel has a similar arrangement to the voltage channel for producing an average value of the current related period, but typically this is only performed once during calibration, during manufacture.

The items concerned are contained within 35. The average or base current related period value is subtracted from the values of instantaneous current frequency which arise during use, giving a period value proportional to the instantaneous current, for supply as signal 39.

The two signals 38 and 39 are the inputs to a four quadrant multiplier 26. As these two signals are asynchronous, the multiplication is caused to occur at regularly occuring intervals of time displaced by, for example, 500 microseconds. A suitable timing or interrupt circuit 27 produces the necessary control signals for the multiplier. The latter uses the input signal present at 38 and 39 at each instant in time and each result is then passed to an accumulFtor 28 which keeps a total of the power consumed. The running total in the accumulator is compared in the comparator 29 with a number, from register which is equivalent to a 1/1000th of a kilowatt hour.

When this value is reached or exceeded a current pulse is generated causing the kilowatt hour register 33 to be incremented by one and if desired a front panel light emitting diode (LED) 37 can be triggered to flash. The value in 30 is also subtracted from the register (accumulator) 28 in response to the generation of the count pulse.

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WO 94/22024 PCT/GB94/00492 19 It is to be noted that if the value in the register 28 is greater than the value from 30 the excess will remain in the register 28 and will count towards the new accumulating value in the register. This significantly improves the accurancy of the measuring technique since in this way no part of any power signal computed by multiplier 26 will be lost and over a long period of time the shortfall in the kilowatt hour register 33 would be quite considerable if the overflow amounts left in the accumulator register 28 were (in fact) to be disregarded.

The number used to indicate a 1/1000th of a kilowatt hour is at least initially adjustable to enable calibration of the meter against a standard. This provides a method for calibration of the meter during manufacture and if required following any subsequent refurbishment.

The processor 8 may include memory means (not shown) in which one or more programmes or instructions can be stored for recall in response to appropriate interrupts and/or input signals, to cause the processor to perform the functions described in relation to Figure 2.

Figure 3 illustrates a preferred circuit for providing two period modulated signals corresponding to the instantaneous values of supply voltage and load current of Figure 1.

Certain of the components and connections are common to elements in Figure 1 and to this end the same reference numerals have been employed.

The shunt should develop the smallest possible potential I -g I I II WO 94/22024 PCT/GB94/00492 20 difference v

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To this end a differential amplifier 86 is employed to generate a larger signal V I for supply to pin of a type 555 timer 88.

Mean period controlling circuit elements 90 and 94 provide potentials for pins 2, 6 and a charging/discharging capacitor 94 is connected between pin 2 (which is also connected to pin 6) and the live line. Pin 3 provides the PI output signal which may be supplied directly to the processor 8 (as shown in Figure 4) or via an opto-isolator 6 as shown in Figure 1.

A second 555 timer 96 forms the basis of the supply voltage to period converter 5. A small fraction of the supply voltage (between the LIVE line 3 and the NEUTRAL line 11) is produced by a potential divider made up of resistors 84 and 98. The desired small fraction appears across the resistor 98. This potential difference appears between pins 1 and 3 of 96. As before the mean frequency of operation of 96 is controlled by circuit elements 100, and 104 and typically these may be made adjustable so that the period of 5 can be made the same as that of 4.

(Alternatively or additionally the elements 90 or 94 or both may be made adjustable).

As before the Pv signal is derived from pin 3 of the 555 device and is supplied either, directly (as shown in Figure 4) or via an opto-isolator 7 as shown in Figure 1, to the second input of the processor 8.

Figure 4 merely shows diagrammatically how in a simple meter (in which there is no user accessible port such as coin freed mechanism or card reader) but merely a display with or without a contactor for local or remote ON/OFF CP~Y I*II~I~ WO 94/22024 PCTIGB94/00492 21 control of the supply, the need for opto-isolators is removed. To this end the processor 8 is at LIVE rail polarity as is consequently the display 106 and actuator coil of the contactor 108 if provided. Where the latter is provided the LOAD terminal is connected to the terminal A of Figure 4 via the contacts 110. The latter is to advantage a spring and/or permanent magnet assisted contactor requiring positive and negative pulses only for operation to open and close the contacts 110.

Where the contactor is not required, the load is connected direct to terminal A.

Calibration is usually performed by comparing the power measured by a meter under test with the power measured by a "standard meter" set to measure the same voltage and current parameters over the same period of time. Although a so-called standard quality meter is ideally used, in practice meters which are not quite up to standards quality may be used as the reference and such meters are commonly referred to as sub-standard meters.

Such a meter is that produced by Landis and Gyr under the code TVE 102/1. These meters deliver an electrical pulse for each 1/500,000th of a kilowatt hour measured by the meter. Each such pulse is called a unit power pulse.

As described with reference to Figure 2 the numerical value with which the accumulated value being registered at 28 is to be compared (to determine when a 1/1000th of a kilowatt hour has been registered by the meter) can be adjusted for calibration purposes. This numerical value is held in the register L g WO 94/22024 PCT/GB94/00492 22 Since the pulses to be accumulated by the meter under test should correspond to 1/1000th kilowatt hour, interface 74 is provided which includes divider devices (not shown), typically CMOS type CD 4510B connected to provide a 500:1 ratio, so that one pulse is delivered by the interface for every 500 pulses received from the "standard" meter The permanent value for register 30 is arrived at by feeding via optical port 32 pulses from the interface 74, to a counter 41. The value in counter 41 is initially set to zero by a reset pulse on line 44. This reset pulse may for example be the first to arrive of a sequence of pulses from the sub-standard meter or a specially generated reset pulse. The incremeniing value in register accumulator 28 is also reset to zero by the same reset pulse on line 44.

If (as is arranged) both meters are set to measure the same voltage and current, pulses arriving from the substandard meter via interface 74 and port 32 increment the counter 41, and in a similar manner the numerical value in the register accumulator 28 is incremented by the action of the power measuring circuits of the meter under test as described with reference to Figure 2.

Counter 41 is set to generate an output pulse when N pulses have been received from the interface 74 this trigger is supplied to the divider 42 to divide the numerical value which has been accumulated in the accumulator register 28 by the value N to produce a numerical value for latching into the register The value of N may be 256 to simplify the division step and ensure a relatively long period in which the substandard meter output is compared with the meter or meters under test. To this end the arrival of the 257th pulse L- WO 94/22024 PCT/GB94/00492 23 can be used to serve as the trigger to generate the divider instruction pulse along line It is to be understood however that the numerical value N is quite arbitrary and any value can be chosen which is convenient and sufficiently large enough to ensure that enough unit power pulses have been received to ensure an accurate value after division by N for insertion in the register After the comparator register 30 is latched it is preferably WRITE-inhibited in any known manner to prevent unauthorised recalibration of the meter.

As shown in Figure 5 a sub-standard meter 50 may be connected between the L and N terminals of a supply 52 and to receive current from the terminals 68, 70 of the secondary of a current transfer 54.

One terminal 70 of the current transformer secondary is connected to the L terminal of the sub-standard meter and in order to ensure that the same current passes through the current measuring circuits meters of all the LOAD terminal 56 if the sub-standard meter is connected to the LIVE terminal 60 of the first meter under test 58 and the LOAD terminal 62 of that meter is connected to the LIVE terminal 64 of the next meter under test 66 and so on, until the last meter in the chain where the LOAD terminal is connected to the terminal 68 of the load.

In Figure 5 only two meters are shown under test and it is therefore the LOAD terminal 72 of the second meter 66 which is connected to the load terminal 68.

WO 94/22024 PCT/GB94/00492 24 In order to convey unit power pulses from the sub-standard meter 50 to a number of meters under test 58 and 66 etc, the interface unit 74 pulses serve to drive a chain of LEDs 76, 78 etc and cause the latter to flash in synchronism therewith. By positioning each LED 76, 78 etc opposite the opto communication ports 80, 82 respectively of the meters under test, so the pulses derived from the unit power pulses from the sub-standard meter 50 can be used to calibrate all of the meters in the chain.

The assembled meter of Figures 1 and 2 is shown in Figure 6 within a two part housing comprising a base unit 132 and front cover 134. The latter is adapted to be panel or wall mounted and the front cover includes a panel containing a viewing window 136 through which a display 106 can be seen. The slot of a card reader 106 is shown at 138 and finger operable control buttons 140 and 142 allow the meter to be programmed after appropriate instructions have been entered via an opto communications port 144 containing an LED 146 and light sensitive transistor 148.

The LED 37 which flashes when unit power pulses are generated is also visible through the window 150.

Removing the front cover and card reader allows the inside of the meter to be seen as shown in Figure 7. Here the display 106 is shown mounted on a small pcb 156 carrying also the receiver and transmitter units 146, 148 of the opto communications port 144, switches 152 and 154 operable by the press pads 140 and 142 in Figure 6, and the LED 37 (of Figure The small pcb 156 is mounted by standoffs 158 and 160 from the main pcb 162 on which is mounted a central processor chip 164 and related power

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WO 94/22024 PCT/GB94/00492 25 supplies and buffer circuit elements, the opto isolators, the 555 timer devices 88, 96, the differential amplifier 86 and related decoupling and signal coupling paths and devices. A slot 166 is provided into which the inboard end of a card reader can be fitted and located.

Cable connections are provided at 168, 170, 172 and 174 for connecting the Live, Neutral In, Neutral Out and Load (ie for example the live busbar of a domestic supply).

Figures 8 and 9 show the card reader as comprising a shallow box-like member 176 defining a slot 138 at one end and having on one face a DC motor 178 adapted to draw in and eject cards via a claw drive 180 and on the other face an erasing device comprising a pivotted arm 182 bearing a permanent magnet 184 which during reverse movement of the card (not shown) is moved under the action of the motor drive into contact with the magnetic stripe on the card to erase magnetic data stored thereon.

Reading and writing control circuits for receiving signals from and supplying signals to a read/write head (not shown) also mo:inteu' on one face of the box 176, are also carried by the latter.

Beneath the main pcb 162 as shown in Figure 10, is located a contactor 186 which for convenience supports the shunt 2 (of Figure 1) itself connected between one terminal 167 of the contactor and one of the cable connectors 168 etc of Figure 7.

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Claims (14)

1. A power measuring method adapted to produce an output signal proportional to the product of an alternating supply voltage and alternating current flowing through a load connected thereto, in which a first signal is derived proportional to the said supply voltage and a second signal is derived proportional to the said load current so that a product signal, corresponding to power, can be produced by a microprocessor, 0 wherein third and fourth signals are produced by modulating the period of two constant period carrier signals using respectively the said first and second signals, the said third 0*0000 and fourth signals are supplied to the microprocessor for multiplication to occur so as to produce the product signal, .o o and at least one of the said third and fourth signals is averaged by signal processing means, to provide at least one reference value, corresponding to zero voltage or zero current or both. •0 go ee0

2. The power measuring method of claim 1, wherein the averaging is applied only to the third signal. *00g oooo

3. The power measuring method of claim 1, wherein the average value is obtained by accumulating the pulses of the voltage related or current related period varying signal over a relatively long period of time and using the accumulated value to control a reference value corresponding to the mean voltage (or current) period value.

4. The power measuring method of claim 1 or 2, wherein the successive values of the period modulated voltage related signal are accumulated, and the accumulated value is periodically latched, and the latched value is fed to a comparator. The power measuring method of claim 1, wherein the average value of the fourth signal is maintained at zero in order to constitute a reference.

6. Power measuring apparatus for performing the method of any of claims 1 to 5, the apparatus comprising means for producing the third and fourth signals and a microprocessor for producing said product signals in accordance with claim i, and signal processing means including:- first pulse counter means adapted to receive and accumulate voltage-related period varying signal pulses during a measuring sequence, S. means for resetting the pulse counter to a preset value at the beginning of a measuring sequence, timing means for determining the duration of each measuring sequence thereby to determine the number of periods N of the alternating voltage waveform during which the pulses are to be accumulated, go 9 latching means for latching the accumulated pulse count 055* **tofrom the said pulse counter at the end of a measuring sequence, further pulse counter means adapted to receive and accumulate current-related period varying signal pulses, during o. a measuring sequence, means for resetting the said further pulse counter to a preset value at the beginning of a measuring sequence, further timing means for determining the duration of a measuring sequence thereby to determine the number of periods N of the alternating current waveform during which the pulses are to be accumulated, and further latching means for latching the accumulated pulse count from the said further pulse counter at the end of a measuring sequence, and signal generating means connected to the latching means and further latching means, and operable to generate signals, which are related to the values latched into the latching means and further latching means, and which are proportional to the voltage and the current flowing, for multiplication to produce a power signal.

7. Power measuring apparatus as claimed in claim 6, wherein the said first pulse counter is adapted to operate continually whilst the meter is operating. @@ego:

8. Power measuring apparatus according to claim 6, wherein the o* said further counter is operated only once and the current eeo. value at the end of the one-off measuring sequence is stored for use as the reference period value corresponding to zero current. 0* 0•0:9 Power measuring apparatus according to any one of claims 6 to 8, wherein the apparatus includes electrical signal o.0 isolating devices, via which, in use, said third and fourth signals are transmitted to the microprocessor.

10. A power measuring method according to claim 1, comprising the following steps for processing the third and fourth period varying signals to obtain a power signal, namely: generating a constant frequency clock signal having a period significantly smaller than that of the mean period of the said third and fourth signals, (ii) continually entering said clock pulses into two counters, (iii) capturing the value of one counter at the beginning of each of the pulses making up the said third signal and likewise capturing the value of the other counter at the beginning of each of the pulses making up the said fourth signal, (iv) subtracting the previozcly captured value from the currently captured value derived from each counter to form third and fourth difference signals, subtracting from the third and fourth difference signals a period equal to the mean period of each of the said third and fourth signals respectively to form fifth and sixth signals, and (vi) supplying the fifth and sixth signals to a quadrature ea es. S" multiplying device F-d supplying the output thereof as the e* 0 power signal. .8

11. Power measuring apparatus for use in the method according to claim 1, the apparatus comprising means for producing the third and fourth signals in accordance with the method of claim I1, and signal processing means for processing the third and fourth signals, the signal processing means comprising:- a clock pulse generator for producing a clock pulse signal having a period significantly greater than that of the mean period of the third and fourth signals, ooo o S S (ii) two counters to which the clock pulses are supplied on a continuous basis when the apparatus is functioning, (iii) capture circuit means adapted to capture the value in each of the counters, (iv) further circuit means responsive to the said third and fourth signals for controlling the capture circuit means to capture the counter values at the beginning of each pulse which appears in the said third and fourth signals respectively, signal storage means for storing each of the pairs of the captured values, (vi) signal value subtraction circuit means for subtracting the earh stored captured value from the appropriate currently captured value before the latter is inserted into the storage means, to form third and fourth difference signals, (vii) means for deriving the mean period of the said third and fourth difference signals, (viii) further subtraction circuit means for subtracting the S.. said mean values from the two difference signals to form fifth and sixth signals, and (ix) quadrature multiplying means receptive of the said fifth and sixth signals to provide an output signal corresponding to the power being absorbed by the load connected to the said electrical supply.

12. Power measuring apparatus as claimed in any of claims 6 to 9 or 11ii combined with a mechanism for interrupting the flow of the electric zurrent and which is cperable to permit the flow thereby in response to the insertion of a coin or token therein, or to data read from or derived by the insertion of a machine readable card into a card reader therein, and revert to the interrupted mode after a quantity of power has been measured as having been supplied to the load.

13. Power measuring apparatus as claimed in any of claims 6 to 9 or 11 or 12 in combination with means for remote reading and remote control of the meter by telemetry or by power line signal modulation.

14. Power measuring apparatus according to claim 13 including switch means for interrupting the flow of electric current through the meter. -e A power measuring method according to any of claims 1 to or 10, wherein the step of producing the third signal is achieved by controlling the period of a free running oscillator set to produce pulses of a period P (where P is significantly smaller than the frequency of the oscillating current supply) so that as the instantaneous voltage of the supply increases from zero up to a positive peak then decreases through zero to a negative peak and back again to zero during a cycle, so the pulse period between pulses decreases from the period at zero voltage up to the negative maximum and then increases and continues to increase until the positive maximum is reached and S thereafter decreases once again to the zero voltage pulse period at the end of each cycle. a 16. Power measuring apparatus according to any of claims 6 to 9, in which the timing means comprises integrated circuit timing device, arranged that the relaxation period of the device is co, i :olled at least in part by a potential difference between two of its pins.

17. Apparatus according to claim 16 wherein the integrated circuit timing device is a type 555 timer.

18. Apparatus for measuring power constructed, arranged and adapted to operate substantially as herein described with reference to and as illustrated in the accompanying drawings. 9 0 19. A method for measuring power substantially as described herein with reference to and as illustrated in the accompanying drawings. DATED this 18th day of April, 1997. AMPY AUTOMATION DIGILOG LIMITED By their Patent Attcrneys: CALLINAN LAWRIE