AU672970B2 - A preprocessing pipeline for RTO graphics systems - Google Patents

Description

S F Ref: 238860

AUSTRALIA

PATENTS ACT 1990

COMPLETESPECIFICATION

FOR A STANDARD PATENT

ORIGINAL

Name and Address of Applicant: a a *4*J a a.

a. a Actual Inventor(s): Address for Service: Invention Title: Canon Information Systems Research Australia Pty Ltd 1 Thomas Holt Drive North Ryde New South Wales 2113 AUSTRALIA o\ ct 0 r, v.CatsoC\o 's Kia Silverbrook, Michael John Nebb and Simon Robert Malmsley Spruson Ferguson, Patent Attorneys Level 33 St Martins Tower, 31 Market Street Sydney, New South Wales, 2000, Australia A Preprocessing Pipeline for RTO Graphics Systems ASSOCIATED PROVISIONAL APPLICATION DETAILS [31] Application No(s) [33] Country PL2142 AU [32] Application Date 29 April lgq.

The following statement is a full description of this invention, including the best method of performing it known to me/us:- 5815/3 -1- A Preprocessing Pipeline for RTO Graphics Systems The present invention relates to real-time object (RTO) graphics systems and, in particular, discloses a pipeline structure for the preprocessing of object fragment data used for calculating an image to be displayed.

Graphics systems in common use normally utilize many different co-ordinate systems in the display of images. The fundamental co-ordinate system is the world coordinate system which includes all possible displayable co-ordinates. A second coordinate system is the viewing or window co-ordinate system which is used for locating a position or location on a display device such as a screen or printer. A viewing coordinate system is normally forms a 'view port' or 'window' of a certain portion of the world co-ordinate system. Methods of transforming a window coordinate system to its corresponding world co-ordinate system are well known in the art.

Graphic objects used in the display of images, often consist of many different instances of a collection of sub-objects. Each of these sub-objects is normally defined by a further relative co-ordinate system, with the position, scaling, rotation etc. of the sub-object defined relative to an overall position of the object. The use of a relative coordinate system allows the corresponding graphic objects to be easily manipulated :through such processes as scaling, translation, coping and rotation. The used of relative co-ordinate systems are well known in the art.

S 20 When it comes time to display the objects falling within a certain widow or view :port on a graphics display device, a determination must be made of which object, or part thereof, falls within the window or view port, and what shape that object will take upon consideration of the transformations required between the world, viewing and relative coordinate systems. The display of graphic objects is therefore normally 25 achieved by applying the transformation to each object and 'clipping' or culling those objects or portions thereof that lie outside the wiidow or view port.

It is an object of the present invention to provide an efficient means of processing object based data thereby enabling rapid handling of same for image reproduction.

In accordance with one aspect of the present invention there is disclosed a method of processing two-dimensional graphic objects comprising object-based data, that together form an image intended for pixel-based rasterised display, said method comprising the steps of: receiving said two-dimensional graphic objects, each said two-dimensional graphic object including at least one object-based fragment that defines a single curve portion of said object; i* (ii) scaling and translating each said fragment of each two-dimensional object based on object vectors preset for each two-dimensional object; l| 238860 RTO2, CFP106AU .[O:\CISRA\RTO\RTO2]AUCLAIMS:IAD it Ii; -2a (iii) a first determining step for determining a first group of fragments which do not comprise part of the pixel-based rasterised image and discarding the first group of fragments; (iv) a second determining step for determining a second group of fragments which comprise part of the pixel-based rasterised image; calculating fragment data for each fragment in the second group of fragments, the fragment data corresponding to that fragment's starting line on the pixelbased rasterised image; and (vi) storiig the second group of fragments and the corresponding fragment data for each fragment in the second group of fragments, prior to calculating the pixel-based rasterised image.

Preferably, the fragments are processed sequentially in pipeline fashion,. Also preferably, after step interlace correction can be performed where the fragments form part of an interlaced image. Also preferably, before step the further step of sorting all fragments and their corresponding data into sets based upon the starting line of each said quadratic polynomial fragment in the image is performed. Preferably, the fragments are quadratic polynomial fragments, but can also take other forms such as cubic splines and the like. Apparatus for performing the method is also disclosed.

A preferred embodiment of the present invention will now be described with reference to the drawings in which: Fig. 1 shows a schematic block diagram of an RTO graphics system; Fig. 2 is a data flow diagram of the RTO processor seen in Fig. 1; Fig. 3 is a schematic block diagram representation of the RTO processor; Fig. 4 shows the object list format output from the host processor of Fig. 1; Fig. 5 illustrates a preferred arrangement of the preprocessing pipeline; Fig. 6A to Fig. 6E show data flow through the preprocessing pipeline of Fig. Fig. 7 and Fig. 8 show the formats of object and QPF data respectively; Fig. 9 shows the arrangement of QPF data as stored in the QPF memory; and Fig. 10 shows the QPF memory as configured after preprocessing.

Australian Patent Application No. 38244/93 (Attorney Ref: (RTO7) (238909)) entitled "A Real-Time Object Based Graphics System" lodged concurrently herewith and the disclosure of which is hereby incorporated by cross-reference, discloses a realtime object (RTO) graphics system 1 shown in Fig. 1 of the present specification which includes a controlling host processor 2 connected via a processor bus 3 to a processor memory 4 which includes ROM and RAM. The host procssor 2 operates to form a object list of objects which are used to form an image. The object list is stored in the RAM portion of the processor memory 4 in which the objects can be derived from the ROM portion of the i 1 1 ji r i i r j

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The object list includes various individual objects in which the outline of each object is described by a plurality of object fragments which, in the preferred embodiment are quadratic polynomial fragments.

Connected to the processor bus 3 is a RTO processor 5 which manipulates objects and their QPFs from the object list so as to output rasterised image data to a colour look-up table 8 for reproduction of the image described by the object list on a display 9 such as a video display unit or printer. The RTO processor 5 also connects via a QPF bus 6 to a QPF memory 7 formed of static RAM which is used for the storage of QPFs whilst the RTO processor 5 is calculating the image data.

Where the host processor 2 generates objects, and/or preformated objects are available and these objects are configured using cubic polynomials such as Bezier splines, these polynomials can be converted to QPFs in the manner described in Australian Patent Application No. 38239/93 (Attorney Ref: (RTO9)(238753)) entitled "Bezier Spline to Quadratic Polynomial Fragment Conversion", lodged concurrently herewith and the disclosure of which is hereby incorporated by cross reference, Referring now to Fig. 2, there is shown, a data flow diagram of the RTO processor shows an image fetch unit 20 connected to the processor memory 4 via the bus 17. Objects and their QPFs are fetched from the processor memory 4 by the image fetch unit 10 and are output to a QPF first-in-first-out (QPF FIFO) register 11 which is four words deep. Data in the QPF FIFO 11 is tagged as object data or QPF data. The QPF FIFO 11 is used to decouple fetching from data processing, so as to increase the access efficiency to the processor bus 3.

Data is output from the QPF FIFO 11 into a preprocessing pipeline (PPP) 12 which performs a series of calculations on the data before it is stored in the QPF memory 7. These operations are: applying scaling and translation factors for the current object to each QPF: filtering out QPF's which will not effect the display; iteratively recalculating the values in a QPF which start before the first line of the display, to yield a QPF starting on the first line of the display; and applying a correction to the QPF's rendering if the image is to be interlaced (as, for example, on a television display).

From the PPP 12, the QPFs are stored in the QPF memory 7. The QPF data is stored as a series of linked lists, one for each line in the image to be formed. After all of the QPFs S(RTO2) (CFP106AU) (238860)

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In videco applications, image preparation of the new image occurs in one half of a double buffered QPF memory, whilst the other half is used for rendering. However, the QPF memory 7 is single ported, so the image preparation and image rendering sections of I the RTO processor 5 must compete for access to the QPF bus 6.

Image rendering is commenced in synchronization with the display 9. Rendering consists of calculating the intersection of QPFs with each line on display 9 in turn, where these intersections define the edges of objects. Each edge (or intersection) is used in the calculation of the level which is to be displayed at a particular pixel position on the scan line.

For each line in the image, the render process steps through the list of QPFs for that line, executing the following steps: p copy the pixel value (location), pixel level (colour) and effects information into a pixel FIFO 19 to be picked up for fill generation and calculation; i calculate the values of the QPFs intersection for the next line, or discard QPFs which terminate on the next line; and merge the recalculated QPF into the list of QPF's starting on the next line.

20 'Rendering and recalculation has the highest priority on the QPF bus 6, however the QPF r: bus 6 is freed for storage or sorting access whenever the pixel FIFO 19 is filled, or all the S'"QPFs for the current line have been processed.

Data is sequenced out of the pixel FIFO 19, which is sixteen words deep, under the V .control of a pixel counter which is incremented by each pixel clock cycle derived from the 25 display 9. The fill generator 20 resolves the priority levels of the objects in the display, and outputs the highest visible level at each pixel position to the colour look-up table 8 prior to display. The fill generation can be modified by an effects block 21, so as to implement jvisual effects such as transparency.

Referring now to Fig. 3, there is shown, the internal structure of the RTO process0r 30 is shown in which a processor bus interface 22 interconnects between the processor bus 3 and the image fetch unit 10. The various stages of the data flow diagram of Fig. 2 appear repeated as individual hardware units in Fig. 3 save for the combination of the fill generator and the effects block 21 as a single fill and effects unit 23. A series of control, status and error (CSE) registers 24 is also provided which allows for monitoring of the RTO processor 5 by the host processor 2. This occurs via a register bus (RBUS) 25 which connects to each i I (RT02)(202826:FPO:LDP) "i ;1 i i 1! ri ;i i of the individual blocks of the RTO processor 5 save for the QPF FIFO 11 and pixel FIFO 19. A control bus 26 and a status and error bus 27 are also used to transport data about the RTO processor It is specific role of the PPP 12 to preformat object list and QPF data provided by the host processor 2 into a format usable by the pixel sorter 17 and by a edge calculation unit 18, w. perform the bulk of high speed processing critical to the operation of the RTO procev _o Object and QPF data is formatted in the manner disclosed in Australian Patent Application No. 38246/93 (Attorney Ref: (RTO10)(238766)) entitled "Object Based Graphics Using Quadratic Polynomial Fragments", lodged concurrently herewith and the disclosure of which is hereby incorporated by cross-reference, and output from the host processor 2 in the format indicated in Fig. 4 of the present specification.

In the preferred embodiment of the RTO grahics system 1, the objects in the list are placed contiguously in memory, with each object (Object 1, Object 2, occupying nine 16 bit locations. The last two words of each object are *QList(low) and *QList(high) which form a pointer to the start of a QPF list for that particular object. The QPF list can reside anywhere in the processor memory 4. The remainder of the object description is made up of scaling and translation factors (LScale, PScale, APScale, AAPScale, LOffset and POffset), the object's level (6 bits) and effects (2 bits) bits (Level), and an 8-bit object tag (Tag) 20 The storage format of a single object in the object list is shown in Fig. 7.

LOffset represents a palette of colours from which Level selects the actual colour of the object. In this manner, Level and LOffset can address 24 bit colour data permitting over 16 million colours to be displayed using the RTO grahics system 1. Although the RTO processor 5 only outputs Level data, the colour look-up table 8 also has access to the 25 processor bus 3 whereby the host processor 2 can adjust the particular palette, by writing to the colour look-up table 8, to display the appropriate colour for that object.

POffset represents a pixel translation amount (X translation for video display) LOffset represents a Line translation amount (Y translation for video).

LScale represents a line scaling factor (related to Y size), PScale represents a pixel scaling factor (related to X size).

APScale represents a pre-calculated factor for scaling APixel to give equivalent X size as PScale.

AAPScale represents a pre-calculated factor for scaling AAPixel to give equivalent X size as PScale.

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iJ ij i f I (RTO2) (CFPI 06AU) (238860: -6- For each object, the QPFs are listed contiguously in memory, each QPF being made up of five 16 bit words. These are, as described in Australian Patent Application No.

36246/93 (Attorney Ref: 238766), (in order) the START_LINE, the END-LINE, the STARTPIXEL, the APIXEL, and the AAPIXEL and the preferred format used in shown in Fig. 8. Both the object list and each QPF list in the processor memory 4 must contain at least one item, as there is no provision for a null list.

A QPF is a mathematical expression of part of an object outline which extends from a start line to an end line within a raster display. The QPF is a curve characterised by a constant change in slope of the line and in this manner, each fragment of any object outline can be described using a quadratic polynomial.

Because each QPF changes slope in a constant manner along its length, each QPF can be readily defined by a number of image parameters. The first of these parameters is the STARTLINE which specifies the first line in raster order upon which the QPF appears, The next parameter is the START_PIXEL which specifies the pixel value (i.e.

location) of the QPF on the start line. The next parameter is APIXEL which specifies the slope of the line. PIXEL is added to START PIXEL for each raster line of the display.

The next parameter is AAPIXEL specifies the curvature of the line. AAPIXEL is added to APIXEL each raster line. The last parameter is the END_LINE which specifies the last line on which the QPF appears.

20 There are five operations performed on QPF data as it passes through the PPP 12: scaling, translation, filtering, precalculation, and interlace correction. Of these, scaling and I translation are performed independently on each of the QPF components, while the last three functions must be performed on the QPF as a whole. After processing, the QPF is stored in the QPF memory 7 in the format shown in Fig. 9 and described in detail in Australian Patent Application No. 38246/93.

Pre-processing Pipeline Structure: The structure of the PPP 12 is shown in Fig. 5. The pipeline consists often registers (SO, S1, TO, P1, P2, P3, 10, 11, and LO), each of which contains a 32-bit fixed point number, a 3-bit tag, and 2 bits for underflow and overflow. The tag indicates which of the five 30 components of a QPF is currently in the register, and is used for local control decoding.

The pipeline registers are labelled SO and SI for scaling operations, TO for translation, PO, P1, P2 and P3 for precalculation, 10 and II for interlace correction, and LO for limiting. The main filter operation is performed on registers S through P2, before precalculation.

Further filtering occurs on registers I1 and 10 after the precalculation and interlace A 5 correction has been completed. The scale sections of the PPP 12 contains a 16 x 16 bit (RTO2) (CFP106AU) (238860) n -r (i 0 1 -7multiplier broken into two pipeline sections 28 and 29. Four 16-bit scale registers which hold the scale factors for each object (seen in Fig. are used to multiply different components of the QPF and output to the multipliers 28 and 29. There are also scale factor data paths 31 from the input of the PPP 12 (from the QPF FIFO 11) to the four 16 bit scale registers 30, to allow loading of the scale factors from the QPF FIFO 11. The first pipeline multiply section 28 outputs to the scale register SO which supplies one input to the second pipeline multiply section 29 which is also input with the scale factors from the four 16 bit scale registers 30. This outputs to the scale register S1.

The translation section of the PPP 12 contains a 16-bit adder 32, and two 16-bit offset registers 33, which hold the pixel and line offset values for each object. The 16-bit adder 32 can be by-passed for QPF components to which translations do not apply. In addition, an 8bit level register 34 holds the Level component of the object being pre-processed. The 16bit adder 32 outputs to the translation register TO into which the value in the 8-bit level register 34 is merged into the top byte for each QPF APIXEL component, The first stage of filtering uses two 32-bit adder/subtractors 35 and 36 for magnitude comparisons of the STARTLINE and PIXEL_VALUES against a constant MAXPIXEL, indicating the maximum pixel number displayed in a line, and a further constant MAXLINE indicating the maximum line number displayed in an image. The constants MAXPIXEL and MAXLINE are input from the CSE registers 24 where they are set by the S 20 host processor 2, The first adder/subt:actor 35 'racts the value of register PO from MAXPIXEL, whilst the second adder/subtractor 36 subtracts the value of register P2 from MAX LINE. Each of the outputs of the adders 35 and 36 are tested against zero (37 and 38 respectively), but are not stored in any register. Simultaneously, P1, TO and S1 are also tested against zero (41, 40 and 39 respectively). There is also a first equality comparator 42 25 to compare the values of registers P2 and P1.

The pre-calculation section of the PPP 12 uses the two adder/subtractors 35 and 36, plus a 16-bit incrementor 43, which perform the additions necessary for the pre-calculation ,i stage, A greater than zero detector 44 on the value of register P3 is used to determine when the pre-calculation is finished.

30 The interlace correction performed by the PPP 12 operates in two steps. The first step I j requires the same calculations as pre-calculation, and so uses the same elements of the pipeline, except that the outputs of the two adder/subtractors 35 and 36 are advanced into the next pipeline stage. In the second step, the second adder/subtractor 36 is used to calculate 2P1+PO, while P1 is loaded with a shifted version of PO.

(RTO2)(202826:FPO:LDP) L w l l 4 .494 944 4 9 4 -8- The storing of the QPFs is the final stage of the PPP 12. The storage of QPFs requires a QPF address down counter 45 to point to the next available location for the QPF3 in the QPF memory 7. This is initialised from a register MBTA in the CSE registers 24 which points to the appropriate location in the QPF memory 7. There is also a 16-bit pointer register 46 which temporarily holds the previous head-of-list pointer for the line, which is written out as part of the new QPF. The overflow and underflow bits of each QPF component in the register Ilare checked in a checker 47 before storage, and the value of the QPF component is set to the appropriate upper or lower limit if the corresponding bit is set.

Pre-processing Pipeline Functioning: Prior to the commencement of operation, the PPP 12 performs a start-up sequence Swhich consists of writing a zero into each of the start-of-line pointer locations in the line ointer table 50 of the QPF memory 7. The PPP 12 will process QPFs that enter the pipeline during start-up, but will not store any QPFs to memory. To initialise the QPF memory 7, the QPF address down counter 45 is initialised with MAXLINES and then counts down to zero with each QPF being stored. In each cycle, a zero is written to the QPF memory location addressed by the outputs of the QPF address down counter 45. When the counter reaches zero, the QPF address down counter 45 is loaded from the MTBA register, and QPF storage can commence, The order of QPF data entering the PPP 12 is: STARTLINE, END_LINE 20 PIXEL, APIXEL, and AAPIXEL. These QPF components are not nec(essarily available at the start of the PPP 12 in consecutive clock cycles. It is required, however, that the whole QPF be present in consecutive pipeline stages before the filter, pre-calculate and interlace functions can be performed. Consequently, the progress of data through the PPP 12 is not straight forward. Fig. 6(A) to Fig. 6(E) show the state of the pipelir: at several points in the progress of a single QPF.

The different QPF components are not guaranteed to enter the PPP 12 in successive cycles, nor will the PPP 12 advance each cycle. As shown in Fig. there can be some empty pipeline locations between components of the same QPF in the first part of the PPP 12, However, data will advance into an empty location even if there is a store further along 30 the PPP 12. This allows the data for one QPF to be assembled in consecutive locations.

When a new QPF enters the pipeline from the QPF FIFO 11, the START_LINE value advances through the PPP 12 as far as the register P2, it then stalls in that position. The other QPF components follow, stalling behind the START LINE, until the five values are in consecutive locations, as illustrated in Fig. At this point, all of the scale and translate operations have been completed.

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eq* 9 *4 'i ji i- i -9- In the next cycle, the comparisons required for the filtering are performed, as the data advances one pipeline stage. If the filtering results (the output of the zero tests 37, 38, 39, and the first equality comparator 42) indicate that the QPF is to be culled, the tag for each of the QPF components is set to INVALID as the pipeline advance occurs, effectively eliminating the QPF from the pipeline. The pipeline is "compressible". Because each stage is individually locked, invalid data simply disappears when its register is clocked with new data, but it is not shifted on. If it is not culled, the QPF will be as shown in Fig. ready for pre-calculation.

If required, pre-calculation occurs without the PPP 12 being advanced. The value in register P3 (STARTLINE), register P1 (PIXEL) and register PO (APixel) are updated during each pre-calculation step, until the START_LINE becomes zero.

The data then advances to further pipeline stages during which the interlace corrections are applied to PIXEL, APixel, AAPIXEL and START_LINE, if required. This advances STARTLINE to the register I1 stage, with the other QPF components behind, as shown in Fig. 6(D).

The next cycle advances the START_LINE data to the LO register stage, at the end of the PPP 12. During this advance, an equality comparison 59 is performed between register 10 and II, If the registers are equal, the QPF is culled. This additional culling is necessary because the data is altered by the pre-calculation and interlace operations. Also, at this step, the underflow and overflow bits for the data in register I1 are examined. These bits are set if the result of any arithmetic operation on the QPF component gives a result which is out of range for that particular component. If one of the bits is set, the data in register I1 is set to the appropriate range of limit checker 47 for the component before being loaded into register LO. The loading of a valid START_LINE into the register LO initiates a QPF store, 25 in the line list in QPF memory corresponding to that QPF's START_LINE. This requires six QPF memory cycles, The PPP 12 is stalled during the first of these cycles, which is a READ, and advances in each of the following five of these cycles. In general, these memory cycles do not occur in consecutive clock cycles, depending on the requirements of other modules of the RTO processor 5 accessing the QPF bus 6, and on the QPF bus 6 wvait 30 state setting.

Scaling and Translation' Scaling and translation applies per-object, scale factors to each QPF in the object.

The four scale factors are: SL (line scale), which applies to both START_LiNE and END_LINE; SP (pixel scale); SAP (APixel scale); and SAAP (AAPIXEL scale). The two offsets are TL (line offset) and TP (pixel offset). APixel and AAPIXEL are not altered by 04 it.V

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the translation. In addition, the object's level is held in the 8-bit level register 34 to be merged into the APixel after scaling and translation, while the object's tag is merged into the AAPIXEL value.

Data enters the PPP 12 from the QPF FIFO 11 as 16-bit values (integers or fixed point). Each value has a 1-bit tag, which specifies whether the data is an object or a QPF component. A counter (not shown) in the PPP 12 generates the additional tag bits for QPF compc.ents based on their order from the QPF FIFO 11, and also distinguishes between different object components. If the tag indicates that the data is part of an object description, the data is loaded into the appropriate scale or translate registers. Otherwise, the data is passed to an input of the first pipeline multiply section 28 and the tag used to select the correct scale and translate values as required in the PPP 12. The QPF tags are loaded into the start of the PPP 12, to progress through the pipeline with the data.

The tag values used are indicated below in Table 1.

TABLE 1.

Tag/Count Component Load Register Scale Factor Translate Factor 0000 StartLine SL TL 0001 EndLine SL TL 0010 Pixel SP TP 0011 APixel SAP 0 0100 AAPixel SAAP 0 0101 Invalid 0110 Invalid 0111 Invalid 1000 Line Scale SL 25 1001 Pixel Scale SP 1010 Pixel Scale SAP 1011 AAPixel Scale SAAP 1100 Line Offset TL 1101 Pixel Offset PL 1110 Level/Object Level/Object 1111 Invalid The multiplier required for scaling and translation is broken into the two pipeline stages 28 and 29 for ease of implementation. The outputs of the multipliers 28, 29 are shifted, depending on the component, so that all data is in 32-bit fixed point format, with 16 bits after the binary point. This format is used throughout the remainder of the PPP 12, (RTO2)(202826:FPO:LDP) (t i.

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11 although the top byte of the APixel value is used for the QPF level information after the translation stage. The pixel and line offset values are integers, and are added to the integer part of the corresponding QPF components.

Filtering The filtering operation consists of a series of comparisons of components of the QPF, which determine whether the QPF will actually affect what appears in the rendered image.

Any QPF not affecting the render image is discarded to speed up the subsequent processing. QPFs are discarded if, following scaling and translation, any of the following conditions apply: 1. START_LINE END_LINE (zero length QPF) 2. END_LINE 0 (QPF entirely off top of screen) 3. STARTLINE MAX LINE (QPF entirely off bottom of screen) 4. PIXEL M'XPIXEL and APixel 0 and AAPIXEL 0. (entirely to right of screen) The positions of the various QPF components during filtering are shown in Fig.

The register operations are: Condition 1:P2== P1 Condition 2: P2 0 Condition 3: MAXLINE -P2 0 Condition 4: MAXPIXEL PO 0; TO 0; SI 0.

The greater than zero comparisons 37, 38, 39 require only the most significant bit of the register to be tested. The first equality comparator 42 is a 16-bit XOR operation.

If any of the four conditions is true, the tags for all five components of the QPF are set to

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*4 .i 25 Pre-Calculation: The pre-calculation sections work on a QPF in registers P3 back to register TO. The QPF is stalled in this position if the START_LINE (in register P3) is less than zero. Three calculations are performed every clock cycle, and the results tested to determine if the process is finished. The calculations are indicated below in Table 2.

TABLE 2.

Register Operations QPF Component Changes Test P P1 +PO PIXEL PIXEL APIXEL PO PO TO APIXEL APIXEL AAPIXEL P3 P3 1 START LINE START LINE I if STARTLINE <0 repeat ji

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1 I ;i i r i i r i i :i (RTO2)(202826:FPO:LDP) -12- The three additions are performed every clock cycle, using the first adder/ subtractor 35 and second adder/subtractor 36 and the 16-bit incrementor 43. The pipeline does not advance at all during the pre-calculation. The results from each of the three steps are written back into the same registers (P3, P1 and PO respectively).

Interlace Correction: The interlace correction section of the PPP 12 modifies QPFs so that they can be rendered correctly when the RTO processor 5 is operating in an interlaced mode where the image is to be displayed on an interlaced display such as a television screen. This is done under the control of two bits obtained from the CSE registers 24. The first bit is an INT bit which is set to indicate that interlacing is turned ON. The second bit is an ODD control bit .that indicates that the frame passing through the PPP 12 is to be rendered on odd or even lines. If the INT bit is not set, then all QPFs pass through the interlace section unchanged.

All QPFs read into the RTO processor 5 are prepared in the processor memory 4 assuming that they will be r aidered non-interlaced, so there are two corrections that must be made. Firstly, if the QPF starts on an odd line when the even frame is being prepared, or vice versa, it is necessary to move one line along the QPF, so that the STARTLINE has the correct sense. This requires changes to the START_LINE, PIXEL and APixel. Secondly, the APixel and A PIXEL values of all QPFs are corrected so that the QPF follows the correct path when rendered on every second line.

The two stages of correction are formed in two consecutive cycles. Before the correction, the components of the QPF are positioned in the pipeline as shown in Fig. 6(C), with the START_LINE in register P3. In the next two cycles, the pipeline advances and the operations shown in Table 3 below are performed.

TABLE 3.

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30 *0 2 Register Operations QPF Component Changes Application Cycle 1 P2 =P1 PO PIXEL PIXEL APixel Odd/Even only P1 P0 TO APixel= APixel A PIXEL 10 P3 1 START_LINE START_LINE 1 Cycle 2 P2 2*Pl PO APixel 2* APixel A PIXEL All QPFs PO =4*PO A Pixel A PIXEL 0.• Limiting and Secondary Filtering: In the final preprocessing step, START_LINE advances to register LO. During this cycle, registers II and 10 are compared by second equality comparator 48 and if they are equal, the QPF is culled. This extra step is required because both the pre-calculation stage and the interlace correction can alter the START_LINE value, so that the previous (RTO2)(202826:FPO:LDP) H i H i t fi i i I 1, 1 i START_LINE END LINE test 42 needs to be repeated. As the data advances into register LO, it is also adjusted if any of the previous arithmetic operations has resulted in overflow or underflow. This applies to all data as it advances into register LO, not just the START LINE. The overflow and underflow bits are set at each calculation stage of the PPP 12. If overflow has occurred, the value is set to the maximum possible value for that component, which varies depending upon the component. If underflow has occurred, the value is set to the minimum possible value.

Storing: When a QPF reaches the end of the PPP 12, it is stored in the QPF memory 7 in the format shown in Fig. 9. The store is initiated when a valid START_LINE is advanced into .the register LO. The PPP 12 initiates a read to the address denoted by START_LINE, and stores the result in a NEXT register, which acts as a pointer within the QPF memory 7, to the next QPF for that particular object. At the same time, the QPF address down counter is clocked, yielding the base address of the next available 4-word location in QPF memory.

During this read cycle, the PPP 12 stalls, leaving the STARTLINE in register LO. In the next cycle, the base address is written to the address denoted by STARTLINE, linking the new QPF location into the list for the line. The pipeline then advances, bringing END LINE into the register LO. In the following four bus cycles, four writes are performed, based on the base address. In order, these writes are: NEXT/END LINE to base 00; PIXEL to base 01; APixel to base 10; and AAPIXEL to base 11. The QPF preprocessing is then complete.

The QPF m;inory 7 as seen in Fig. 10 is configured with QPF free storage space 49 in which the QPF linked lists are stored. A line ointer table 50 is also provided which includes the pointers for each linked list. A bit table area 51 and pixel table area 52 are also 25 allocated, and are used in the QPF sorting process, which follows preprocessing.

The foregoing describes only one embodiment of the present invention and 1. modifications, obvious to those skilled in the art can be made thereto without departing S from the scope of the present invention. For example, the invention is applicable to processing fragments of (cubic) spline base graphic objects and the only changes required 30 is a reconfiguring of the arithmetic calculations, as would be appreciated by those skilled in the art. At the time of drafting this specification, technology is not available at commercial prices that would permit such calculations to be performed for real-time object graphics.

.1 (RTO2)(202826:FPO:LDP) i

Claims (35)

1. A method of processing two-dimensional graphic objects comprising object-based data, that together form an image intended for pixel-based rasterised display, said method comprising the steps of: s receiving said two-dimensional graphic objects, each said two-dimensional graphic object including at least one object-based fragment that defines a single curve portion of said object; (ii) scaling and translating each said fragment of each two-dimensional object based on object vectors preset for each two-dimensional object; (iii) a first determining step for determining a first group of fragments which do not comprise part of the pixel-based rasterised image and discarding the first group of fragments; (iv) a second determining step for determining a second group of fragments which comprise part of the pixel-based rasterised image; calculating fragment data for each fragment in the second group of fragments, the fragment data corresponding to that fragment's starting line on the pixel- based rasterised image; and S t (vi) storing the second group of fragments and the corresponding fragment data St for each fragment in the second group of fragments, prior to calculating the pixel-based arasterised image. St

2. A method as claimed in claim 1, wherein the fragments are processed sequentially in pipeline fashion. S'

3. A method as claimed in claim 1 or 2, wherein between steps (iv) and interlace correction is performed. :bieo: 25

4. A method as claimed in claim 1, 2 or 3, wherein said method comprises, Sbefore step the further step of sorting all said fragments and their corresponding data into sets based upon the starting line of each said fragment in the image is performed.

A method as claimed in any one of claims 1 to 4, wherein each said fragment describes, by means of polynomial equation constants, said single curve Sportion of the correspondiig object.

6. A method as claimed in claim 5, wherein said fragments comprise quadratic polynomial fragments.

7. A method as claimed in claim 6, wherein each said quadratic polynomial fragments includes: a start line value corresponding to a display line at which the quadratic polynomial fragment commences, S 6 i TO 238860 RTO2 CFP106AU [0:\CISRA\RTO\RTO2]AUCLAIMS:IAD ~*1 an end line value corresponding to a display line on which the quadratic polynomial fragment ends, a pixel value corresponding to a pixel position of the display line which the quadratic polynomial commences, a gradient value corresponding to a gradient of the quadratic polynomial fragment on the display line denoted by the start line, and a gradient derivative value corresponding to a derivative of the gradient of the quadratic polynomial fragment.

8. A method as claimed in any one of claims 1 to 7, wherein each said two- dimensional graphic object includes object vector data, said object vector data including a line scale factor, a pixel scale factor, a gradient value scale factor and a gradient i derivative value scale factor.

9. A method as claimed in claim 7, wherein said step of scaling and translating includes multiplying said start line value and said end line value by a line 16 scale factor.

I A method as claimed in claim 7, wherein said step of scaling and translating includes multiplying said pixel value by a pixel scale factor. •e

11. A method as claimed in claim 7, wherein said step of scaling and translating includes multiplying said gradient value by a gradient value scale factor. 0, o

12. A method of as claimed in claim 7, wherein said scaling and translation e includes multiplying said gradient derivative value by a gradient derivative value scale $factor.

13. A method as claimed in any one of claims 1 to 12, wherein each said two- dimensional graphic object includes object vector data including a line translation factor and a pixel translation factor.

14. A method as claimed in claim 7, wherein said step of scaling and translating includes adding a line translation factor to said start line value and said end line value. 1

15. A method as claimed in claim 7, wherein said step of scaling and 30 translation includes adding a pixel translating factor to said pixel value.

16. A method as claimed in claim 7, wherein said step of calculating fragment data includes alteration of said start line value, alteration of said end line value, and alteration of said gradient value for those quadratic polynomial fragments that lie partially outside said image, to values corresponding to the values, said start line value, said end line value, and said gradient value would have on an initial line of the image. I

17. A method as claimed in claim 16, wherein the alteration of said start line value, said end line value, and said gradient value includes: RA4"" adding the gradient value to the pixel value, L) 0A[C -16- adding the gradient derivative value to the gradient value, and j incrementing the start line value until it corresponds to a value which forms part of the image.

18. A method as claimed in any one of claims 1 to 17, wherein said first s determining step includes determining fragments whose length is zero, and including those fragments in the first group of fragments.

19. A method as claimed in claim 18, wherein said determining step includes determining, for a current fragment, that if the start line value is equal to the end line value, the current fragment should be discarded.

20. A method as claimed in claim 18, wherein said determining step includes determining, for a current fragment, that if the end line value is less than zero, the I current fragment should be discarded.

21. A method as claimed in claim 18, wherein said determining step includes determining, for a current fragment, that if the start line value is greater than the maximum number of displayable lines in the image the current fragment should be discarded.

22. A method as claimed in claim 18, wherein said determining step includes jI Z determining, for a current fragment, that if the pixel value is greater then the maximum number of pixels on a line and the gradient value is greater than or equal to zero and 20 the gradient derivative value is greater than or equal to zero the current fragment should i be discarded.

23. A method of as claimed in claim 17, wherein intermediate of steps (iv) and S• interlace correction is performed, said interlace correction including: for each quadratic polynomial fragment starting on an odd line in an even frame, S 25 recalculating the start line value, pixel value and the gradient value so that they S correspond to a quadratic polynomial fragment starting on the next line. 00e

24. A method as claimed in claim 23, wherein said recalculation includes: incrementing the start line value, ;I *adding the gradient value to the pixel value, and adding the gradient derivative value to the gradient value.

A method as claimed in claim 23, wherein said interlace correction further comprises altering said gradient value and said gradient derivative value to correspond to an interlaced display.

26. A method as claimed in claim 25, wherein said altering includes the steps of: adding twice the gradient value and the gradient derivative value to the gradient value, and ~R multiplying the gradient value by four. 238860 RTO2 CFP106AU [O:\CISRA\RT\RTO2]AUCLAIM:IAD i -17-

27. A method as claimed in claim 7, wherein said pixel value, said gradient value and said gradient derivative value are limited to predetermined maximum or minimum values.

28. Apparatus for performing the method as claimed in claim 1.

29. Apparatus as claimed in claim 28, wherein said apparatus forms part of a real-time object based graphics system.

Apparatus for processing two-dimensional graphic objects, comprising "'sed data and that together form a raster-based image intended for pixel-based rasi lisplay, said apparatus comprising: receiving means for receiving said two-dimensional objects, each said two- dimensional graphic object including at least one object-based fragment that defines a single curve portion of said object; (ii) scaling means for scaling and translating each said fragment of each two- dimensional graphic object according to object vectors preset for each object; (iii) determining means for determining and discarding those fragments that will not comprise part of the pixel-based rasterised image; (iv) calculating means for calculating fragment data for each remaining said fragment corresponding to that fragment's starting line on the image; and storing means for storing said remaining fragments and their corresponding S. 20 fragment data prior to calculation of said pixel-based image.

31. An apparatus according to claim 30, wherein said image is displayed on a rasterised display, said display being one of a video display unit or a printer.

32. An apparatus according to claim 30, wherein said fragments of said two- dimensional graphic objects are selectively input to said apparatus by a host processor.

33. An apparatus according to claim 30, wherein said fragments of said two- Sdimensional graphic objects are selectively input to said apparatus by a host processor, Iand said image is displayed on a rasterised display.

34. A method of processing fragments of graphic objects substantially as described herein with reference to the drawings.

35. Apparatus for processing fragments of graphic objects substantially as described herein with reference to the drawings. DATED this Thirtieth Day of August 1996 Canon Information Systems Research Australia Pty Ltd Canon Kabushiki Kaisha Patent Attorneys for the Applicant SPRUSON FERGUSON 238860 RTO2 CFP106AU [O:\CISRA\RTO\RTO2]AUCLAIMS:IAD [la 1 ABSTRACT A Preprocessing Pineline for RIO Grapzhiw System *i' A method and apparatus (12) is disclosed for preprocessing fragments of graphic objects prior to display in a real-time rasterised format. The apparatus (12) is formed as a pipeline having a translation and scaling section a filter section a precalculation section and an interlace correction section The preferred embodiment is specifically configured to process quadratic polynomial fragments (QPFs) of objects, and to calculate same at high speed thereby permitting real-time rendering on a display. The preferred embodiment also forms part of a real-time object base graphics system Fig, 2 0 0 P* Qf 04 0$ .0 0 0 001 01 0 *4 0r 0 04 0 (RTQ2)(202826:FPQ:LDP)