AU654389B2 - Transmission line impedance matching - Google Patents

Transmission line impedance matching Download PDF

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Publication number
AU654389B2
AU654389B2 AU23581/92A AU2358192A AU654389B2 AU 654389 B2 AU654389 B2 AU 654389B2 AU 23581/92 A AU23581/92 A AU 23581/92A AU 2358192 A AU2358192 A AU 2358192A AU 654389 B2 AU654389 B2 AU 654389B2
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AU
Australia
Prior art keywords
output
common
impedance
receivers
transmission lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU23581/92A
Other versions
AU2358192A (en
Inventor
Pascal Geffroy
Francis Hautecloque
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel NV filed Critical Alcatel NV
Publication of AU2358192A publication Critical patent/AU2358192A/en
Application granted granted Critical
Publication of AU654389B2 publication Critical patent/AU654389B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0278Arrangements for impedance matching
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/12Compensating for variations in line impedance
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264Arrangements for coupling to transmission lines
    • H04L25/0272Arrangements for coupling to multiple lines, e.g. for differential transmission
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
  • Transducers For Ultrasonic Waves (AREA)
  • Transceivers (AREA)

Abstract

The device includes transmission lines of like lengths and like characteristic impedances and is represented, for example, by printed- circuit tracks 5 and 6, 7 and 8, 9 and 10 having, in the case of a point-to-multipoint link, a common starting connection point 11 ending up at the inputs of receivers such as 2, 3, 4. A single matching impedance Za is provided, if appropriate, between the output of a transmitter 1 and the said connection point (11). The invention is particularly aimed at circuits on electronic boards containing integrated circuits of the TTL or CMOS families and makes it possible to carry out highly effective matchings requiring few components and especially exhibiting low consumption. <IMAGE>

Description

i I
I
i i P/00/011 28/5/81 Regulation 3.2 65438
AUSTRALIA
Patents Act 1990 *a a* *a e e o a o 0o 0 o 0 a e 0 r a or o roar oa a a ao o r oa ar r a i
ORIGINAL
COMPLETE SPECIFICATION STANDARD PATENT Invention Title: "TRANSMISSION LINE IMPEDANCE MATr,3N G" i- The following statement is a full description of this invention, including the best method of performing it known to us:- 2 This invention relates to an impedance matching device for one-way links, via transmission lines, between one or more electrical signal transmitters and one or more receivers. It can most advantageously be applied to circuits using TTL and CMOS technologies, but can also be applied to other technologies such as NMOS, ECL, etc.
These links provide high-rate data exchanges, in logical form, and, for instance, for the distribution of high-frequency clock signals, from integrated circuits of the TTL or CMOS families. The transmission lines used in these links may be implemented on electronic boards in the form of tracks of printed circuits, but also on other appropriate media. Impedance matching between the signal transmitters and the transmission lines must preserve the integrity of the transmitted signals.
This invention aims in particular to provide for the implementation of optimal impedance matching, firstly, in links between a transmitter or a group of transmitters having a common output and two or more receivers (point-multipoint link) and, 15 secondly, in links between two transmitters or two groups of transmitters and a receiver or a group of receivers with common input (multipoint-point link).
Accordingly there is disclosed, in the case of point-multipoint links, an arrangement in which the output of a transmitter or of a group of transmitters having a common 6 t• output is connected to the inputs of n different receivers, or of n groups of receivers each having a common input, via respective transmission lines of the same characteristic impedance Zc and of the same lengths, these transmission lines having a common branching point connected to the output via a common matching impedance Za, or, where applicable, directly, if Za is to be equal to zero, Za being chosen so that the sum Zs Za, where Zs is the output impedance of the transmitter, or of the group of transmitters with common output, is at least approximately equal to Zc/n.
Alternately, the common branching point of the transmission lines can be directly linked to the transmitter output, the device comprising, in this case, kI additional lines not connected to any receivers, these lines having the same characteristic impedance Zc and the same length as the n transmission lines, the number k of these additional lines being chosen so that Zs is approximately equal to Zc/(n+k).
In the case of a multipoint-point link, the outputs of the two transmitters or of the two groups of transmitters each having a common output, are connected, according to the invention, to the input of a receiver, or of a group of receivers with common input, via two respective first portions of link between the outputs and a common intermediate connection point, and a common second portion of link constituted by a ;r l.cl ~I I (c C 1 Cf
I.,
transmission line of characteristic impedance Zc, between the intermediate connection point and the input, each of the first portions of link being constituted by the connection in series of a respective matching impedance Zai, where i indicates the rank of the first portion of link and is equal to 1 and 2 respectively, and of a respective transmission line having rhe same characteristic impedance Zc and the same length as the line constituting the second portion of link, or being solely constituted by such a transmission line in the case where the respective matching impedance Zai is to be equal to zero, the two transmission lines of said first portions of link ending at the common intermediate connection point and the matching impedances Zai being chosen so that the sum Zsi Zai, where Zsi is the output impedance of the transmitter, or of the group of transmitters with common output, connected to the first portion of link of rank i, is at least approximately equal to Zc, for i 1 and i 2.
The invention thus provides for the implementation of links which are economical, require a low output power from the transmitters and have a low energy consumption, while they perform, in the various configurations, efficient matching which suppresses signal propagation time differences between transmitters and receivers and reduces the degradation of transmitted signals. It moreover provides a solution compatible with a high component density on logic boards, in most applications requiring no more than one matching impedance per transmitter output.
The invention will be better understood from the examples of implementation modes described hereafter and illustrated by the annexed drawing in which: Figure 1 is a diagram of an impedance matching device in the case of a pointmultipoint link, and Figure 2 is diagram of a device according to the invention in the case of a multipoint-point link.
In the device according to Figure 1, a high-rate signal transmitter 1, for instance with an output rate in the order of 50 Mbit/s, having' an output impedance Zs, delivers these signals to three receivers 2, 3, 4 via three transmission lines respectively constituted by printed circuit tracks 5 and 6, 7 and 8, 9 and 10. The lengths of these lines are identical, ie. equal to and their characteristic impedances Zc are also identical. The departure point of these lines is a common connection point 11 and a matching impedance Za is provided between this connection point and the output of transmitter 1. If the value of the output impedance of this transmitter is, for instance, Zs 15 ohms and the impedance of the lines is Zc 77 ohms, a matching impedance Za 10 ohms will be chosen so as to satisfy the matching condition Zs Za q -If 4 approximately equal to Zc/n, where n 3, since Zs Za 25 ohms and Zc/3 25.7 ohms. The length of lines 5 to 10 can vary as long as it is the same for all lines, all lines having the same signal propagation velocity. The waves reflected towards the output of transmitter 1 are thus in phase on all lines 5 to 10 and a single matching impedance Za can therefore be used. This constitutes an important advantage, given the often very high component density fo logic boards. The impedance Za may obviously not be necessary if the matching condition is satisfied with Za 0. It is also worth noting that this device can easily be integrated with a computer aided design.
Figure 1 shows, in dotted lines, a variant of implementation of the matching device which can be particularly advantageous in certain configuration. According to this variant, the impedance Za eliminated while two additional lines are added to the circuit.
These lines, represented respectively by tracks 12, 13 and 14, 15, have the same characteristic impedance and the same length as each of the transmission lines to receivers 2, 3 and 4 but they are not connected to any receivers. In the numerical example given, the result arrived at is Zc/5 15.4 ohms, which again satisfies, with sufficient approximation, the matching condition.
Moreover, Figure 1 illustrates, also in dotted lines, the possible presence, in the framework of a device according to the invention, of a group of receivers 4, 16, 17 having a common input 18, where such groups can be used either at the level of the transmitters or at the level of the receivers. By group is meant an assembly of transmitters or receivers so close together that the respective propagation time differences are negligible.
Figure 2 shows a matching device in the case of a multipoint-point link, in the instance where the number of transmitters does not exceed two transmitters or two groups of transmitters. In the example shown, two transmitters 19, 20 are coupled to a receiver 21. This device comprises first portions of link between the transmitters and a common connection point 22, these portions being constituted, for transmitter 19, by an impedance Zal and, for transmitter 20, by the connection in series of a matching impedance Za2 and of a transmission line the length and characteristic impedance of which are respectively and Zc, constituted by printed circuit tracks 23, 24. A common second portion of link connects the point 22 to the input of receiver 21 and is constituted by a transmission line 25, 26 of the same length and characteristic impedance as line 23, 24.
In this case, the matching condition is satisfied if Zal is chosen so that Zsl Zal be approximately equal to Zc/2, and La2 is chosen so that Zs2 Za2 be approximately equal to Zc.
As already mentioned at the beginning, this solution also presents advantages particularly in terms of its efficiency, of the limited number of components and of the reduced consumption. It is only suited for two transmitters or for two groups of transmitters. However, a large number of cases of practical applications can be resolved using the device according to the diagram of Figure 2. The use of dummy lines to eliminate the matching impedance and the use of groups of receivers obviously remain valid in the case of such a multipoint-point link.
a o a 0 a of a o 0 a 16 F6

Claims (4)

1. An impedance matching device for one-way links, via transmission lines, between one or more electrical signal transmitters and two or more receivers, wherein the output of the transmitter, or of a group of transmitters having a common output, is connected to the inputs of n different receivers, or of n groups of receivers each having a common input, via respective transmission lines of identical characteristic impedance Zc and of identical lengths, these transmission lines having a common branching point connected to the output via a common matching impedance Za, or, where applicable, directly, if Za is to be equal to zero, Za being chosen so that the sum Zs Za, where Zs is the output impedance of the transmitter, or of the group of transmitters with common output, is at least approximately equal to Zc/n.
2. An impedance matching device for one-way links, via transmission lines, obetween one or more electrical signal transmitters and two or more receivers, wherein e 94 the output of the transmitter, or of a group of transmitters having a common output, is connected to the inputs of n different receivers, or of n groups of receivers each having a common input, via respective transmission lines of identical characteristic impedance Zc and of identical lengths, these transmission lines having a common branching point, directly linked to said output, the device comprising furthermore k additional lines not connected to any receivers, these lines having the same characteristic impedance Zc S 20 and the same length as the n transmission lines, the number k of these additional lines being chosen so that Zs is approximately equal to Zc/(n k). t,{ 1
3. An impedance matching device for one-way links, via transmission lines, 4 14 ,c between one or more electrical signal transmitters and two or more receivers, wherein the output of the transmitter, or of a group of transmitters having a common output, is connected to the inputs of n different receivers, or of n groups of receivers each having a common input, via two respective first portions of link between the output and a common intermediate connection point, and a common second portion of link constituted by a transmission line of characteristic impedance Zc, between the intermediate connection point and the input, each of the first portions of link being constituted by the connection in series of a respective matching impedance Zai, where i indicates the rank of the first portion of link and is equal to 1 and 2 respectively, and of a respective transmission line having the same characteristic impedance Zc and the same length as the line constituting the second portion of link, or being solely constituted by such a transmission line in the case where the respective matching impedance Zai is to be equal to zero, the two transmission lines of the first portions of T 7 link ending at the common intermediate connection point and the matching impedances Zai being chosen so that the sum Zsi Zai, where Zsi is the output impedance of the transmitter, or of the group of transmitters with common output, connected to the first portion of link of rank i, is at least approximately equal to Zc, for i 1 and i 2.
4. An impedance matching device substantially as herein described with reference to the accompanying drawings. DATED THIS ST DAY OF SEPTEMBER 1994 ALCATEL N.V. I *i *1i c- i ABSTRACT The device comprises transmission lines of identical lengths and identical characteristic impedances represented, for instance, by printed circuit tracks 5 and 6, 7 and 8, 9 and 10 having, in the case of a point-multipoint link, a common departure connection point 11 and ending at the inputs of receivers such as 2, 3, 4. A unique matching impedance Za is provided, where applicable, between the output of a transmitter 1 and said connection point 11. The invention is particularly designed for electronic board circuits comprising integrated circuits of the TTL or CMOS families and provides for the implementation of very efficient matching operations using few components and in particular having a reduced consumption. FIGURE 1. S t 0t ea et S t at o St t t a a E a t t t t 1( teLa teat II rlt *E t at a a 14 V (i
AU23581/92A 1991-09-16 1992-09-14 Transmission line impedance matching Ceased AU654389B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9111367A FR2681487B1 (en) 1991-09-16 1991-09-16 IMPEDANCE ADAPTATION DEVICE FOR LINKS BY TRANSMISSION LINES BETWEEN ONE OR MORE TRANSMITTERS AND ONE OR MORE SIGNAL RECEIVERS.
FR9111367 1991-09-16

Publications (2)

Publication Number Publication Date
AU2358192A AU2358192A (en) 1993-03-18
AU654389B2 true AU654389B2 (en) 1994-11-03

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Application Number Title Priority Date Filing Date
AU23581/92A Ceased AU654389B2 (en) 1991-09-16 1992-09-14 Transmission line impedance matching

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EP (1) EP0533549B1 (en)
AT (1) ATE160246T1 (en)
AU (1) AU654389B2 (en)
DE (1) DE69223111T2 (en)
ES (1) ES2108739T3 (en)
FR (1) FR2681487B1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6515501B2 (en) * 2001-06-01 2003-02-04 Sun Microsystems, Inc. Signal buffers for printed circuit boards
ES2237278B1 (en) * 2003-03-27 2006-05-16 Universidad De Las Palmas De Gran Canaria PROCEDURE FOR THE ADAPTED MULTIPOINT TRANSMISSION OF HIGH SPEED DIGITAL SIGNS IN PRINTED CIRCUITS AND READAPTATION TO THE MEASUREMENT EQUIPMENT.

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0410402A2 (en) * 1989-07-26 1991-01-30 CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A. An automatic system for adjusting the output impedance of fast CMOS drivers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0410402A2 (en) * 1989-07-26 1991-01-30 CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A. An automatic system for adjusting the output impedance of fast CMOS drivers

Also Published As

Publication number Publication date
DE69223111D1 (en) 1997-12-18
ES2108739T3 (en) 1998-01-01
FR2681487B1 (en) 1993-11-12
AU2358192A (en) 1993-03-18
ATE160246T1 (en) 1997-11-15
EP0533549B1 (en) 1997-11-12
FR2681487A1 (en) 1993-03-19
EP0533549A1 (en) 1993-03-24
DE69223111T2 (en) 1998-03-05

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MK14 Patent ceased section 143(a) (annual fees not paid) or expired