AU6503696A - Controlling bandwidth allocation using a pace counter - Google Patents

Controlling bandwidth allocation using a pace counter

Info

Publication number
AU6503696A
AU6503696A AU65036/96A AU6503696A AU6503696A AU 6503696 A AU6503696 A AU 6503696A AU 65036/96 A AU65036/96 A AU 65036/96A AU 6503696 A AU6503696 A AU 6503696A AU 6503696 A AU6503696 A AU 6503696A
Authority
AU
Australia
Prior art keywords
bandwidth allocation
controlling bandwidth
pace counter
pace
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU65036/96A
Inventor
Stephen A. Caldara
Stephen A. Hauser
Thomas A. Manning
Raymond L. Strouble
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ascom Nexion Inc
Original Assignee
Ascom Nexion Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ascom Nexion Inc filed Critical Ascom Nexion Inc
Publication of AU6503696A publication Critical patent/AU6503696A/en
Abandoned legal-status Critical Current

Links

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    • G06—COMPUTING; CALCULATING OR COUNTING
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    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H04L2012/5683—Buffer or queue management for avoiding head of line blocking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5685—Addressing issues
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
AU65036/96A 1995-07-19 1996-07-18 Controlling bandwidth allocation using a pace counter Abandoned AU6503696A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US149895P 1995-07-19 1995-07-19
US001498 1995-07-19
PCT/US1996/011964 WO1997004570A1 (en) 1995-07-19 1996-07-18 Controlling bandwidth allocation using a pace counter

Publications (1)

Publication Number Publication Date
AU6503696A true AU6503696A (en) 1997-02-18

Family

ID=38659729

Family Applications (1)

Application Number Title Priority Date Filing Date
AU65036/96A Abandoned AU6503696A (en) 1995-07-19 1996-07-18 Controlling bandwidth allocation using a pace counter

Country Status (3)

Country Link
JP (1) JPH11510324A (en)
AU (1) AU6503696A (en)
WO (1) WO1997004570A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2254316T3 (en) * 2000-07-05 2006-06-16 Roke Manor Research Limited IMPROVEMENTS IN, OR RELATED TO, SWITCHING DEVICES.

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5465331A (en) * 1992-12-23 1995-11-07 International Business Machines Corporation Apparatus having three separated and decentralized processors for concurrently and independently processing packets in a communication network
KR960003783B1 (en) * 1993-11-06 1996-03-22 한국전기통신공사 Subscriber atm mux for interface to isdn

Also Published As

Publication number Publication date
JPH11510324A (en) 1999-09-07
WO1997004570A1 (en) 1997-02-06

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