AU6397590A - Device for regulating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel - Google Patents

Device for regulating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel

Info

Publication number
AU6397590A
AU6397590A AU63975/90A AU6397590A AU6397590A AU 6397590 A AU6397590 A AU 6397590A AU 63975/90 A AU63975/90 A AU 63975/90A AU 6397590 A AU6397590 A AU 6397590A AU 6397590 A AU6397590 A AU 6397590A
Authority
AU
Australia
Prior art keywords
throughput
regulating
transmission channel
division multiplex
multiplex transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU63975/90A
Other versions
AU625628B2 (en
Inventor
Denis Lebihan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent NV
Original Assignee
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR8913342A external-priority patent/FR2653285B1/en
Priority claimed from FR8913341A external-priority patent/FR2653284B1/en
Application filed by Alcatel NV filed Critical Alcatel NV
Publication of AU6397590A publication Critical patent/AU6397590A/en
Application granted granted Critical
Publication of AU625628B2 publication Critical patent/AU625628B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
AU63975/90A 1989-10-12 1990-10-10 Device for regulating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel Ceased AU625628B2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
FR8913342A FR2653285B1 (en) 1989-10-12 1989-10-12 DEVICE FOR EVALUATING THE FLOW RATE OF VIRTUAL CIRCUITS EMPLOYING AN ASYNCHRONOUS TIME MULTIPLEXED TRANSMISSION CHANNEL.
FR8913341A FR2653284B1 (en) 1989-10-12 1989-10-12 DEVICE FOR CONTROLLING FLOW RATE OF VIRTUAL CIRCUITS EMPLOYING AN ASYNCHRONOUS TIMED MULTIPLEXED TRANSMISSION CHANNEL.
FR8913342 1989-10-12
FR8913341 1989-10-12

Related Child Applications (1)

Application Number Title Priority Date Filing Date
AU17161/92A Division AU636097B2 (en) 1989-10-12 1992-05-26 Device for evaluating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel

Publications (2)

Publication Number Publication Date
AU6397590A true AU6397590A (en) 1991-04-18
AU625628B2 AU625628B2 (en) 1992-07-16

Family

ID=26227595

Family Applications (2)

Application Number Title Priority Date Filing Date
AU63975/90A Ceased AU625628B2 (en) 1989-10-12 1990-10-10 Device for regulating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel
AU17161/92A Ceased AU636097B2 (en) 1989-10-12 1992-05-26 Device for evaluating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel

Family Applications After (1)

Application Number Title Priority Date Filing Date
AU17161/92A Ceased AU636097B2 (en) 1989-10-12 1992-05-26 Device for evaluating the throughput of virtual circuits on an asynchronous time-division multiplex transmission channel

Country Status (6)

Country Link
JP (1) JP2862659B2 (en)
KR (1) KR0168422B1 (en)
CN (1) CN1029446C (en)
AU (2) AU625628B2 (en)
MX (1) MX171698B (en)
RU (1) RU2098920C1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2657482B1 (en) * 1990-01-19 1993-12-31 Boyer Pierre METHOD AND SYSTEM FOR SMOOTHING AND CONTROLLING ASYNCHRONOUS TIME COMMUNICATION RATES.
JP3947424B2 (en) * 2002-05-02 2007-07-18 株式会社エヌ・ティ・ティ・ドコモ Packet transmission control device, mobile node, control node, packet communication method, and packet communication system
GB0211173D0 (en) 2002-05-16 2002-06-26 Zarlink Semiconductor Inc Virtual counter for data rate conversion
KR101676857B1 (en) * 2015-12-18 2016-11-17 (주)세라테크 Apparatus for foot bath opening and closing cover

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4475192A (en) * 1982-02-16 1984-10-02 At&T Bell Laboratories Data packet flow control scheme for switching networks
US4583219A (en) * 1984-07-16 1986-04-15 At&T Bell Laboratories Trunk for packet switching
US4630261A (en) * 1984-07-30 1986-12-16 International Business Machines Corp. Integrated buffer management and signaling technique
FR2616024B1 (en) * 1987-05-26 1989-07-21 Quinquis Jean Paul SYSTEM AND METHOD FOR PACKET FLOW CONTROL
FR2616025B1 (en) * 1987-05-26 1989-07-21 Lespagnol Albert METHOD AND SYSTEM FOR PACKET FLOW CONTROL
DE3732937A1 (en) * 1987-09-30 1989-04-20 Philips Patentverwaltung CIRCUIT ARRANGEMENT FOR AVOIDING OVERLOAD IN A BROADBAND SWITCHING SYSTEM

Also Published As

Publication number Publication date
MX171698B (en) 1993-11-10
CN1029446C (en) 1995-08-02
KR910008997A (en) 1991-05-31
KR0168422B1 (en) 1999-02-01
AU1716192A (en) 1992-07-30
AU625628B2 (en) 1992-07-16
CN1050960A (en) 1991-04-24
JPH03150944A (en) 1991-06-27
AU636097B2 (en) 1993-04-08
RU2098920C1 (en) 1997-12-10
JP2862659B2 (en) 1999-03-03

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Legal Events

Date Code Title Description
MK14 Patent ceased section 143(a) (annual fees not paid) or expired