AU628333B2

AU628333B2 - Network interface board for pc

Info

Publication number: AU628333B2
Application number: AU34286/89A
Authority: AU
Inventors: Steven J. Gans; David J. Sackmann; Edward H. Wiegl
Original assignee: Square D Co
Current assignee: Schneider Electric USA Inc
Priority date: 1988-04-11
Filing date: 1989-04-11
Publication date: 1992-09-17
Anticipated expiration: 2009-04-11
Also published as: BR8906810A; EP0386168A4; KR900700971A; WO1989009976A1; JPH03500587A; AU3428689A; EP0386168A1; CA1339710C; KR0133202B1

Description

OPI DA-Q103/11/89 PCT N'UMBER, PC.T7USW/1514 'REATYQf~tT) INTERN) A0JP.4ATE, 30/11/89 (51) International Patent Classification 4 International Publication Number: WO &9/09976 G06F15/6 Al (43) International Publication Date: 19 October 1989 (19.10.89) (21) International Application Number: PCT/US89/01514 (81) Designated States: AU, BR, DE (European, patent), DK, FR (European patent), GB (European patent), IT (Euro- (22) luiternaigal Filing Date: 1.1 April 1989 (11.04.89) pean patent), JP, KR, Priority da;a Published 179,716 11 April 1988 (11.04.88) us Wfith international search report.

(71) Applicant: SQUARE D COMPANY [US/US]; Executive Plaza, Palatine, IL 6007 (US).

(72nlvestors: GANS, Steven, J. 9221 West Concord Drive, Mequon, WI 53092 WIEGL, Edward, H. 1401 Kentron Road, Deerfield, IL *60015 SACKMANN, I_ David, J. 4561 South 5th Streetj Milfvaukee, WI 53207 0' (74) Agent: GUTTMAN, Richard, Square D Company, Executive Plaza, Palatine, IL 60067 (US).

(54) Title: NETWORK INTERFACE BOARD SYSTEM (57) AbstractPESNL 2 A network interface board (21) for communic~stion between a personal computer (12) rind a network bug (24) 11110 APPLICATION connecting to programmable logic controller (222) and f FWR the machines being controlled. The board includes mail OFWR box registers (31) for storng messages from the network;,' and includes a queue of alarmn message which the compu. 2 ter can acccss. 39' 82 21 O

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1 -1- NETWORK INTERFACE BOARD SYSTEM

DESCRIPTION

Reference to Related Applications This application is related to Australian patent applications filed concurrently herewith, entitled "Multiple Processor System" (34103/89); "Ladder Sequence Controller" (33638/89); "Peer-To-Peer Register Exchange Controller for PLCs" (36884/89); and, "High-Speed Press Contr9l System" (35465/89). The contents of these applications are incorporated herein by reference.

Technical Field This invention relates generally to an interface between a network of industrial 9..

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programmable logic controllers and a general purpose processor and particularly relates to interface boards for furnishing the interface between a personal computer and the network of industrial programmable logic controllers.

Backaround of the Invention Programmable logic controllers or programmable controllers are used to control the operations of punch presses, screw machines and automatic welders. Each programmable logic controller or PLC receives information on the operation of the punch press or screw machine on sensors and controls the operation of the punch press or screw machine through valves and switches. The PLC thus controls the operation of the punch press or screw machine from placing material into a work location, effecting the work on the raw material and removing the finished part from the work location.

Several of these PLCs can be connected to one another over communication lines to integrate the manufacture of parts through an entire factory. For example, from a central 'ontroller, raw material can be passed through several diffirent machines and processes in completing the manufacture of goods. The communication fines across which the control and status information of the several machines travel uses serial transmission of data at baud rates of from K i '-y WO 89/09976 PCT/US89/01514 3 62,5K baid to 500K baud depending upon the distance between PLCs and central processor.

The order in which the communications occur on the communications network has been defined to require proper sequences of originator address, destination address, register READ and WRITE indications, register addresses and the number of registers to be read or written to. The network 0 communications also defines the times at which each PLC can transmit and receive messages over the network communications lines in a particular manner to avoid loss of communications while assuring that each PLC has the ability to transmit necessary information within certain intervals. All of these communications definitions generally are referred to as the communications protocol.

Previously, the PLC was connected to the communications network through a simple interface circuit card, and the software program within the PLC the driving force for following the communications network protocol in sending and receiving information. ,This required much of the PLC's attention and subtracted from the time available for the central processor to act upon the information it received.

Network interface modules connecting the PLCs t, the communications network exist to handle the protocol in transferring information between the PLCs and the network.

L r, r P C A S- These network interface modules, however, fall to provide features substantially to simplify the transfer of information between the PLC and the network interface module. Connecting the PLC to a network interface module still requires a central processor software to perform extra functions beyond its normal control and processing duties. For example, a network interface module passes alarm messages through from the communications network to the PLC directly as if it were a, command to write or read information into a desired register. The network interface module also passes unsolicited messages directly from the communications network to the PLC at any time including when the PLC is busy acting upon the information it requested from a distant PLC. Moreover, the network interface module furnishes transfer leads to the central processor that are non-standard to currently available personal computers such as the IBM PC compatible desktop units.

15 Summary of the Invention In accordance with the present invention there is disclosed a network interface board for facilitating communication between a personal I computer having memory space and a plurality of programmable logic controllers connected in a communication network to control the operation S 20 of machines operating in a cycle mode, said communication network arranged in a bus configuration, and said network interface board comprising: S(a) terminal means for connecting said network interface board to said personal computer; 25 port means for connecting said network interface board to said communication network; m r 1 tc 4 lj 0 1 -4A mailbox memory means connected in circuit on said network interface board said mailbox memory means having registers accessible for reading and writing through said terminal means by said personal computer and through said port means by said programmable logic controllers connected to said communications network; reply register buffers in said mailbo memory means ,for storing messages received from said communications networkcand for viewing said messages by saidlpersonal computer; write register buffers in said mailbox memory means for storing and sending messages from said personal computer to said programmable logic controllers connected to said communications network; control registers in said mailbox memory means for setting routes and addresses of said programmable logic controllers connected to said communications network to which said messages are to be sent; alarm registers, in said mailbox memory means for storing alarm messages communicated from said communications network; and address locations within said mailbox memory reans for said reply register buffers, write register buffers, and alarm registers defined by said personal tomputer as part of said personal computer's 20 memory space, allowing said reply register buffers, write register buffers, and alarm registers to be directly addressable in a predetermined sequence as set by said personal computer.

The preferred embodiment furnishes a network interface presenting expansion port signals and connector for commercially available computers such as the IBM PC compatible units. The interface board (card) also-.

s. simplifies programming of the personal computer. The network interface s:e board also furnishes a mailbox for messages from the communications rhk/14llo WO 89/09976 PCT/US89/01514 network, and provides a queue of alarm messages that the computer can access in any sequence it desires. The interface board through use of a direct memory address (DMA) arrangement has address locations defined for the foregoing asynchronous access, to the personal computer.

The alarm messages can be of any one of three types identified as an alarm, fault and warning. Related to an automatic welding machine, an alarm message can mean that the electrodes have gone beyond their proper working position and although they still may operate, they should be changed. A fault message would indicate a broken SCR failing to conduct any current to the electrodes, A warning would indicate that the automatic welder was approaching a problem conditioh.

Coupled with the message registers, the network interface board provides an alarmed queue that comprises a dedicated portion of RAM memory sufficient to stack up to 20 alarm messages of each of the three types. The microprocessor then can access' these alarm messages in any order ,esired to service them in accordance with th overall system operation.

Brief Description of the Drawinoas Figure 1 is a block diagram the con tions of a network board 30 indicating the connections of a network board gr: WO 89/09976 PCT/US89/01514 0 6 between a personal computer and the communications netwokk; Figure 2 is a diagrammatic block diagram of the registers provided on the retwork interface card for transferring information between the microprocessor and communications network; Figure 3 is a schematic block diagram of the commercially available components and their interconnections effecting the interface card of the invention; Figure 4 is an isometric view of the network interface card of the invention; Figure 5 is a view showing the connection from the network interface card to the network cable; Figure 6 is another view of the network interface card showing the output ports and the terminal connection; Figure 7 is an isometric view of a network interface module 31 (see also Figure 1); Figure 8 is a view of the registers of the network interface module of Figure 7; Figure 9 shows the method of interconnecting two networks via two network interface modules; and Figure 10 shows the three alarm queues.

Description of the Preferred Embodiment "3 7- i- ,4 WO 89/0"76 PCT/US89/01514 ::i Figure 1 shows a system including a computer and a monitor 12 for communicating with a communicationp network 10 connected to control a number of industrial devices such as punch presses, welders, etc. A network interface board (NIB) 21 of the invention is mounted in computer 11 into an empty board or card 4lot in the computer via edge connector 29.

The network is a high-speed industrial communication system. The network has a bus configuration with a single twinaxial cable serving as the network communication pathway (see Figures 1 and 3).

Programmable controllers (PLCs) and other devices such as computers, printers, D-LOG modules and CRT programmers are connected to the network through NIB 21 and network interface modules (NIMs) 31 to be discussed in detail below.

A computer 11 with the NIB 21 can monitor programmable controllers on the network and provide supervisory control. When it recognizes a nted for control action, the computer 11 can communicate instructions to the programmable 6ontrollers. for example, the computer could detect a'materials shortage situation and instruct a remote programmable controller to start conveyors to move material from an alternate site.

Further, the system allows a personal computer 11 to rapidly acquire reali: i i a: x .if" WO 89/09976 PC'T/US89/01514 1 time production data from programmable controllers. This data can be parts counts, machine operating times, temperatures, statistical information, and other programmable controller information. Once the production data has been acquired by the NIB 21, the computer can prepare management reports, pass the data to another computer, or initiate real-time control action through the programmable controllers.

The network interface board (NIB) 21 mounts in a long expansion slot of an IBM Compatible Personal Computer II. Because NIB 21 mounts in the computer, the board 21 allows the computer to connect to the network without the extra rack and power supply which would be required if a NIM were used.

The NIB 21 has four light-emitting dicde (LED) indicating lights which provide informa ion about the operation of the board.

The LEDs are designated Network, Active, TXI and RX1 and are located a! shuwn in Figure 6.

A yelow, "netwo k" L$D illuminates to indichit. activity- n the nviwork. A green 2e LLED indicates the operational itatus the board. A yellow TX-1 LED flases toLndicae when the board is transmitting data o the device connected to the RS 422 port. A yellow RX-1 LED flashes to indicati when the board is receiving data from the devic connected to the RS-422 port.

ff II I^ I i C WO 89/09976 PCT/US89/01514 9 In addition to the RS-422 port and the opto line 19, NIB 21 includes an edge connector 29 which is the communication link between the NIB 21 and the computer 11. The computer 11 communicates to the NIB 21 through 7 the board's edge connector in parallel mode, rather than through a serial RS-422 pprt.

The RS-422 port 22 allows a device other than the computer 11, for example, to access the network through the board 21. This port can be configured for different modes of operation.

The opto port 23 is used to connect the board 21 to the network 10. This is done via the network connector cable 24 which plugs into the port on the board and into a "Tee" connector 41 on the network cable, see Figure Mounted on NIB 21 is a DIP switch unit having four individual switches 39.

These switches are set to determine which address range in the computer's memory is Assigned to NIB 21 functions.

In addition to network interfacing, the NIB 21 supports programm i ng software.

With this software, the computer can be used to program and monitor a processor or data log module either by direct cable connection or over the network as shown in Figure 3.

The application software 16 is on a disk insertable into the disk drive 11A of computer 11. Part of usable software may be

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WO 89/09976 PCT/US89/01514 i the form of firmware (ROMs or EPROMs) plugged into NIB 21. The mailbox registers on NIB 21 will be described below.

An opto link 19 may be positioned in board 21 in communication port 23 to enhance reliability in the face of disturbances on the communication lines from voltage surges such as induced or developed as a result of operating the presses and welders connected to the communication network 10. The opto link 19 is connected such au through a suitable opto junction box 23.

The mailbox memory registers 25 on the network interface card 21 are shown in Figure 2. The network 'interface board 21 furnishes mailbox 25 for unsolicited messages from the communications network, and provides alarm messages in a queued format which the computer 11 can access in any sequence. The interface card 21 provides 4 direct memory access (DMA) arrangement havirg Od'ess locations defined for asynchroBisa access by the personal computer and an interface card.

As shown in Figure 2, the message control registers of mailbox 25 are used to tet up command routes, remotj address and the byte count of the message block which is used in the Read and Write operations. o| S^ The write register buffer is used to store register data that will be sent to a remote device. The reply register is used to store incoming data, other than alarm

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means for storing messages received from said communications network and for viewing said messages by Ssaid personal computer; write register buffers in said mailbox memoryi S-./2 WO 89/09976 PCT/US89/01514 messages, received by the network interface board 21. The alarm message buffer is usee to 1 G store the incnming alarm messages. The a .rm c: ntrol is used to control the viewing, acknowledging and resetting of the alarm messages. The setup and interrupt controls are used for set-up parameters uuch as band rate, network size and RS-422 pprt parameters.

Importantly, the NIB 21 has three separate alarm queues. Three priorities of alarms, faults and warnings can be received from programmable controllers (PLCs) and interpreted by the personal computer 11. The personal computer 11 can display the alarms,' acknowledge the alarms, store the alarm in ormatin, or take supervisory action based Son the alarms received.

An example of the operation of the mailboxc registers of Figure 2 is as follows: Assume an alarm message is recaived that signals that welder electrodes have gone beyond their proper working p sition and should be changed.

This message would De received ,rt o the network interface card 24 and mailbox in the alarm message buffer.

Note, of course, that the network interface card 21"set 3 up and interrupt cctrol registers, as shown in Figure 2, are initially, set up with the proper network communic ti, parameter, as is known.

in t Nit WO 89/09976 PCT/US8 0 received, the alarm c ntrol registers will then control viewing, acknowledging and resetting of alarm messages. The computer s will acknowedge the alarm message and set the applicable cknowledge registers in)the alarm control sect\ n of the mailbox. OnCe the alarm message\is acknowledged, the alarm control regist r will cause that particular message to be reset or cleared.

If It is necessary to send a message to the varioui devices, for example to devices that originate an alarm, that message will be stored in the write register bfiefer. The message control buffer will then be used to set up the route, the remote address and the byte count of the message block to be sent out. The reply register buffer may be used to store all incoming messages to the NIB 21.

Alarm messages are similar to write messages except that alarm messages send a constant value (alarm code) rather than variable dta from a storage register. The receiving device can be programmed to respond to various alarm codes in an appropri ae manne._ As shown in Figure 10, an area of memory is set aside as three alarm queues.

Each alarm queue can store 20 alarm messages in the order in which they are receiid. Each stored alar message contains the alarm code, e uthe rtwork oute from the device that send N value (lr rather tan varble fro A trg eitr Terciigdvc

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Il: 1 WO 89/09976 PCr/US89/01514 (optionally) some additional the alarm and alarm data.

The three alarm queues are called Warnings, Alerts and Faults. Having .hree separate queues allows the alarm messages to be categorized in different levels.

Generally, Warnings are considered the least serious kind of alarm, Alerts are more serious, and Faults are the most serious.

However, the manner in which each type is responded to depends on how tht user program is designed.

Each of the three alarm rqeues has a register adu;ass, allowing the pr6cesor direct 4larm messages to the appropriate queue.

Messages can be placed in an ala queue via alarm commands or write commands When a write command is used, up to five registers of data can be written to a message location in an alarm queue. The first restei serves as the alarm code, while the otI feur registers can provide additional data from the initiating device. Not only does a rite rung allow more information to be sent to the queue than an alarm rung, the data is dynamically definable. That is, the alarm *code* information may be loaded into the processor register based on real-time I/O status and other real-time conditions. With an alarm run, the alarm code is/fixed when the ladder program is developed r' j i, j i i ik g F7 14 j The user program can utilize opcodes to view an alarm, acknowledge an alarv (to the device -ht, N a' ta, ert it), and clear the alarm from the queuo W~~~enon n alarm is rece-vdi oeo -the aar quus, the change flat f:or that queue is s t to its new counkt.

Each alarm change'has a selected flag loc~ation. For example, the locations Fault Queue, 2H Alert Queue 3H Warning Queue 4H The user program can be designed to poll for a flag change or be interrupted by a f lag change. The program can then view the Arror code ai14 take other appropriate- action.

j To view an alarm, the user program selects which alarm in the qi.'eue itjishes to see and copies the alarm data to a buffer -StIwhere it can be viewed. Following is the, procedure for viewing an alarm message. Refer to Figure 1. The user program detects an Alarm Change flag.

The user program~\checks the Alarm, Count 1o4 ation f or thd appropriate qu ue there.

3. Thi. user progra secte to etemin th nuberofaam m3essade which mesg\lto 20) jr, the qu~aue t ow. it WO 89/09976 PCT/US89/01514 placJs this number in the Alarm Select locaiti on S4. The user program places the view command opcode in the Alarm Command 5 location.

The user program sets the Go Flag (240H) to a non-zero value.

6. When the Go Flag is cleared, the selected message is available for viewir9._ Routing information for this message is available in the Message Route Buffer.

If the application requires it, the user program can acknowlepge the alarm (oend the alarm code back to the originating device).

When e write rung has been used to Flsend a group of registers as an alarmlue essage only the first register is written back to th initiating processor as an acknowledgment.

2t The procedure for acknowledging an alarm message is as follows: available in the essage Route Buffer.

If the applicaton5 requires it, the 1 The user program sets the number of the aammessag to be acknowledged in the Fault Queue, Alert Queue ors arninged 2 5 Queue.

send a group of registers as an alarm mesage, only 2. The user progrittena plac theo th initiating processor as an acknowledgment.i acknowledge command opcode in a designated Alarm Command location.llo 3. The user program puts a value determines which register in the initiating device the alarm code sent back to.g dve inthe Fault Queue, Alert Queue or Wning onl tue fir. The user program plac th e acknowledge omand opcode in a degnated Alarm Command locationlw 3. The user program puts a value ina designated Acknowie Register that deterines which register inthe initiating device the alarm codeis sent back to.

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4. The user program sets the Go Flag to a non-zero value.

The NIB 21 clears the Go Flag when the message has been acknowledged.

Alarm messages remain in th9 alarm queues until they are cleared by the user program. When an alarm queue is full, the NIB 21 will accept no more alarm messages for that queue.

Alarm messages can be cleared individually (usually after being iewed) with the Clear command. There is also a command for simultaneously clearing all three alarm queues.

Following is a procedure for clearing individual alarms.

1. The user program sets \he number of the alarm to be cleared in the Alarm Select location 2. The user program places the clear command opcode in the Alarm Command 3. The user program sets the Go Flag to a non-ziro value.

4. The NIB 21 board clears the Go Flag wh.n the message has been cleared.

To clear all alarms, the following procedure may be used.

S1.Y The user progrm places the Clear AllAlarm opcode in the Alarm Command location.

L i i i: oi;i -i L i WO89/09976 PCTIUSl$/91514 17 2. The user program sets the Go Flag to a non-zero value.

0 3. The NIB 21 clears the Go Flag when all the alarm queues have been cleared.

Devices on the network can write data into the processor equivalent (mailbox) registers contained on the NIB 21. This allows the NIB 21 to receive unsolicited data.

A Register Change Flag location contains the address of the last register to be written to. If a block of registers is written to, the Register Change Flag location contains the lowest register number of the block.

By monitoring the Register Change Flag, the user program need not poll all 512 registers to detect a change. The NIB 21 board can also be configured to generate an interrupt to the personal computer whenever a mailbox register is written to.

Register addresses in the Register Change Flag are only cleared on powir-up and restart by NIB 71. Repetitive writes to the same mailbox register will not change the address in the Register Change Flag after the first write. However, each write to the mailbox registers will generate an interrupt to the computer 1i, if this interruption condition is enabled.

he NIM,31 manages network communication, relieving the user program of these tasks. As will be explained,the NIM 31

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WO ,9/09976 PCF/US89/01514 can flag te user program when a reply, alarm condition cr unsolicited message is received.

An additional RS-422 port 22 is provided in each NIM 31, see Figure 3, which allows a second device to access the network through the NIM. That is, each HIM 31 can support two devices. Note that only the NLMs 31 are connected to the network 10. The PLCs and the devices (see Figure 1) are connucted through the NIMs 31 to the network line 24.

Refer now to Figures 1, 7 and 9.

The NIM 31 allows two devices (programmable controllers, CRT programmers, computers, printers, etc.) to connect to the network.

Since a maximum of 100 network interfaces modules NIMs 31 can be connected to a single network and since each NIM 31 can connect two devices to the network, a network can have a maximum of 200 devices. However, even more devices can communicate by connecting multiple networks together as indicated in Figure 9.

The network interface module NIM 31 mounts in a register slot of a programmable controller I/O rack assembly. The NIM 31 has a two-digit thumbwheel for setting a network address number between 00 and 99. This address number identifies the NIM module, and the devices connected to it, an' also sets the communication priority that the NIM module hjs in relation (to the other NIMs on the network.

The NIM has two RS-422 COMM ports to which the programmable controllers or other

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1'> WO 89/09976 PCTr/US89/01514 <ydevices a&re connected.,, Those port numnbers are,,> combined with the NIM address number to identify the devices for network communication.

Claims

1. A nt work interface b;ard for facilitating communication between a personal &omputer having memory space and a plurality of programmable logic controllers connected in a communication network to control the operation of machines operating in a cycle mode, said communication network arranged in a bus configuration, and said network interface board comprising: terminal means (29) for connecting said network interface board (21) to said personal computer; port means (23) for connecting said network interface board to said communication network; mailbox memory means (25) connected in circuit on said network interface board said mailbox C C memory means having registers accessible for reading and writing though said terminal means by said personal computer and through said port means by said programmable logic controllers connected to said communications network; S(d) reply register buffers in said mailbox memory means for storing messages received from said communications network and for viewing said messages by C said personal computer; write register buffers in said mailbox memory means for storing and sending messages from said personal Scomputer to said programmable logic controllers connected c e tto said communications network; control registers in said mailbox memory means for setting routes and addresses of said programmable logic controllers connected to said communications network to which ,said messages are to be sent alarm registers in said mailbox memory mans for storing alarm messages communicated from said irZnmunications network; and address locations within said mailbox memory }:k ceb *l t ""*eor ashaigrgsesacsile o edigad' S- 21 means for said reply register buffers, write register buffers, and alarm registers defined by said personal computer as part of said personal computer's memory space, allowing said reply register buffers, write register buffers, and alarm registers to be directly addressable in a predetermined sequence as set by said personal computer,

2. A network interface board as defined in claim 1, wherein said terminal means comprises an edge connector for insertion in an expansion card slot of said personal computer for providing a parallel connection to said personal computer, and said port means providing a serial connection for direct access to said communication network.

3. A network interface board as defined in claim 1, wherein said alarm registers include alarm queues comprising stacked alarm messages and said personal computer accesses said alarm queues in a predetermined sequence through direct memory addressing.

4. A network interface board as defined in claim 1, wherein said port means is opto-isolated for connection to said communication network.

A network interface board as defined in claim I. 1, including an input-output serial RS-422 port for connecting to other intelligent devices by direct cable Sconnection.

6. A network interface board as defined in claim 1, wherein said alarm registers include three separate, prioritized alarm queues, one each for alarms, faults and warnings.

7. A network interface board as defined in claim wherein said intelligent device is a programmable logic controller.

8. A network interface board as defined in claim wherein said intelligent device is a personal computer.

9. A network interface board as defined in claim wherein said intelligent device is a printer.

A network interface board as defined in -07 '.VI I. W611FJ=A L.L ZGL W& %ACDCLJW bIJL6WCZLW U C Jura V 22 claim 5, wherein said intelligent device is a CRT programmer.

11. A network interface board as defined in claim 1, wherein said messages stored in said write register buffers by said personal computer constitute program steps generated from said persona], computer by an application program and sent to a programmable logic controller connected on said communications network, allowing said personal computer to directly program said programmable logic controller over said communications network.

12. A network interface board substantially as described herein with reference to the drawing. DATED this SEVENTH day of JANUARY 1992 Square D Company Patent Attorneys for the Applicant SPRUSON FERGUSON Cj eee C CCgo o., II2