AU625161B2 - High availability cache organization - Google Patents

High availability cache organization

Info

Publication number
AU625161B2
AU625161B2 AU61344/90A AU6134490A AU625161B2 AU 625161 B2 AU625161 B2 AU 625161B2 AU 61344/90 A AU61344/90 A AU 61344/90A AU 6134490 A AU6134490 A AU 6134490A AU 625161 B2 AU625161 B2 AU 625161B2
Authority
AU
Australia
Prior art keywords
high availability
cache organization
availability cache
organization
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU61344/90A
Other versions
AU6134490A (en
Inventor
Brian Lefsky
Mary Ellen Natusch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Computervision Corp
Original Assignee
Prime Computer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Prime Computer Inc filed Critical Prime Computer Inc
Publication of AU6134490A publication Critical patent/AU6134490A/en
Application granted granted Critical
Publication of AU625161B2 publication Critical patent/AU625161B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/126Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
AU61344/90A 1987-04-13 1990-08-27 High availability cache organization Ceased AU625161B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US3769587A 1987-04-13 1987-04-13
US037695 1987-04-13

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
AU13292/88A Division AU604101B2 (en) 1987-04-13 1988-03-18 High availability cache organization

Publications (2)

Publication Number Publication Date
AU6134490A AU6134490A (en) 1990-11-22
AU625161B2 true AU625161B2 (en) 1992-07-02

Family

ID=21895780

Family Applications (2)

Application Number Title Priority Date Filing Date
AU13292/88A Ceased AU604101B2 (en) 1987-04-13 1988-03-18 High availability cache organization
AU61344/90A Ceased AU625161B2 (en) 1987-04-13 1990-08-27 High availability cache organization

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AU13292/88A Ceased AU604101B2 (en) 1987-04-13 1988-03-18 High availability cache organization

Country Status (4)

Country Link
EP (1) EP0287334A3 (en)
JP (1) JPS63278158A (en)
AU (2) AU604101B2 (en)
CA (2) CA1309181C (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1299767C (en) * 1987-02-18 1992-04-28 Toshikatsu Mori Cache memory control system
FR2683924B1 (en) * 1991-11-18 1997-01-03 Bull Sa INTEGRATED MEMORY, ITS MANAGEMENT METHOD AND RESULTING COMPUTER SYSTEM.
US5438575A (en) * 1992-11-16 1995-08-01 Ampex Corporation Data storage system with stale data detector and method of operation
EP0600729A1 (en) * 1992-12-04 1994-06-08 Plessey Semiconductors Limited Data storage arrangement
EP0675436B1 (en) * 1994-03-31 1999-10-27 STMicroelectronics, Inc. Recoverable set associative cache
JP3116827B2 (en) * 1996-07-16 2000-12-11 日本電気株式会社 Cache memory controller
US11902129B1 (en) 2023-03-24 2024-02-13 T-Mobile Usa, Inc. Vendor-agnostic real-time monitoring of telecommunications networks

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4095283A (en) * 1976-07-02 1978-06-13 International Business Machines Corporation First in-first out memory array containing special bits for replacement addressing
JPS60221855A (en) * 1985-03-20 1985-11-06 Hitachi Ltd Replacement control device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2055233B (en) * 1977-12-22 1982-11-24 Honeywell Inf Systems Data processing system including a cache store
US4197580A (en) * 1978-06-08 1980-04-08 Bell Telephone Laboratories, Incorporated Data processing system including a cache memory
US4168541A (en) * 1978-09-25 1979-09-18 Sperry Rand Corporation Paired least recently used block replacement system
US4464717A (en) * 1982-03-31 1984-08-07 Honeywell Information Systems Inc. Multilevel cache system with graceful degradation capability
EP0173556A3 (en) * 1984-08-31 1987-05-27 Texas Instruments Incorporated Hierarchical architecture for determining the least recently used cache memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4095283A (en) * 1976-07-02 1978-06-13 International Business Machines Corporation First in-first out memory array containing special bits for replacement addressing
JPS60221855A (en) * 1985-03-20 1985-11-06 Hitachi Ltd Replacement control device

Also Published As

Publication number Publication date
AU604101B2 (en) 1990-12-06
AU6134490A (en) 1990-11-22
EP0287334A2 (en) 1988-10-19
CA1309181C (en) 1992-10-20
AU1329288A (en) 1988-10-13
CA1320285C (en) 1993-07-13
EP0287334A3 (en) 1989-11-08
JPS63278158A (en) 1988-11-15

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