AU622524B2 - Receiver mute circuit - Google Patents
Receiver mute circuit Download PDFInfo
- Publication number
- AU622524B2 AU622524B2 AU50659/90A AU5065990A AU622524B2 AU 622524 B2 AU622524 B2 AU 622524B2 AU 50659/90 A AU50659/90 A AU 50659/90A AU 5065990 A AU5065990 A AU 5065990A AU 622524 B2 AU622524 B2 AU 622524B2
- Authority
- AU
- Australia
- Prior art keywords
- receiver
- subset
- semiconductor switch
- mode
- switch means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/02—Constructional features of telephone sets
- H04M1/20—Arrangements for preventing acoustic feed-back
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M1/00—Substation equipment, e.g. for use by subscribers
- H04M1/60—Substation equipment, e.g. for use by subscribers including speech amplifiers
- H04M1/6033—Substation equipment, e.g. for use by subscribers including speech amplifiers for providing handsfree use or a loudspeaker mode in telephone sets
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M9/00—Arrangements for interconnection not involving centralised switching
- H04M9/08—Two-way loud-speaking telephone systems with means for conditioning the signal, e.g. for suppressing echoes for one or both directions of traffic
Description
!p.
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2 COMMONWEALTH OF1 AUSTRALIA PATENTS ACT 1952-1969 COMIPLETE SPECIFICATION FOR THE INVENTION ENITLED "RECEIVER MUTE CIRCUIT" The following statement is a full descr'iptioni of this invention, including the best method of perftorming it k~nown to us:r 1.1 2 This invention relates to telephone subsets and in particular to telephone subsets incorporating a so-called hands-free facility.
Such subsets when in a first mode or "handset" mode allow speech to be received and transmitted by a. hand held handset, and when in a second mode or "hands-free" mode allows speech to be received and transmitted by a loudspeaker and microphone.
When the subset is in the second mode it is necessary to mute the receiver in the handset. This is because in the hands-free mode the power requirements of the subset are quite severe mainly due to the relatively high power required to drive the loudspeaker. If the receiver was not muted, )\ower would be wastefully subtracted from the limited power available. Muting the receivcr also avoids the generation of acoustic feedback from receiver to microphone.
Receiver mute circuits arc known, one example of which comprises a low channel-resistance field-effect-transistor FIT) arrangement to switch the receiver circuit off. Such an arrangement suffers the disadvantage of being relatively expen- 0 4 15 sive, requiring a high gate voltage and, during assembly, prone to damage by electrostatic discharge.
It is an object of the present invention to provide an improved telephone subset S receiver mute circuit arrangement using a saturated transistor as an audio switch.
High base current for the transistor is pron ided by the normal excess current output 4* 0 20 from the subset's transmission circuit.
According to a first aspect of the present invention there is provided in a telephone subset arrangement comprising a control means for controlling a plurality of subset functions including a "handset" mode and a "hands -free" mode, and a transmission circuit means including a receiver output means coupled to the subset's re- 25 ceiver and a shunt voltage regulator means to mtaintain a substantially constant voltage across line terminals of said subset arrangement, a method of muting said receiver, comprising the steps of directing, when in the "handset" mode, excess current from said voltage regulator means into a control element of a controllable semiconductor switch means a conductive path of which is serially connected with said receiver to saturate said controllable semiconductor switch means and render it conducting, and when in the "hands-free" mode interrupt said excess current to render said controllable semiconductor switcli means non-conducting.
According to a further aspect of the present invention, in a telephone subset arrangement comprising a control means for controlling a plurality of subset functions 1 including a "handset" mode and a "hands-fre" mode, and a transmission circuit means including a receiver output means coupled to the subset's receiver and a shunt voltage regulator means to maintain a substantially constant voltage across line terminals of said subset arrangement, a receiver mute circuit arrangement comprising a controllable semiconductor switch means whose conductive path is serially connected with said receiver and whose control clcmrcn is coupled to said line terminal means such that in the "handset" mode excess current from said voltage regulation means saturates said controllable semiconductor switch means allowing audio current to flow through said receiver, and in the "hands-frce" said excess current is prevented from saturating said controllable semiconduclor switch means which turns off and interrupts said audio current.
I In order that the invention may be readily carried into effect, an embodiment thereof will now be described in relation to the accompanying drawing which shows a schematic circuit of part of a telephone subset having a "hands-free" facility, incor- Sporating the receiver mute circuit of the present invention.
15 Referring to the drawing, the circuit arrangement comprises a transmission circuit 1 in the form of an integrated circuit having a line pin LN coupled to the LI T2 to wi is ne tt terminal of th subset, transmitter pins TI and T2 to which is connected the handset 4 it transmitter 2, a REC pin coupled to one terminal of the handset receiver 3 via a capacitor Cl, a SLOPE pin coupled to the subset's L2 terminal via resistor RI and j 20 two serially connected diodes DI and 2nd an AGC pin coupled via resistor R2 to the junction of resistor RI and diode )DI tI 1. 2 via capacitor C2. The arrangement further includes a transistor TR I whose collector/emitter junction is serially connected between the other ter- S minal of receiver 3 and the voltage rail connected to terminal L2. The base element of transistor TRIl is coupled to the junctio-f -if resistor RI and diode Dl via a resistor R4 and the collector/emitter junctl_:n of a further transistor TR2 whose base element is connected via a resisfor R3 to the "hands-free" disable pin DS of the subset's general microprocessor 4.
The transmission circuit 1 includes a known "excess current" arrangement which is a shunt voltage regulator (not shown) in the form of an internal transistor whose conductive path is serially connected between the LN pin and the SLOPE pin and whose control element is coupled to the output of an internal OP-AMP (not shown) whose inputs monitor the voltage across the LN pin and SLOPE pin such that the conductance of the internal transistor is varied with variations of voltage across the LN pin and the SLOPE pin to maintain a substantially constant voltage across the said pins, typically 4.2 volts.
This is required in order to prevent an excessive voltage being impressed across the LN and SLOPE pins if the subset is connected to a short line.
Operation 'Handset" mode.
In this mode the "hands-free disable pin DS of microprocessor 4 is HIGH causing transistor TR2 to turn on which directs part of the excess current from the SLOPE pin, resistor Rl to resistor R4, collector/emitter junction of transistor TR2 to the base element of transistor TR1. The remainder of the excess current flows to L2 via diodes DI and D2. Transistor TRi is saturated C age causing a low AC impedance path through the collector/emitter junction to terminal L2, providing receiver 3 with sufficient audio current for operation.
The voltage dropped across diodes Dl and D2 should be sufficiently high to operate transistors TRl and TR2, typically 0.8 volts is required. The two serially connected diodes provide 1.2 volts.
"Hands-free" Mode In this mode the "hands-free" disable pin DS of microprocessor 4 is LOW which causes transistors TRI and TR2 to turn off, resistor R5 ensuring that transistor TRI fully turns off. The collector/emitter junction of transistor 4 i TR1 now provides a high impedance circuit between receiver 3 and line terminal L2 preventing audio current from flowing and thereby muting the receiver 3.
The connection of the AGC pin of transmission circuit 1 to line terminal L2 via the junction of resistor Rl, diode Dl and capacitor C2 ensures that the voltage between the AGC pin and the SLOPE pin remains proportional to the line current which is necessary in order to facilitate AGC action on the send and receive audio gain.
While the present invention has been described with regard to many particulars it is understood that equivalents may be readily substituted without departing from the scope of the invention.
C C i
Claims (4)
1. In a tclephon subset arrangemcnt comprising a control means for controlling a plurality of subset functions including a "handsct" mode and a "hanlds-free" mode, and a transmission circuit means includling a rcccivr output means coupled to the subset's receiver and a shunt voltage icgun o tr mcans to maintain a substantially constant voltage across line citerminals of sait subset arrangcment, a receiver mute circuit arrangement comprising a First controll1able semiconductor switch means a conductive path of which is scrially connected wilth said receiver and a control ele- ment of said first con trollablc semiconductor switch being coupled to said line termi- nal means such that in the "handset" mode cxccss current from said voltage regulation means saturates said first semiconductor sl'itch means allowing audio current to flow through said receiver, and in the "hands-free" sail excess current is prevented from saturating said first semiconductor switch mcMns which turns off and interrupts said audio current.
2. A receiver mute circuit as claimed in claim I includling a second controllable semiconductor switch means a conductive path of which couples said control element of the first controllable semiconductor switch means to said line terminal means, and :Tta control element of said second controllable semiconductor switch means being cou- pled to an output of saidl control men ns, whereby in the "handset" mode a signal produced at said output of the control means renders said second controllable semi- con(luctor switch means conducting causing at least part of said excess current to flow into the control element of said first controllable semiconductor switch means to cause saturation thereof.
3. A recciver mute circuit as claimed in claim I or 2, whercin said control means 2E is a microprocessor.
4, In a telephone subset arrangement comprising a control means for controlling a plurality of subset functions including 'handset" mniode and a "hands -free" mode, and a transmission circuit means including a receivl output means coupled to the subset's receiver and a shunt voltage regulator means to maintain a substantially constant voltage across line terminals of said subset arrangement, a method of muting said receiver, comprising the steps of direct ing, when in the "handset" mode, excess current from said voltage regulator nicans into a control element of a controllable semiconductor switch means a conductive path of which is serially connected with t said receiver to saturate said controllable semiconductor switch means and render it condluctinig, and whcni ini tim "ha eds-fiec" modo interrupt said excess cuirrent to reni- decr said controllable semiconiductor switch means n~on-cond ucting. A telephone subset arrangcmcn in1c01rporating a 'ccciv'cr mu lto circuit, sub- stantially as herein decscribed with rcfCITenCc 10 the1 figur1c Of the acc ompanyig draw- ing. DATED THIS TWENTY-I.-ITI ITI I DAY OF JANUARY, 1992 ALCATEL AUSTRZALIA LIMITED a c# 9 c 0c
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AUPJ3230 | 1989-03-16 | ||
AUPJ323089 | 1989-03-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU5065990A AU5065990A (en) | 1990-09-20 |
AU622524B2 true AU622524B2 (en) | 1992-04-09 |
Family
ID=3773783
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU50659/90A Ceased AU622524B2 (en) | 1989-03-16 | 1990-03-05 | Receiver mute circuit |
Country Status (1)
Country | Link |
---|---|
AU (1) | AU622524B2 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU580932B2 (en) * | 1985-03-29 | 1989-02-02 | Tie/Communications, Inc. | Speakerphone sensing circuit |
AU2191088A (en) * | 1987-09-07 | 1989-03-09 | Lake Electronic Technologies Limited | A speech circuit for a telephone |
AU606613B2 (en) * | 1986-09-10 | 1991-02-14 | Cass Group Public Limited Company | Improvements in call devices |
-
1990
- 1990-03-05 AU AU50659/90A patent/AU622524B2/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU580932B2 (en) * | 1985-03-29 | 1989-02-02 | Tie/Communications, Inc. | Speakerphone sensing circuit |
AU606613B2 (en) * | 1986-09-10 | 1991-02-14 | Cass Group Public Limited Company | Improvements in call devices |
AU2191088A (en) * | 1987-09-07 | 1989-03-09 | Lake Electronic Technologies Limited | A speech circuit for a telephone |
Also Published As
Publication number | Publication date |
---|---|
AU5065990A (en) | 1990-09-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK14 | Patent ceased section 143(a) (annual fees not paid) or expired |