AU6158199A - Method for forming transistors on a thin semiconductor wafer - Google Patents

Method for forming transistors on a thin semiconductor wafer

Info

Publication number
AU6158199A
AU6158199A AU61581/99A AU6158199A AU6158199A AU 6158199 A AU6158199 A AU 6158199A AU 61581/99 A AU61581/99 A AU 61581/99A AU 6158199 A AU6158199 A AU 6158199A AU 6158199 A AU6158199 A AU 6158199A
Authority
AU
Australia
Prior art keywords
semiconductor wafer
thin semiconductor
forming transistors
transistors
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU61581/99A
Inventor
Stephen E. Bernacki
Steven R. Collins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Raytheon Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Raytheon Co filed Critical Raytheon Co
Publication of AU6158199A publication Critical patent/AU6158199A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Weting (AREA)
AU61581/99A 1998-11-19 1999-09-21 Method for forming transistors on a thin semiconductor wafer Abandoned AU6158199A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US19604198A 1998-11-19 1998-11-19
US09196041 1998-11-19
PCT/US1999/021958 WO2000031784A1 (en) 1998-11-19 1999-09-21 Method for forming transistors on a thin semiconductor wafer

Publications (1)

Publication Number Publication Date
AU6158199A true AU6158199A (en) 2000-06-13

Family

ID=22723899

Family Applications (1)

Application Number Title Priority Date Filing Date
AU61581/99A Abandoned AU6158199A (en) 1998-11-19 1999-09-21 Method for forming transistors on a thin semiconductor wafer

Country Status (2)

Country Link
AU (1) AU6158199A (en)
WO (1) WO2000031784A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7541203B1 (en) 2008-05-13 2009-06-02 International Business Machines Corporation Conductive adhesive for thinned silicon wafers with through silicon vias

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61112345A (en) * 1984-11-07 1986-05-30 Toshiba Corp Manufacture of semiconductor device
US5071792A (en) * 1990-11-05 1991-12-10 Harris Corporation Process for forming extremely thin integrated circuit dice
FR2684800B1 (en) * 1991-12-06 1997-01-24 Picogiga Sa METHOD FOR PRODUCING SEMICONDUCTOR COMPONENTS WITH ELECTROCHEMICAL SUBSTRATE RECOVERY.
EP0573921A3 (en) * 1992-06-12 1994-09-28 Seiko Instr Inc Semiconductor device having a semiconductor film of low oxygen concentration
JPH076982A (en) * 1992-07-31 1995-01-10 Sharp Corp Method of splitting thin semiconductor substrate

Also Published As

Publication number Publication date
WO2000031784A1 (en) 2000-06-02

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase