AU610783B1 - Clock supply for multiplex systems - Google Patents

Clock supply for multiplex systems

Info

Publication number
AU610783B1
AU610783B1 AU63230/90A AU6323090A AU610783B1 AU 610783 B1 AU610783 B1 AU 610783B1 AU 63230/90 A AU63230/90 A AU 63230/90A AU 6323090 A AU6323090 A AU 6323090A AU 610783 B1 AU610783 B1 AU 610783B1
Authority
AU
Australia
Prior art keywords
clock signal
multiplex systems
clock supply
clock
frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU63230/90A
Inventor
Imre Sarkoezi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of AU610783B1 publication Critical patent/AU610783B1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0614—Systems characterised by the synchronising information used the synchronising signal being characterised by the amplitude, duration or polarity

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Circuits Of Receivers In General (AREA)
  • Chemical And Physical Treatments For Wood And The Like (AREA)

Abstract

A clock supply for multiplex systems for distributing at least one system clock signal (TS) and at least one frame clock signal (TR), in which a marking circuit (MC) is provided to which both clock signals (TS, TR) are supplied and which generates a combined system/frame clock signal (SR) by marking the system clock signal (TS) which is transmitted on a single clock line (TL) and is separated again into the system clock signal (TS) and the frame clock signal (TR) by means of a separation circuit (SE). <IMAGE>
AU63230/90A 1989-09-27 1990-09-26 Clock supply for multiplex systems Ceased AU610783B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3932240 1989-09-27
DE3932240 1989-09-27

Publications (1)

Publication Number Publication Date
AU610783B1 true AU610783B1 (en) 1991-05-23

Family

ID=6390299

Family Applications (1)

Application Number Title Priority Date Filing Date
AU63230/90A Ceased AU610783B1 (en) 1989-09-27 1990-09-26 Clock supply for multiplex systems

Country Status (7)

Country Link
EP (1) EP0419895B1 (en)
JP (1) JPH03119843A (en)
AT (1) ATE130988T1 (en)
AU (1) AU610783B1 (en)
CA (1) CA2026139A1 (en)
DE (1) DE59009919D1 (en)
ES (1) ES2080090T3 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0588050B1 (en) * 1992-08-18 1997-12-29 Siemens Aktiengesellschaft Arrangement for generating a clock signal having missing pulses with a bit precision
EP0592725A1 (en) * 1992-09-18 1994-04-20 ALCATEL BELL Naamloze Vennootschap Transfer method, frame information extraction circuit and clock pulse stream regenerator used therein
US5414745A (en) * 1993-06-01 1995-05-09 Advanced Micro Devices, Inc. Synchronized clocking disable and enable circuit
US5787078A (en) * 1994-03-09 1998-07-28 Alcatel N.V. Frame Synchronization method
DE4407794A1 (en) * 1994-03-09 1995-09-14 Sel Alcatel Ag Synchronization of the pulse frame
DE59713030D1 (en) * 1996-07-24 2010-05-12 Bosch Gmbh Robert PROCESS FOR SYNCHRONIZING DATA, INTERFACE FOR TRANSMISSION
JP2004517565A (en) * 2000-12-28 2004-06-10 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Method for synchronizing two devices or devices connected to a telephone line

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0014945A1 (en) * 1979-02-27 1980-09-03 Siemens Aktiengesellschaft Circuit arrangement for clock generation in telecommunications exchanges, in particular time division multiplex digital exchanges
AU530661B2 (en) * 1979-09-03 1983-07-21 Nec Corporation Clock recovery circuit for burst communications systems
AU593343B2 (en) * 1986-04-22 1990-02-08 Koninklijke Philips Electronics N.V. Clock recovery arrangement suitable more specifically for an information transmission system using TDMA principle in one transmission direction

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1286092B (en) * 1966-09-20 1969-01-02 E H Karl Dr Ing Method for synchronization in binary message transmission systems
GB1265530A (en) * 1969-08-30 1972-03-01 Marconi Co Ltd
FR2316674A1 (en) * 1975-07-04 1977-01-28 Cit Alcatel MULTIPLE PULSATION SIMULTANEOUS TRANSMISSION SYSTEM
US4078153A (en) * 1976-09-30 1978-03-07 International Standard Electric Corporation Clock signal and auxiliary signal transmission system
US4780890A (en) * 1986-09-29 1988-10-25 Microwave Semiconductor Corp. High-speed pulse swallower

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0014945A1 (en) * 1979-02-27 1980-09-03 Siemens Aktiengesellschaft Circuit arrangement for clock generation in telecommunications exchanges, in particular time division multiplex digital exchanges
AU530661B2 (en) * 1979-09-03 1983-07-21 Nec Corporation Clock recovery circuit for burst communications systems
AU593343B2 (en) * 1986-04-22 1990-02-08 Koninklijke Philips Electronics N.V. Clock recovery arrangement suitable more specifically for an information transmission system using TDMA principle in one transmission direction

Also Published As

Publication number Publication date
EP0419895A2 (en) 1991-04-03
DE59009919D1 (en) 1996-01-11
CA2026139A1 (en) 1991-03-28
JPH03119843A (en) 1991-05-22
EP0419895B1 (en) 1995-11-29
ES2080090T3 (en) 1996-02-01
ATE130988T1 (en) 1995-12-15
EP0419895A3 (en) 1992-08-12

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