AU5857990A - System and method for cyclical, offset multiport register operation - Google Patents

System and method for cyclical, offset multiport register operation

Info

Publication number
AU5857990A
AU5857990A AU58579/90A AU5857990A AU5857990A AU 5857990 A AU5857990 A AU 5857990A AU 58579/90 A AU58579/90 A AU 58579/90A AU 5857990 A AU5857990 A AU 5857990A AU 5857990 A AU5857990 A AU 5857990A
Authority
AU
Australia
Prior art keywords
cyclical
offset
register operation
multiport register
multiport
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU58579/90A
Inventor
Glenn Keller
David L. Needle
Javier Solis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ATARI Corp
Original Assignee
ATARI CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ATARI CORP filed Critical ATARI CORP
Publication of AU5857990A publication Critical patent/AU5857990A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
AU58579/90A 1989-06-02 1990-06-01 System and method for cyclical, offset multiport register operation Abandoned AU5857990A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US36064589A 1989-06-02 1989-06-02
US360645 1989-06-02

Publications (1)

Publication Number Publication Date
AU5857990A true AU5857990A (en) 1991-01-07

Family

ID=23418875

Family Applications (1)

Application Number Title Priority Date Filing Date
AU58579/90A Abandoned AU5857990A (en) 1989-06-02 1990-06-01 System and method for cyclical, offset multiport register operation

Country Status (2)

Country Link
AU (1) AU5857990A (en)
WO (1) WO1990015385A1 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838389A (en) * 1992-11-02 1998-11-17 The 3Do Company Apparatus and method for updating a CLUT during horizontal blanking
US5572235A (en) * 1992-11-02 1996-11-05 The 3Do Company Method and apparatus for processing image data
US5596693A (en) * 1992-11-02 1997-01-21 The 3Do Company Method for controlling a spryte rendering processor
US5481275A (en) 1992-11-02 1996-01-02 The 3Do Company Resolution enhancement for video display using multi-line interpolation
US5752073A (en) * 1993-01-06 1998-05-12 Cagent Technologies, Inc. Digital signal processor architecture

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4766535A (en) * 1985-12-20 1988-08-23 International Business Machines Corporation High-performance multiple port memory
US4783732A (en) * 1985-12-12 1988-11-08 Itt Corporation Two-wire/three-port RAM for cellular array processor

Also Published As

Publication number Publication date
WO1990015385A1 (en) 1990-12-13

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