AU541674B2 - Memory architecture - Google Patents

Memory architecture

Info

Publication number
AU541674B2
AU541674B2 AU81389/82A AU8138982A AU541674B2 AU 541674 B2 AU541674 B2 AU 541674B2 AU 81389/82 A AU81389/82 A AU 81389/82A AU 8138982 A AU8138982 A AU 8138982A AU 541674 B2 AU541674 B2 AU 541674B2
Authority
AU
Australia
Prior art keywords
memory architecture
architecture
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU81389/82A
Other versions
AU8138982A (en
Inventor
Charles T. Retter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EMC Corp
Original Assignee
Data General Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Data General Corp filed Critical Data General Corp
Priority to AU81389/82A priority Critical patent/AU541674B2/en
Publication of AU8138982A publication Critical patent/AU8138982A/en
Application granted granted Critical
Publication of AU541674B2 publication Critical patent/AU541674B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
AU81389/82A 1978-12-06 1982-03-12 Memory architecture Ceased AU541674B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU81389/82A AU541674B2 (en) 1978-12-06 1982-03-12 Memory architecture

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US967041 1978-12-06
AU81389/82A AU541674B2 (en) 1978-12-06 1982-03-12 Memory architecture

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
AU52273/79A Division AU538812B2 (en) 1978-12-06 1979-10-29 Digital computer with microinstruction memory

Publications (2)

Publication Number Publication Date
AU8138982A AU8138982A (en) 1982-07-15
AU541674B2 true AU541674B2 (en) 1985-01-17

Family

ID=3760174

Family Applications (1)

Application Number Title Priority Date Filing Date
AU81389/82A Ceased AU541674B2 (en) 1978-12-06 1982-03-12 Memory architecture

Country Status (1)

Country Link
AU (1) AU541674B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4625296A (en) * 1984-01-17 1986-11-25 The Perkin-Elmer Corporation Memory refresh circuit with varying system transparency

Also Published As

Publication number Publication date
AU8138982A (en) 1982-07-15

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