AU538981B2 - Digital decoding and clock recovery - Google Patents

Digital decoding and clock recovery

Info

Publication number
AU538981B2
AU538981B2 AU82948/82A AU8294882A AU538981B2 AU 538981 B2 AU538981 B2 AU 538981B2 AU 82948/82 A AU82948/82 A AU 82948/82A AU 8294882 A AU8294882 A AU 8294882A AU 538981 B2 AU538981 B2 AU 538981B2
Authority
AU
Australia
Prior art keywords
clock recovery
digital decoding
decoding
digital
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU82948/82A
Other versions
AU8294882A (en
Inventor
Jordan Isailovic
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Discovision Associates
Original Assignee
Discovision Associates
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Discovision Associates filed Critical Discovision Associates
Priority to AU82948/82A priority Critical patent/AU538981B2/en
Publication of AU8294882A publication Critical patent/AU8294882A/en
Application granted granted Critical
Publication of AU538981B2 publication Critical patent/AU538981B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
AU82948/82A 1977-11-04 1982-04-22 Digital decoding and clock recovery Expired AU538981B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU82948/82A AU538981B2 (en) 1977-11-04 1982-04-22 Digital decoding and clock recovery

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US848550 1977-11-04
AU82948/82A AU538981B2 (en) 1977-11-04 1982-04-22 Digital decoding and clock recovery

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
AU41144/78A Division AU523034B2 (en) 1977-11-04 1978-10-27 Encoding and decoding digital data

Publications (2)

Publication Number Publication Date
AU8294882A AU8294882A (en) 1982-07-22
AU538981B2 true AU538981B2 (en) 1984-09-06

Family

ID=3761083

Family Applications (1)

Application Number Title Priority Date Filing Date
AU82948/82A Expired AU538981B2 (en) 1977-11-04 1982-04-22 Digital decoding and clock recovery

Country Status (1)

Country Link
AU (1) AU538981B2 (en)

Also Published As

Publication number Publication date
AU8294882A (en) 1982-07-22

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