AU519205B2 - Multiprocessor system memory access - Google Patents
Multiprocessor system memory accessInfo
- Publication number
- AU519205B2 AU519205B2 AU42225/78A AU4222578A AU519205B2 AU 519205 B2 AU519205 B2 AU 519205B2 AU 42225/78 A AU42225/78 A AU 42225/78A AU 4222578 A AU4222578 A AU 4222578A AU 519205 B2 AU519205 B2 AU 519205B2
- Authority
- AU
- Australia
- Prior art keywords
- memory access
- system memory
- multiprocessor system
- multiprocessor
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU42225/78A AU519205B2 (en) | 1978-12-05 | 1978-12-05 | Multiprocessor system memory access |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU42225/78A AU519205B2 (en) | 1978-12-05 | 1978-12-05 | Multiprocessor system memory access |
Publications (2)
Publication Number | Publication Date |
---|---|
AU4222578A AU4222578A (en) | 1980-06-12 |
AU519205B2 true AU519205B2 (en) | 1981-11-19 |
Family
ID=3729486
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU42225/78A Expired AU519205B2 (en) | 1978-12-05 | 1978-12-05 | Multiprocessor system memory access |
Country Status (1)
Country | Link |
---|---|
AU (1) | AU519205B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU663537B2 (en) * | 1992-01-02 | 1995-10-12 | International Business Machines Corporation | Bidirectional data storage facility for bus interface unit |
-
1978
- 1978-12-05 AU AU42225/78A patent/AU519205B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AU663537B2 (en) * | 1992-01-02 | 1995-10-12 | International Business Machines Corporation | Bidirectional data storage facility for bus interface unit |
Also Published As
Publication number | Publication date |
---|---|
AU4222578A (en) | 1980-06-12 |
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